Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]

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DisEnchantment

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TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.

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N7 performance is more or less understood.
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This year and next year TSMC is mainly increasing capacity to meet demands.

For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.


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Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.

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FEEL FREE TO CREATE A NEW THREAD FOR 2025+ OUTLOOK, I WILL LINK IT HERE
 
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regen1

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Some new info:
View attachment 134647
Seems like some progress there. Will be interesting to see how the foundry landscape plays out in 2028. But looking like non-pro A-series goes to intel, Pro A-series to TSMC. As of now.
At present the combined timelines and products on the nodes for a number of things don't seem to match to that of in the image.
Coral is going to be H1 28 launch though apparently they said somewhere i can't remember they are focusing on bringing coral early by cancelling DMR-SP
They are trying to speed up Coral Rapids launch but it still won't make up for being uncompetitive in that area(canceled DMR-SP) for such a large period. Till then they can hope for is a rise in demand for Server CPUs and they get away by selling a lot of Granite Rapids and other stuff to somewhat compensate.
 

Khato

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which i doubt is the price for Intel/AMD/Nvidia/Appls or others
Heh, how else do you think that TSMC maintains gross margins around 55%? It's not by offering notable discounts to their largest customers. Anyway, two of those four are far better at proper compartmentalization than the others.
 
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marees

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Not exactly leading edge news — Samsung gets automotive orders on Switch 2 node

What's old is new again: Samsung Foundry wins order for 8nm automotive semiconductors from Hyundai Motor Company​


According to semiconductor industry sources on the 17th, Samsung Electronics Foundry will mass-produce autonomous driving chips developed in-house by Hyundai Motor Company. These chips will be mass-produced using an 8nm process, with development expected to be completed by 2028 and mass production targeted for 2030.
This is a different chip from the previously planned automotive semiconductors. Hyundai Motor Company had initially ordered autonomous driving chips for premium vehicles like the Genesis, using Samsung Foundry's 5nm process.
The project will be re-selected as a design partner through the "K-on-Device AI Semiconductor" project, which will be conducted by the Ministry of Trade, Industry and Energy next year. However, as the project is being conducted domestically, industry insiders generally believe Samsung Foundry will be used.
Development will be overseen by Song Chang-hyun, Head of Advanced Vehicle Platform (AVP) Headquarters. Hyundai Motor Group established the AVP Headquarters in January of this year to integrate Hyundai and Kia's mobility research and development (R&D) capabilities and software (SW) technology development.
A semiconductor industry insider said, "The mass production volume of this chip is greater than that of the 5nm chip." This is likely because, unlike the 5nm chip, which is installed only in premium vehicles, the 8nm chip will be installed in all mass-produced vehicles by Hyundai Motor Company.


Hyundai Motor Company is believed to have chosen 8nm for its cost-effectiveness. 8nm chips offer a significant price difference while maintaining a comparable performance to finer processes.


 

marees

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PS6 on samsung 2nm ?????



According to industry sources on the 14th, Samsung Electronics' Device Solutions (DS) Division's Foundry Division is currently discussing a plan to produce semiconductors designed by AMD using its 2nm (nanometer, one billionth of a meter) second-generation (SF2P) process. To this end, it plans to soon prototype AMD chips through a multi-project wafer (MPW). MPW is a process in which designs from multiple companies or organizations are jointly manufactured on a single wafer. The two companies plan to finalize the contract around January next year after examining whether the process can actually achieve the performance level required by AMD, but the industry believes that production is likely. The product requested by AMD is presumed to be AMD's next-generation central processing unit (CPU) chip.
 

511

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PS6 on samsung 2nm ?????



According to industry sources on the 14th, Samsung Electronics' Device Solutions (DS) Division's Foundry Division is currently discussing a plan to produce semiconductors designed by AMD using its 2nm (nanometer, one billionth of a meter) second-generation (SF2P) process. To this end, it plans to soon prototype AMD chips through a multi-project wafer (MPW). MPW is a process in which designs from multiple companies or organizations are jointly manufactured on a single wafer. The two companies plan to finalize the contract around January next year after examining whether the process can actually achieve the performance level required by AMD, but the industry believes that production is likely. The product requested by AMD is presumed to be AMD's next-generation central processing unit (CPU) chip.
1765706257674.png
 
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LightningZ71

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AMD have been working together off and on for years. Rumors have had them making multiple low end processors there, only to cancel them before development was completed. It would be foolish for AMD to not have some level of cooperation with Samsung to deal with disaster scenarios, so I don't think that this is unbelievable. Now, is it REALLY going to happen? That's a different story.
 
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Joe NYC

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PS6 on samsung 2nm ?????



According to industry sources on the 14th, Samsung Electronics' Device Solutions (DS) Division's Foundry Division is currently discussing a plan to produce semiconductors designed by AMD using its 2nm (nanometer, one billionth of a meter) second-generation (SF2P) process. To this end, it plans to soon prototype AMD chips through a multi-project wafer (MPW). MPW is a process in which designs from multiple companies or organizations are jointly manufactured on a single wafer. The two companies plan to finalize the contract around January next year after examining whether the process can actually achieve the performance level required by AMD, but the industry believes that production is likely. The product requested by AMD is presumed to be AMD's next-generation central processing unit (CPU) chip.

That sounds interesting. Looks like Samsung is pooling the costs to make masks for the test chips by sharing the cost between number of customers.
 

marees

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PS6 on samsung 2nm ?????



According to industry sources on the 14th, Samsung Electronics' Device Solutions (DS) Division's Foundry Division is currently discussing a plan to produce semiconductors designed by AMD using its 2nm (nanometer, one billionth of a meter) second-generation (SF2P) process. To this end, it plans to soon prototype AMD chips through a multi-project wafer (MPW). MPW is a process in which designs from multiple companies or organizations are jointly manufactured on a single wafer. The two companies plan to finalize the contract around January next year after examining whether the process can actually achieve the performance level required by AMD, but the industry believes that production is likely. The product requested by AMD is presumed to be AMD's next-generation central processing unit (CPU) chip.

The talks are said to involve prototype testing and technical evaluation, with a decision expected as early as the first quarter of 2026 if the process meets AMD’s performance and yield requirements. The reported cooperation would focus on a limited subset of processors based on AMD’s upcoming Zen 7 microarchitecture. Rather than shifting its entire CPU lineup, AMD is believed to be considering Samsung for select server-class and entry-level desktop products. This selective strategy suggests the company is exploring additional manufacturing options while maintaining its existing foundry partnerships.


Even if an agreement is reached, production would follow a long qualification and ramp-up phase. As a result, CPUs manufactured on Samsung’s 2 nm node would not be expected to reach the market until after 2028. This timeline aligns with typical industry practices for introducing complex, high-performance processors on new process technologies.


 

marees

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The talks are said to involve prototype testing and technical evaluation, with a decision expected as early as the first quarter of 2026 if the process meets AMD’s performance and yield requirements. The reported cooperation would focus on a limited subset of processors based on AMD’s upcoming Zen 7 microarchitecture. Rather than shifting its entire CPU lineup, AMD is believed to be considering Samsung for select server-class and entry-level desktop products. This selective strategy suggests the company is exploring additional manufacturing options while maintaining its existing foundry partnerships.


Even if an agreement is reached, production would follow a long qualification and ramp-up phase. As a result, CPUs manufactured on Samsung’s 2 nm node would not be expected to reach the market until after 2028. This timeline aligns with typical industry practices for introducing complex, high-performance processors on new process technologies.


I presume the 16 core zen 7 will remain on TSMC but the 8 core version might get fabbed on samsung ??
 

adroc_thurston

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I presume the 16 core zen 7 will remain on TSMC but the 8 core version might get fabbed on samsung ??
forget about it, pretty much everything Zen7 is TSMC A14.
They are engaging with SF2p/x/yaddayadda PDKs but no product has been committed and in general if anything goes there it's either a client GPU or a lower end mobile part (think MDS3 lane).
 

fastandfurious6

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yeah especially at zen7 time it will be one core top product and then its variations/nerfs

no point having many processes. lower-end can be rehashes/rebrands of zen5/6
 
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marees

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yeah especially at zen7 time it will be one core top product and then its variations/nerfs

no point having many processes. lower-end can be rehashes/rebrands of zen5/6
AMD planned to replace tsmc 6nm Mendocino with samsung 4nm sonomo valley

As of today SV is scrapped & Mendocino is scheduled to be replaced by grimlock point 4 — that is a rung below medusa point-3 /bumblebee. So could be samsung again but has to work out
 

dullard

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Intel has now installed the ASML's Twinscan EXE:5200B high-NA EUV lithography tool. It is undergoing acceptance testing.

This is supposedly a production-ready tool. 60% more wafer throughput at a much higher light dose (50 mJ/cm² vs 20 mJ/cm²) compared to the other high-NA EUV tools. Wafer positioning variation is lower which significantly reduces overlay alignment errors--and thus yield should increase.

Having just one installed and tested is not enough for real production of any significant quantity. But it should make 14A chip development go much better.
 
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fastandfurious6

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Too political for our section.
Intel has now installed the ASML's Twinscan EXE:5200B high-NA EUV lithography tool. It is undergoing acceptance testing.

This is supposedly a production-ready tool. 60% more wafer throughput at a much higher light dose (50 mJ/cm² vs 20 mJ/cm²) compared to the other high-NA EUV tools. Wafer positioning variation is lower which significantly reduces overlay alignment errors--and thus yield should increase.

Having just one installed and tested is not enough for real production of any significant quantity. But it should make 14A chip development go much better.


before taiwan? is ASML/ZEISS gonna ditch taiwan to support USA instead?

(Removed the last line as it fell too into politics)

Moderator Aigo.
 
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Geddagod

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PS6 on samsung 2nm ?????



According to industry sources on the 14th, Samsung Electronics' Device Solutions (DS) Division's Foundry Division is currently discussing a plan to produce semiconductors designed by AMD using its 2nm (nanometer, one billionth of a meter) second-generation (SF2P) process. To this end, it plans to soon prototype AMD chips through a multi-project wafer (MPW). MPW is a process in which designs from multiple companies or organizations are jointly manufactured on a single wafer. The two companies plan to finalize the contract around January next year after examining whether the process can actually achieve the performance level required by AMD, but the industry believes that production is likely. The product requested by AMD is presumed to be AMD's next-generation central processing unit (CPU) chip.
SF2P sounds interesting. Is this supposed to be the next major Samsung node shrink after SF2 renaming? Maybe it gets to be as good as N3P or something.
 

511

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before taiwan? is ASML/ZEISS gonna ditch taiwan to support USA instead?

interesting angle... if china takes taiwan then ASML definitely won't ship anything anymore
Can you at least use your brain at least TSMC doesn't see Hign-NA mature enough to use so they ordered late. (kind of expected they never take too much risk) and are not using Hi-Na
 
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Doug S

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before taiwan? is ASML/ZEISS gonna ditch taiwan to support USA instead?

interesting angle... if china takes taiwan then ASML definitely won't ship anything anymore

TSMC has been clear that they don't see a role for high NA until A10, and it isn't even certain they will use it then as they've suggested it is possible it won't become a necessity until A7 (or maybe they will do for A10 like they did for N7, where that was DUV only, then they introduced N7+ that used EUV for a few critical layers)

If you have a new machine that costs twice as much and at best does the work of two old machines (i.e. double patterning) then you aren't saving anything, and are incurring additional risk since the new machine is, well, new. TSMC seems happy to let Intel work out its teething problems for now.

Plus even if it more than lives up to its promises and Intel is able to take the process lead or the wafer cost lead that would hardly affect TSMC. Intel cannot come close to competing with TSMC's scale, and TSMC is booking new fabs out a year as fast as they can build and equip them. Even if Intel could afford to build fabs at enough scale to worry TSMC, ASML won't be able to ship enough high NA machines fast enough for it to matter in the 14A/A14 generation.
 

511

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TSMC has been clear that they don't see a role for high NA until A10, and it isn't even certain they will use it then as they've suggested it is possible it won't become a necessity until A7 (or maybe they will do for A10 like they did for N7, where that was DUV only, then they introduced N7+ that used EUV for a few critical layers)
If you have a new machine that costs twice as much and at best does the work of two old machines (i.e. double patterning) then you aren't saving anything, and are incurring additional risk since the new machine is, well, new. TSMC seems happy to let Intel work out its teething problems for now.
TSMC has more EUV than anything else so Double patterning might make sense for them also
No foundry shares this part Intel won't share the recipe and likewise another foundry even if they figure out teething problems they won't do it for others.
Plus even if it more than lives up to its promises and Intel is able to take the process lead or the wafer cost lead that would hardly affect TSMC. Intel cannot come close to competing with TSMC's scale, and TSMC is booking new fabs out a year as fast as they can build and equip them. Even if Intel could afford to build fabs at enough scale to worry TSMC, ASML won't be able to ship enough high NA machines fast enough for it to matter in the 14A/A14 generation.
Yup intel doesn't have enough of them be it HNA/EUV as for competing with Scale TSMC anyway they don't have the ecosystem and TSMC need to screw up to loose it's scale like a 10nm debacle for it to happen.