Seems highly unlikely since it wasn't designed for this. i.e. it likely has a fixed clock oscillator, and VRMs that power the SoC cores at fixed voltage levels. You'd need to replace both with something tunable. Unless those components are all external, you'd need to desolder the whole thing and replace those bits on the module then resolder it - good luck with that!
Possibly, but it is not really worth it. The best you can hope for is 5 to 10% more performance for brief times.
In order to do it you need to open up the case, and find the CPU. The m1s still have a heatsink but it will not be big enough to prevent easy overclocking.
To over clock it, boot up the machine, and spin up cinebench or whatever. Then take your taser, and apply it to the square caps just below the m1 chip, around a squarish black IC.
You may see an increase in performance very, very briefly.
It doens't have fixed anything, that SOC changes its multipliers and voltages just like any other nowadays CPU to save power and prevent overheating. Apple has prevented changing values from Apples choices - but if somebody manages to hack their implementation everything becomes possible.
Letting the magic smoke out is always a risk with overvolting.You'll definitely get a magic show with the finale being blue smoke and a dead computer, lol.
As far as we can tell from Anandtech reviews etc. it is pretty limited - i.e. going to half and quarter speed, it doesn't appear to be fine grained like Intel's scheme is.
It's probably more fine grained than Intel's, heck that's a mobile chip that needs fine grained clocking much more than desktop-chips. There was voltage vs frequency maps for Apple chips in some hw site, and when thermal limits are reached Apples chips will drop frequency in very fine grained fashion. Where do Anandtech found that chips clocking is so coarse grained?
Just look at the graphs, they have a few large changes in frequency. You don't see chips changing in frequency by 100 MHz at a time like Intel. They go like 1/2 and 1/4 the speed.
That's because Apple doesn't sacrifice their chips efficiency to opportunistic turbo speeds. So what you refer are idle, low load and full load like with Intel without turbo. But fine-graining speed is essential to thermal-limited situations, M1 would suck beyond anything if it would half it clocks as soon as thermal budget overruns. It doesn't work like that - it will downclock peacefully with few megahertz by step.
Why? You can either halve your clock for a shorter amount of time or drop it by 10% for a longer amount of time to perform an equivalent amount of work.
Maybe that's how M1 works, but I haven't seen anything to indicate that. There is plenty of evidence that's NOT how iPhone SoCs work.
Just look at the graphs, they have a few large changes in frequency. You don't see chips changing in frequency by 100 MHz at a time like Intel. They go like 1/2 and 1/4 the speed.
**** Processor usage ****
E-Cluster Power: 81 mW
E-Cluster HW active frequency: 1414 MHz
E-Cluster HW active residency: 45.90% (600 MHz: 0% 972 MHz: 49% 1332 MHz: 10% 1704 MHz: 10% 2064 MHz: 30%)
E-Cluster idle residency: 54.10%
E-Cluster instructions retired: 4.83228e+09
E-Cluster instructions per clock: 1.02094
CPU 0 frequency: 1440 MHz
CPU 0 idle residency: 65.00%
CPU 0 active residency: 35.00% (600 MHz: 0% 972 MHz: 16% 1332 MHz: 3.8% 1704 MHz: 4.6% 2064 MHz: 11%)
CPU 1 frequency: 1465 MHz
CPU 1 idle residency: 69.76%
CPU 1 active residency: 30.24% (600 MHz: 0% 972 MHz: 13% 1332 MHz: 3.3% 1704 MHz: 4.2% 2064 MHz: 9.8%)
P0-Cluster Power: 432 mW
P0-Cluster HW active frequency: 1316 MHz
P0-Cluster HW active residency: 20.58% (600 MHz: 50% 828 MHz: 1.6% 1056 MHz: 3.1% 1296 MHz: 5.1% 1524 MHz: 4.3% 1752 MHz: 4.2% 1980 MHz: 5.0% 2208 MHz: 11% 2448 MHz: 9.4% 2676 MHz: 4.0% 2904 MHz: .89% 3036 MHz: .51% 3132 MHz: .59% 3168 MHz: .23% 3228 MHz: .82%)
P0-Cluster idle residency: 79.42%
P0-Cluster instructions retired: 6.34355e+09
P0-Cluster instructions per clock: 1.70581
CPU 2 frequency: 2134 MHz
CPU 2 idle residency: 85.33%
CPU 2 active residency: 14.67% (600 MHz: .20% 828 MHz: .06% 1056 MHz: .71% 1296 MHz: 1.0% 1524 MHz: .87% 1752 MHz: 1.1% 1980 MHz: 1.2% 2208 MHz: 3.8% 2448 MHz: 2.9% 2676 MHz: 1.4% 2904 MHz: .38% 3036 MHz: .12% 3132 MHz: .15% 3168 MHz: .17% 3228 MHz: .44%)
CPU 3 frequency: 2179 MHz
CPU 3 idle residency: 90.67%
CPU 3 active residency: 9.33% (600 MHz: .04% 828 MHz: .01% 1056 MHz: .24% 1296 MHz: .72% 1524 MHz: .59% 1752 MHz: .84% 1980 MHz: .83% 2208 MHz: 2.4% 2448 MHz: 1.7% 2676 MHz: .96% 2904 MHz: .19% 3036 MHz: .11% 3132 MHz: .09% 3168 MHz: .09% 3228 MHz: .48%)
CPU 4 frequency: 2188 MHz
CPU 4 idle residency: 93.52%
CPU 4 active residency: 6.48% (600 MHz: .03% 828 MHz: .06% 1056 MHz: .07% 1296 MHz: .47% 1524 MHz: .26% 1752 MHz: .49% 1980 MHz: .50% 2208 MHz: 2.1% 2448 MHz: 1.4% 2676 MHz: .81% 2904 MHz: .08% 3036 MHz: .04% 3132 MHz: .08% 3168 MHz: .07% 3228 MHz: .07%)
CPU 5 frequency: 2276 MHz
CPU 5 idle residency: 95.46%
CPU 5 active residency: 4.54% (600 MHz: .01% 828 MHz: .00% 1056 MHz: .03% 1296 MHz: .16% 1524 MHz: .18% 1752 MHz: .22% 1980 MHz: .40% 2208 MHz: 1.5% 2448 MHz: 1.1% 2676 MHz: .77% 2904 MHz: .08% 3036 MHz: .01% 3132 MHz: .01% 3168 MHz: .04% 3228 MHz: .09%)
P1-Cluster Power: 167 mW
P1-Cluster HW active frequency: 984 MHz
P1-Cluster HW active residency: 8.83% (600 MHz: 76% 828 MHz: .43% 1056 MHz: .93% 1296 MHz: 1.1% 1524 MHz: .89% 1752 MHz: 1.1% 1980 MHz: 2.3% 2208 MHz: 5.9% 2448 MHz: 6.5% 2676 MHz: 2.6% 2904 MHz: .28% 3036 MHz: .27% 3132 MHz: .25% 3168 MHz: .21% 3228 MHz: .92%)
P1-Cluster idle residency: 91.17%
P1-Cluster instructions retired: 2.50336e+09
P1-Cluster instructions per clock: 1.95353
CPU 6 frequency: 2198 MHz
CPU 6 idle residency: 93.73%
CPU 6 active residency: 6.27% (600 MHz: .27% 828 MHz: .01% 1056 MHz: .14% 1296 MHz: .19% 1524 MHz: .12% 1752 MHz: .30% 1980 MHz: .63% 2208 MHz: 1.9% 2448 MHz: 1.3% 2676 MHz: .91% 2904 MHz: .16% 3036 MHz: .03% 3132 MHz: .01% 3168 MHz: .09% 3228 MHz: .12%)
CPU 7 frequency: 2314 MHz
CPU 7 idle residency: 96.32%
CPU 7 active residency: 3.68% (600 MHz: .04% 828 MHz: 0% 1056 MHz: .00% 1296 MHz: .06% 1524 MHz: .12% 1752 MHz: .28% 1980 MHz: .28% 2208 MHz: .84% 2448 MHz: 1.2% 2676 MHz: .58% 2904 MHz: .16% 3036 MHz: .10% 3132 MHz: .01% 3168 MHz: .01% 3228 MHz: .01%)
CPU 8 frequency: 2373 MHz
CPU 8 idle residency: 98.82%
CPU 8 active residency: 1.18% (600 MHz: .01% 828 MHz: 0% 1056 MHz: .07% 1296 MHz: .06% 1524 MHz: .00% 1752 MHz: .02% 1980 MHz: .03% 2208 MHz: .14% 2448 MHz: .36% 2676 MHz: .37% 2904 MHz: .07% 3036 MHz: .01% 3132 MHz: .01% 3168 MHz: .03% 3228 MHz: .01%)
CPU 9 frequency: 2521 MHz
CPU 9 idle residency: 99.14%
CPU 9 active residency: 0.86% (600 MHz: .01% 828 MHz: 0% 1056 MHz: .00% 1296 MHz: .01% 1524 MHz: .00% 1752 MHz: .07% 1980 MHz: .00% 2208 MHz: .08% 2448 MHz: .18% 2676 MHz: .38% 2904 MHz: .08% 3036 MHz: .00% 3132 MHz: .01% 3168 MHz: .02% 3228 MHz: .01%)
Regarding frequencies, I was curious about this so I tried checking the frequency on my iPhone 13 Pro Max. It was fixed and does NOT downclock.
I think you may need better tools. This very site has charts on the frequency ramp ups of A-series chips. Ramping up from the down clock.Regarding frequencies, I was curious about this so I tried checking the frequency on my iPhone 13 Pro Max. It was fixed and does NOT downclock.
The next time I have access to an M1 I will look into that chip.
Apple Silicon cores have set of target frequencies and switch between them very quickly. You can see it in `powermetrics` output:
Also there are some hidden details within this chips:Code:**** Processor usage **** E-Cluster Power: 81 mW E-Cluster HW active frequency: 1414 MHz E-Cluster HW active residency: 45.90% (600 MHz: 0% 972 MHz: 49% 1332 MHz: 10% 1704 MHz: 10% 2064 MHz: 30%) E-Cluster idle residency: 54.10% E-Cluster instructions retired: 4.83228e+09 E-Cluster instructions per clock: 1.02094 CPU 0 frequency: 1440 MHz CPU 0 idle residency: 65.00% CPU 0 active residency: 35.00% (600 MHz: 0% 972 MHz: 16% 1332 MHz: 3.8% 1704 MHz: 4.6% 2064 MHz: 11%) CPU 1 frequency: 1465 MHz CPU 1 idle residency: 69.76% CPU 1 active residency: 30.24% (600 MHz: 0% 972 MHz: 13% 1332 MHz: 3.3% 1704 MHz: 4.2% 2064 MHz: 9.8%) P0-Cluster Power: 432 mW P0-Cluster HW active frequency: 1316 MHz P0-Cluster HW active residency: 20.58% (600 MHz: 50% 828 MHz: 1.6% 1056 MHz: 3.1% 1296 MHz: 5.1% 1524 MHz: 4.3% 1752 MHz: 4.2% 1980 MHz: 5.0% 2208 MHz: 11% 2448 MHz: 9.4% 2676 MHz: 4.0% 2904 MHz: .89% 3036 MHz: .51% 3132 MHz: .59% 3168 MHz: .23% 3228 MHz: .82%) P0-Cluster idle residency: 79.42% P0-Cluster instructions retired: 6.34355e+09 P0-Cluster instructions per clock: 1.70581 CPU 2 frequency: 2134 MHz CPU 2 idle residency: 85.33% CPU 2 active residency: 14.67% (600 MHz: .20% 828 MHz: .06% 1056 MHz: .71% 1296 MHz: 1.0% 1524 MHz: .87% 1752 MHz: 1.1% 1980 MHz: 1.2% 2208 MHz: 3.8% 2448 MHz: 2.9% 2676 MHz: 1.4% 2904 MHz: .38% 3036 MHz: .12% 3132 MHz: .15% 3168 MHz: .17% 3228 MHz: .44%) CPU 3 frequency: 2179 MHz CPU 3 idle residency: 90.67% CPU 3 active residency: 9.33% (600 MHz: .04% 828 MHz: .01% 1056 MHz: .24% 1296 MHz: .72% 1524 MHz: .59% 1752 MHz: .84% 1980 MHz: .83% 2208 MHz: 2.4% 2448 MHz: 1.7% 2676 MHz: .96% 2904 MHz: .19% 3036 MHz: .11% 3132 MHz: .09% 3168 MHz: .09% 3228 MHz: .48%) CPU 4 frequency: 2188 MHz CPU 4 idle residency: 93.52% CPU 4 active residency: 6.48% (600 MHz: .03% 828 MHz: .06% 1056 MHz: .07% 1296 MHz: .47% 1524 MHz: .26% 1752 MHz: .49% 1980 MHz: .50% 2208 MHz: 2.1% 2448 MHz: 1.4% 2676 MHz: .81% 2904 MHz: .08% 3036 MHz: .04% 3132 MHz: .08% 3168 MHz: .07% 3228 MHz: .07%) CPU 5 frequency: 2276 MHz CPU 5 idle residency: 95.46% CPU 5 active residency: 4.54% (600 MHz: .01% 828 MHz: .00% 1056 MHz: .03% 1296 MHz: .16% 1524 MHz: .18% 1752 MHz: .22% 1980 MHz: .40% 2208 MHz: 1.5% 2448 MHz: 1.1% 2676 MHz: .77% 2904 MHz: .08% 3036 MHz: .01% 3132 MHz: .01% 3168 MHz: .04% 3228 MHz: .09%) P1-Cluster Power: 167 mW P1-Cluster HW active frequency: 984 MHz P1-Cluster HW active residency: 8.83% (600 MHz: 76% 828 MHz: .43% 1056 MHz: .93% 1296 MHz: 1.1% 1524 MHz: .89% 1752 MHz: 1.1% 1980 MHz: 2.3% 2208 MHz: 5.9% 2448 MHz: 6.5% 2676 MHz: 2.6% 2904 MHz: .28% 3036 MHz: .27% 3132 MHz: .25% 3168 MHz: .21% 3228 MHz: .92%) P1-Cluster idle residency: 91.17% P1-Cluster instructions retired: 2.50336e+09 P1-Cluster instructions per clock: 1.95353 CPU 6 frequency: 2198 MHz CPU 6 idle residency: 93.73% CPU 6 active residency: 6.27% (600 MHz: .27% 828 MHz: .01% 1056 MHz: .14% 1296 MHz: .19% 1524 MHz: .12% 1752 MHz: .30% 1980 MHz: .63% 2208 MHz: 1.9% 2448 MHz: 1.3% 2676 MHz: .91% 2904 MHz: .16% 3036 MHz: .03% 3132 MHz: .01% 3168 MHz: .09% 3228 MHz: .12%) CPU 7 frequency: 2314 MHz CPU 7 idle residency: 96.32% CPU 7 active residency: 3.68% (600 MHz: .04% 828 MHz: 0% 1056 MHz: .00% 1296 MHz: .06% 1524 MHz: .12% 1752 MHz: .28% 1980 MHz: .28% 2208 MHz: .84% 2448 MHz: 1.2% 2676 MHz: .58% 2904 MHz: .16% 3036 MHz: .10% 3132 MHz: .01% 3168 MHz: .01% 3228 MHz: .01%) CPU 8 frequency: 2373 MHz CPU 8 idle residency: 98.82% CPU 8 active residency: 1.18% (600 MHz: .01% 828 MHz: 0% 1056 MHz: .07% 1296 MHz: .06% 1524 MHz: .00% 1752 MHz: .02% 1980 MHz: .03% 2208 MHz: .14% 2448 MHz: .36% 2676 MHz: .37% 2904 MHz: .07% 3036 MHz: .01% 3132 MHz: .01% 3168 MHz: .03% 3228 MHz: .01%) CPU 9 frequency: 2521 MHz CPU 9 idle residency: 99.14% CPU 9 active residency: 0.86% (600 MHz: .01% 828 MHz: 0% 1056 MHz: .00% 1296 MHz: .01% 1524 MHz: .00% 1752 MHz: .07% 1980 MHz: .00% 2208 MHz: .08% 2448 MHz: .18% 2676 MHz: .38% 2904 MHz: .08% 3036 MHz: .00% 3132 MHz: .01% 3168 MHz: .02% 3228 MHz: .01%)
You checked something wrong. Apple mobile CPUs have even more flexible frequency scheduling: https://www.anandtech.com/show/13392/the-iphone-xs-xs-max-review-unveiling-the-silicon-secrets/6
Apple Silicon cores have set of target frequencies and switch between them very quickly. You can see it in `powermetrics` output:
Also there are some hidden details within this chips:Code:**** Processor usage **** E-Cluster Power: 81 mW E-Cluster HW active frequency: 1414 MHz E-Cluster HW active residency: 45.90% (600 MHz: 0% 972 MHz: 49% 1332 MHz: 10% 1704 MHz: 10% 2064 MHz: 30%) E-Cluster idle residency: 54.10% E-Cluster instructions retired: 4.83228e+09 E-Cluster instructions per clock: 1.02094 CPU 0 frequency: 1440 MHz CPU 0 idle residency: 65.00% CPU 0 active residency: 35.00% (600 MHz: 0% 972 MHz: 16% 1332 MHz: 3.8% 1704 MHz: 4.6% 2064 MHz: 11%) CPU 1 frequency: 1465 MHz CPU 1 idle residency: 69.76% CPU 1 active residency: 30.24% (600 MHz: 0% 972 MHz: 13% 1332 MHz: 3.3% 1704 MHz: 4.2% 2064 MHz: 9.8%) P0-Cluster Power: 432 mW P0-Cluster HW active frequency: 1316 MHz P0-Cluster HW active residency: 20.58% (600 MHz: 50% 828 MHz: 1.6% 1056 MHz: 3.1% 1296 MHz: 5.1% 1524 MHz: 4.3% 1752 MHz: 4.2% 1980 MHz: 5.0% 2208 MHz: 11% 2448 MHz: 9.4% 2676 MHz: 4.0% 2904 MHz: .89% 3036 MHz: .51% 3132 MHz: .59% 3168 MHz: .23% 3228 MHz: .82%) P0-Cluster idle residency: 79.42% P0-Cluster instructions retired: 6.34355e+09 P0-Cluster instructions per clock: 1.70581 CPU 2 frequency: 2134 MHz CPU 2 idle residency: 85.33% CPU 2 active residency: 14.67% (600 MHz: .20% 828 MHz: .06% 1056 MHz: .71% 1296 MHz: 1.0% 1524 MHz: .87% 1752 MHz: 1.1% 1980 MHz: 1.2% 2208 MHz: 3.8% 2448 MHz: 2.9% 2676 MHz: 1.4% 2904 MHz: .38% 3036 MHz: .12% 3132 MHz: .15% 3168 MHz: .17% 3228 MHz: .44%) CPU 3 frequency: 2179 MHz CPU 3 idle residency: 90.67% CPU 3 active residency: 9.33% (600 MHz: .04% 828 MHz: .01% 1056 MHz: .24% 1296 MHz: .72% 1524 MHz: .59% 1752 MHz: .84% 1980 MHz: .83% 2208 MHz: 2.4% 2448 MHz: 1.7% 2676 MHz: .96% 2904 MHz: .19% 3036 MHz: .11% 3132 MHz: .09% 3168 MHz: .09% 3228 MHz: .48%) CPU 4 frequency: 2188 MHz CPU 4 idle residency: 93.52% CPU 4 active residency: 6.48% (600 MHz: .03% 828 MHz: .06% 1056 MHz: .07% 1296 MHz: .47% 1524 MHz: .26% 1752 MHz: .49% 1980 MHz: .50% 2208 MHz: 2.1% 2448 MHz: 1.4% 2676 MHz: .81% 2904 MHz: .08% 3036 MHz: .04% 3132 MHz: .08% 3168 MHz: .07% 3228 MHz: .07%) CPU 5 frequency: 2276 MHz CPU 5 idle residency: 95.46% CPU 5 active residency: 4.54% (600 MHz: .01% 828 MHz: .00% 1056 MHz: .03% 1296 MHz: .16% 1524 MHz: .18% 1752 MHz: .22% 1980 MHz: .40% 2208 MHz: 1.5% 2448 MHz: 1.1% 2676 MHz: .77% 2904 MHz: .08% 3036 MHz: .01% 3132 MHz: .01% 3168 MHz: .04% 3228 MHz: .09%) P1-Cluster Power: 167 mW P1-Cluster HW active frequency: 984 MHz P1-Cluster HW active residency: 8.83% (600 MHz: 76% 828 MHz: .43% 1056 MHz: .93% 1296 MHz: 1.1% 1524 MHz: .89% 1752 MHz: 1.1% 1980 MHz: 2.3% 2208 MHz: 5.9% 2448 MHz: 6.5% 2676 MHz: 2.6% 2904 MHz: .28% 3036 MHz: .27% 3132 MHz: .25% 3168 MHz: .21% 3228 MHz: .92%) P1-Cluster idle residency: 91.17% P1-Cluster instructions retired: 2.50336e+09 P1-Cluster instructions per clock: 1.95353 CPU 6 frequency: 2198 MHz CPU 6 idle residency: 93.73% CPU 6 active residency: 6.27% (600 MHz: .27% 828 MHz: .01% 1056 MHz: .14% 1296 MHz: .19% 1524 MHz: .12% 1752 MHz: .30% 1980 MHz: .63% 2208 MHz: 1.9% 2448 MHz: 1.3% 2676 MHz: .91% 2904 MHz: .16% 3036 MHz: .03% 3132 MHz: .01% 3168 MHz: .09% 3228 MHz: .12%) CPU 7 frequency: 2314 MHz CPU 7 idle residency: 96.32% CPU 7 active residency: 3.68% (600 MHz: .04% 828 MHz: 0% 1056 MHz: .00% 1296 MHz: .06% 1524 MHz: .12% 1752 MHz: .28% 1980 MHz: .28% 2208 MHz: .84% 2448 MHz: 1.2% 2676 MHz: .58% 2904 MHz: .16% 3036 MHz: .10% 3132 MHz: .01% 3168 MHz: .01% 3228 MHz: .01%) CPU 8 frequency: 2373 MHz CPU 8 idle residency: 98.82% CPU 8 active residency: 1.18% (600 MHz: .01% 828 MHz: 0% 1056 MHz: .07% 1296 MHz: .06% 1524 MHz: .00% 1752 MHz: .02% 1980 MHz: .03% 2208 MHz: .14% 2448 MHz: .36% 2676 MHz: .37% 2904 MHz: .07% 3036 MHz: .01% 3132 MHz: .01% 3168 MHz: .03% 3228 MHz: .01%) CPU 9 frequency: 2521 MHz CPU 9 idle residency: 99.14% CPU 9 active residency: 0.86% (600 MHz: .01% 828 MHz: 0% 1056 MHz: .00% 1296 MHz: .01% 1524 MHz: .00% 1752 MHz: .07% 1980 MHz: .00% 2208 MHz: .08% 2448 MHz: .18% 2676 MHz: .38% 2904 MHz: .08% 3036 MHz: .00% 3132 MHz: .01% 3168 MHz: .02% 3228 MHz: .01%)
You checked something wrong. Apple mobile CPUs have even more flexible frequency scheduling: https://www.anandtech.com/show/13392/the-iphone-xs-xs-max-review-unveiling-the-silicon-secrets/6
I have no doubt there is something wrong. My phone is not rooted, and my only source are apps from the app store. All of the apps I tried show no variation in CPU frequency. I also think that if the frequency were actually fixed, it would be a silly oversight by Apple.
You checked something wrong. Apple mobile CPUs have even more flexible frequency scheduling: https://www.anandtech.com/show/13392/the-iphone-xs-xs-max-review-unveiling-the-silicon-secrets/6
It is very likely using fixed clock multipliers / dividers for everything, so speeding up the CPU might also speed up the LPDDR5, PCIe, and USB among others. Bumping the voltage may bump the voltage elsewhere in undesirable ways.
Apple is and has always been a closed ecosystem. It's the reason I gravitated to x86 so many years ago. I like to know what's going on under the hood, be able to adjust things, build my own system with parts I select.
Trying to overclock an Apple computer would be like trying to overclock a Dell laptop that has a BIOS with no selectable options.
On the upside everything is set for you and those types of rigs are extremely stable and hard to mess up.