Discussion Intel's past, present and future

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Geddagod

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Which is not that impressive for a huge core with revolutionary ideas in 2028.
Would be the highest IPC core even in 2028.
They go together, because it means more transistors. And Apple cores are smaller too, while being faster and lower power.
It hurts Vmin, sure, but even server parts run well above Vmin of current Intel cores
Also, Apple has the largest cores in the industry rn. They are faster and lower power precisely because the cores are so large- both physically and microarchitecturally
Or... it was a disappointment.
Too much points to the contrary.
It also assumes he is infallible.
Which is why it wasn't my whole argument lol
Also, they were talking about how Skymont was targetted by Keller to go head to head against Zen 5. And the "12-wide" core he was said to be working on is likely Arctic Wolf.
Don't recall this. But sure.
 
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Joe NYC

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Also, personally, I think the challenge is that the interconnect technology is immature rather than the physical FOVEROS technology.
Rather, it seems that FOVEROS has a high degree of perfection.

Considering how conservative AMD has been with costs on client products, only using dirt cheap substrate interconnect for its chiplets until Strix Halo, and then, with Strix Halo, only using the most economical technology, Intel decided to dive in head first, with the highest end (and highest cost) 2.5D technology.

And Intel also seems to have invested heavily in this packaging technology, so there is not really any alternative to using it (as in using outside packaging house for InFO instead). The money is already sunk.
 
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Io Magnesso

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Considering how conservative AMD has been with costs on client products, only using dirt cheap substrate interconnect for its chiplets until Strix Halo, and then, with Strix Halo, only using the most economical technology, Intel decided to dive in head first, with the highest end (and highest cost) 2.5D technology.

And Intel also seems to have invested heavily in this packaging technology, so there is not really any alternative to using it (as in using outside packaging house for InFO instead). The money is already sunk.
No, FOVEROS is not 2.5D
FOVEROS is 3D
 

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Geddagod

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And Intel also seems to have invested heavily in this packaging technology, so there is not really any alternative to using it (as in using outside packaging house for InFO instead). The money is already sunk.
I've always wondered why they didn't use EMIB instead
 

Joe NYC

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No, FOVEROS is not 2.5D
FOVEROS is 3D

None of these reflect the type of Foveros packaging Intel is using in Meteor, Lunar, Arrow, Panther...

Intel is using "Base Tile" which is most similar to CoWoS packaging. Can Intel produce it much cheaper than Taiwanese? I doubt it.

1753065583640.png
 

fastandfurious6

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Jun 1, 2024
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I think FOVEROS means something like TERROR in Greek

and notoriously their fast chip r&d was in a terrorist state (as someone stated here, that dep won't last much longer for obvious reasons)

they may have brought it upon them... retribution!
 
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Joe NYC

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I've always wondered why they didn't use EMIB instead

EMIB only works with 2 adjacent tiles, and Intel seemed to aim for more flexible, any to any tile communication that the Foveros offers.

You could say the same for AMD Strix Halo, EMIB like technology could have sufficed, but perhaps AMD is also looking for flexibility in future products.

Also, once you start adding multiple EMIB bridges, the cost, and complexity probably start to approach that of a full base die / wafer. Sapphire Rapids wen overboard with EMIB, IIRC.
 
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johnsonwax

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Jun 27, 2024
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Some? , Is it just about "some"?
Is that all?
It's enough, I'm tired
Why so much...? Do you want to push Apple to the front? It's not just Apple, customers
Well, I haven't heard that the cost of building a TSMC factory comes from a customer's advance payment… Where is the evidence?
I point out Apple because I know Apple - I have invested in Apple and tracked how they operate for almost 30 years now. If I knew AMD I might offer AMD. I don't know what AMD does in terms of prepayment agreements, but we know Apple didn't reserve all of TSMCs 2nm capacity, so presumably Qualcomm who has some of it also prepayed. We know Intel did in a hybrid sense because they also sent some of their equipment over. The point is that TSMC didn't have to reach into their own coffers for that whole fab - Apple gave them cash upfront, Qualcomm likely gave them cash upfront. We know AMD and Nvidia also do prepayment agreements with foundries - how much and to whom I don't actively track, and what their strategy is I can only guess at.

We know that TSMC reported billions in prepayments a few months prior to their 5nm production which was a substanital fraction of the cost of that fab. That's not a subsidy to TSMC, it's a loan repaid in product. In most cases that prepayment money isn't actually 'paying' for the 5nm fab but likely the one after that. But it doesn't matter to TSMC - it's a guaranteed purchase agreement, paid up front. It's capital they don't need have secured by other means. It's a stretching of cashflow ahead of costs.

So long as TSMC isn't taking a loss on the fab, everything is getting paid for - the issue is when. If you need to pay $28B to initiate production that will net you $40B in revenue, that's a no-brainer unless you can't get $28B, and then you're dead in the water. Prepayment smooths out that cost issue by using your customers as financiers in exchange for a risk trade - they don't know the yields, so they don't know the efficiency of that spending (customer pays for yield) but in return, they get production guarantees, so they know when components are going to arrive, customers have cash they want to put to use, and the manufacturer has use for the cash. That's the trade. Customers agree to this because it's a part of competition - someone started this trend in the industry and had the effect of sometimes freezing competition out, so it became something of the norm where your costs are heavily front-loaded that customers prepay in order to not get frozen out.

Intel's challenge is that getting the process started is the hard part - because prepayment comes with a degree of belief in the company paying that it's a good investment (see GT Advanced Technologies as an example of when Apple gets it really wrong). But once you get it rolling, and get those customer commitments, it smooths out your spending.

If the cost of fabs wasn't climbing, this trend could maybe stall out - the manufacturer would be constantly throwing enough cash off to pay for the next factory, but even with the kind of margins in the industry, that gets tricky. And if you need to borrow $28B who do you borrow it from? The largest ever corporate loan was $17B secured across a few dozen financial institutions. You can't really borrow that kind of cash except from governments. The reason the US bailed the auto industry out in 2007 was because only one US entity had that much cash available other than the US government and it wasn't a bank. I won't mention who that was. There was literally nobody else to bail them out other than the taxpayer.

The point is that you don't pay for $20B things by just reaching into your pockets as was suggested. You're going to recruit your customers into that, you may do some traditional financing, you may do some goverment financing. These aren't commodities being made - they're production specific to the customer, and the customer is going to have the opportunity for a role. Those that don't have the cash will pay later, and probably pay more. Those that do will pay up front and probably pay less. Sorry if that's how the industry often works. Sorry if it makes you tired.
 

511

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It is not just the CPU tile (and I am not sure I agree with 18A cost being the same as Intel 7, there is a lot of very expensive equipment and fabs to depreciate).

The problem is that Intel is adding all these other tiles and expensive packaging.

I have not seen any analysis of this, but my opinion is that the Foveros packaging Intel is using is very similar to CoWoS, and its cost should then also be in same range (not cheap). And this is being sold not for $20,000, like datacenter GPUs but $200 CPUs.



If you consider the size of the performance gap Intel will likely face in 2028, it will be another leapfrog-like attempt, to bridge that gap in on generation.
This base interposer is 200mm2 22FFL it's not that expensive as you think it's expensive for sure but have you thought that If they went monolithic would the cost be higher or lower?
 
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511

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40% improvement per clock at 13mm2, which is basically triple Lion Cove, while being clocked lower.

So you know the criticism against the P cores vs E cores? Now repeat that, except the P is Royal Core, and the E is Lion Cove.
It was 40% ST the IPC was 2X of Raptor cove lol
 

Joe NYC

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This base interposer is 200mm2 22FFL it's not that expensive as you think it's expensive for sure but have you thought that If they went monolithic would the cost be higher or lower?

The alternative was chiplet interconnect through substrate (as AMD used up to Zen 5) or InFO, which appears to be a lot more cost efficient.
 

511

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The alternative was chiplet interconnect through substrate (as AMD used up to Zen 5) or InFO, which appears to be a lot more cost efficient.
It's still worse than Foveros though not to mention they have packing capacity so they are simply using them it would be a loss in utilization if they don't use their own packing.
Also I don't remember Intel having InFo in their packing stack.
 

Geddagod

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I would likely get banned there by the trigger-happy Intel Reddit moderators in a nanosecond, so no point...
It's lowkey chill. I think the moderation on reddit is better than on here.
I think that may be the case in "client productivity" applications.

But in server / workstation / desktop gaming, the gap is quite wide.
Considering LNC in client doesn't have AVX-512, the gap is quite artificial there. It's not for Intel not being able to, it's them not bothering to do so. Besides, we might get AVX-512 back in NVL, according to the rumor mill.
 
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DavidC1

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It was 40% ST the IPC was 2X of Raptor cove lol
In 2028, with 13mm2 size in 20A. Lion Cove was 3.4mm2 on N3B. Roughly 3x. This means transistor count has also grown, thus power will also go up substantially as well. They aren't making up for that difference with frequency and voltage scaling, plus it's a deal breaker for server chips, unless they want a hybrid config.
 

511

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In 2028, with 13mm2 size in 20A. Lion Cove was 3.4mm2 on N3B. Roughly 3x. This means transistor count has also grown, thus power will also go up substantially as well. They aren't making up for that difference with frequency and voltage scaling, plus it's a deal breaker for server chips, unless they want a hybrid config.
Oh I agree RYC was bad no matter how you look but it has been hyped by MLID like Crazy to be the saviour of Intel lol.
 

Geddagod

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Royal Core V2 (which was the core that was actually supposed to be productized) was supposed to be even better btw.
This means transistor count has also grown, thus power will also go up substantially as well. They aren't making up for that difference with frequency and voltage scaling, plus it's a deal breaker for server chips, unless they want a hybrid config.
This is not necessarily true.
Going very wide is a proven strategy, and Apple doing exactly that is why they have arguably the industries best cores rn. Apple's cores are very large, and yet they still have the best perf/watt.
It's pretty interesting, I'm assuming the entire point of RYC was to go as wide as possible and run at Vmin for servers, and then in client have insane ST performance. I don't understand why you are so insistent that this is a losing strategy.
 

DavidC1

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This is not necessarily true.
Going very wide is a proven strategy, and Apple doing exactly that is why they have arguably the industries best cores rn. Apple's cores are very large, and yet they still have the best perf/watt.
It's pretty interesting, I'm assuming the entire point of RYC was to go as wide as possible and run at Vmin for servers, and then in client have insane ST performance. I don't understand why you are so insistent that this is a losing strategy.
Because 13mm2?

That's 1700mm2 for a 128 core server chip for the cores alone. When you add caches, interconnects, hubs, memory controllers and off-die communication you are talking maybe 2500-3000mm2.

You can't rely on Vmin so much. At certain voltage levels the frequency plummets. When CPUs were 3.3V, yes they had scaling room.

You start at ~0.6V for when the transistors are barely on and about 1.2V you need to be full bore. How much scaling do you think exists there? This is 1990's thinking. At 0.6V it might run at Pentium II speeds, and at 0.95V you are at 4GHz+.
 
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DavidC1

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According to Phoronix, Arrow Lake trails 9950x by 18% and 9950x3d by 21%. Gaming is as much as 30%. Which is why I rounded to average 10% lead as a safe starting point.


View attachment 127474
These losses aren't all due to AVX. It's due to the shoddy uncore which affects gaming performance.

Gaming losses are great because even nowadays it loves a great architecture but also great memory subsystem. You can see from the review that some browser tests are faster on Ryzen, likely for the same reason.

Responsiveness, single thread, it's all about latency, which Arrowlake sucks at. AMD's Athlon 64 got 30% improvement over the predecessor and 20% of that was solely due to the integrated memory controller reducing memory latency greatly.
 

Io Magnesso

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Jun 12, 2025
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I think FOVEROS means something like TERROR in Greek

and notoriously their fast chip r&d was in a terrorist state (as someone stated here, that dep won't last much longer for obvious reasons)

they may have brought it upon them... retribution!
No
I point out Apple because I know Apple - I have invested in Apple and tracked how they operate for almost 30 years now. If I knew AMD I might offer AMD. I don't know what AMD does in terms of prepayment agreements, but we know Apple didn't reserve all of TSMCs 2nm capacity, so presumably Qualcomm who has some of it also prepayed. We know Intel did in a hybrid sense because they also sent some of their equipment over. The point is that TSMC didn't have to reach into their own coffers for that whole fab - Apple gave them cash upfront, Qualcomm likely gave them cash upfront. We know AMD and Nvidia also do prepayment agreements with foundries - how much and to whom I don't actively track, and what their strategy is I can only guess at.

We know that TSMC reported billions in prepayments a few months prior to their 5nm production which was a substanital fraction of the cost of that fab. That's not a subsidy to TSMC, it's a loan repaid in product. In most cases that prepayment money isn't actually 'paying' for the 5nm fab but likely the one after that. But it doesn't matter to TSMC - it's a guaranteed purchase agreement, paid up front. It's capital they don't need have secured by other means. It's a stretching of cashflow ahead of costs.

So long as TSMC isn't taking a loss on the fab, everything is getting paid for - the issue is when. If you need to pay $28B to initiate production that will net you $40B in revenue, that's a no-brainer unless you can't get $28B, and then you're dead in the water. Prepayment smooths out that cost issue by using your customers as financiers in exchange for a risk trade - they don't know the yields, so they don't know the efficiency of that spending (customer pays for yield) but in return, they get production guarantees, so they know when components are going to arrive, customers have cash they want to put to use, and the manufacturer has use for the cash. That's the trade. Customers agree to this because it's a part of competition - someone started this trend in the industry and had the effect of sometimes freezing competition out, so it became something of the norm where your costs are heavily front-loaded that customers prepay in order to not get frozen out.

Intel's challenge is that getting the process started is the hard part - because prepayment comes with a degree of belief in the company paying that it's a good investment (see GT Advanced Technologies as an example of when Apple gets it really wrong). But once you get it rolling, and get those customer commitments, it smooths out your spending.

If the cost of fabs wasn't climbing, this trend could maybe stall out - the manufacturer would be constantly throwing enough cash off to pay for the next factory, but even with the kind of margins in the industry, that gets tricky. And if you need to borrow $28B who do you borrow it from? The largest ever corporate loan was $17B secured across a few dozen financial institutions. You can't really borrow that kind of cash except from governments. The reason the US bailed the auto industry out in 2007 was because only one US entity had that much cash available other than the US government and it wasn't a bank. I won't mention who that was. There was literally nobody else to bail them out other than the taxpayer.

The point is that you don't pay for $20B things by just reaching into your pockets as was suggested. You're going to recruit your customers into that, you may do some traditional financing, you may do some goverment financing. These aren't commodities being made - they're production specific to the customer, and the customer is going to have the opportunity for a role. Those that don't have the cash will pay later, and probably pay more. Those that do will pay up front and probably pay less. Sorry if that's how the industry often works. Sorry if it makes you tired.

No, I'm sorry
I'd like to see evidence from others, not your words.
And Intel has not sent the equipment to TSMC,
It's just outsourced manufacturing

Come to think of it, The cost of $2 billion is
What is the cost in the range from where to what? How far is $2 billion in costs?
Even if it is called a factory, Most factories are being able to be expanded later.

I'm looking forward to your quirky claim that Moore's law is an economic trap
 
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Io Magnesso

Senior member
Jun 12, 2025
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None of these reflect the type of Foveros packaging Intel is using in Meteor, Lunar, Arrow, Panther...

Intel is using "Base Tile" which is most similar to CoWoS packaging. Can Intel produce it much cheaper than Taiwanese? I doubt it.

View attachment 127486
No, stacking upwards…
It's definitely 3D Chip Red
And that doesn't mean that FOVEROS is more expensive than the one made in Taiwan.
The fact is that it is more expensive than the current AMD packaging. I Just that
 

QuickyDuck

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Nov 6, 2023
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Depend on what's on the base tile, Foveros can be either 2.5D or 3D packaging.

The problem is Intel already built extensive Foveros capacity based on their aggressive tile roadmap.
It would be very expensive if they don't use Foveros.