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Intel Skylake / Kaby Lake

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Saylick

Senior member
Sep 10, 2012
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Nice find!

The image in the article from Intel more or less confirms what we're seeing in the die shot.


^ I'm guessing the portions on the 2nd Column, 1st and 4th Row are Uncore.

From AT's article (via Ian Cutress):
It is clear that there are repeated segments: four rows of five, indicating the presence of a dual ring bus arrangement. A quick glance might suggest a 20 core design, but if we look at the top and bottom segments of the second column from the left: these cores are designed slightly differently. Are these actual cores? Are they different because they support AVX-512 (a topic discussed later), or are they non-cores, providing die area for something else? So is this an 18-core silicon die or a 20-core silicon die? We’ve asked Intel for clarification, but we were told to await more information when the processor is launched. Answers on a tweet @IanCutress, please.
 

jpiniero

Diamond Member
Oct 1, 2010
8,494
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Have to agree it's 10/18/28. Whatever that is, those two blocks are not a core for sure.

I'm guessing the portions on the 2nd Column, 1st and 4th Row are Uncore.
From AT's article (via Ian Cutress):
That'd be kind of a weird place to put it. Maybe some sort of secret FPGA or fixed function for the cloud guys? It would be kind of a lot of space to spend on that though.
 

wildhorse2k

Member
May 12, 2017
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The picture of 7980XE shows place for 20 nodes with 18 of them being cores and 2 memory controllers (those 2 look a lot different) in the mesh, in accordance with https://www.pcper.com/news/Processors/Intel-Skylake-X-and-Skylake-SP-Utilize-Mesh-Architecture-Inter-Chip-Communication .

So in fact MCC does allow 20 cores, but you need memory controllers too, therefore can't fit 20 cores on it, only 18.
This means LCC will have space for 12 cores (we don't have picture of it, but I assume it will look like MCC with the 2 rightmost columns missing) and 2 nodes will be memory controllers again so 10 cores.

I hope this clears the confusion whether the 12C will be LCC or MCC. It will be MCC.

A better article is here http://www.tomshardware.com/news/intel-mesh-architecture-skylake-x-hedt,34806.html
 
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WingZero30

Member
May 1, 2017
29
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The picture of 7980XE shows place for 20 nodes with 18 of them being cores and 2 memory controllers (those 2 look a lot different) in the mesh, in accordance with https://www.pcper.com/news/Processors/Intel-Skylake-X-and-Skylake-SP-Utilize-Mesh-Architecture-Inter-Chip-Communication .

So in fact MCC does allow 20 cores, but you need memory controllers too, therefore can't fit 20 cores on it, only 18.
This means LCC will have space for 12 cores (we don't have picture of it, but I assume it will look like MCC with the 2 rightmost columns missing) and 2 nodes will be memory controllers again so 10 cores.

I hope this clears the confusion whether the 12C will be LCC or MCC. It will be MCC.
Nice observation and analysis
 

JoeRambo

Senior member
Jun 13, 2013
913
648
136
This means LCC will have space for 12 cores (we don't have picture of it, but I assume it will look like MCC with the 2 rightmost columns missing) and 2 nodes will be memory controllers again so 10 cores.
It would make more sense to cut bottom and right columns completely and have a nice square LCC die of 10C and 2mem controllers. But yeah, end result is the same, 10C on LCC.

But of course with mesh architecture it is no longer relevant if die is LCC or MCC and MCC in fact will probably improve performance by virtue of having almost 2xLLC cache.
 

Timmah!

Senior member
Jul 24, 2010
735
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The picture of 7980XE shows place for 20 nodes with 18 of them being cores and 2 memory controllers (those 2 look a lot different) in the mesh, in accordance with https://www.pcper.com/news/Processors/Intel-Skylake-X-and-Skylake-SP-Utilize-Mesh-Architecture-Inter-Chip-Communication .

So in fact MCC does allow 20 cores, but you need memory controllers too, therefore can't fit 20 cores on it, only 18.
This means LCC will have space for 12 cores (we don't have picture of it, but I assume it will look like MCC with the 2 rightmost columns missing) and 2 nodes will be memory controllers again so 10 cores.

I hope this clears the confusion whether the 12C will be LCC or MCC. It will be MCC.

A better article is here http://www.tomshardware.com/news/intel-mesh-architecture-skylake-x-hedt,34806.html
So you assume that there will be 2 memory controllers for 10 cores on LCC? Did BW-E have 2 of them too?

@TahoeDust> Zdenek Obrmaier, the czech tech journalist. I assumed he is fairly known even on english speaking boards like this.
 

Sweepr

Diamond Member
May 12, 2006
5,151
1,127
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Nice find! Link to the full Intel blog post (by Akhilesh Kumar) below:

Intel said:
The Intel® Xeon® Scalable processors implement an innovative “mesh” on-chip interconnect topology that delivers low latency and high bandwidth among cores, memory, and I/O controllers. Figure 1 shows a representation of the mesh architecture where cores, on-chip cache banks, memory controllers, and I/O controllers are organized in rows and columns, with wires and switches connecting them at each intersection to allow for turns. By providing a more direct path than the prior ring architectures and many more pathways to eliminate bottlenecks, the mesh can operate at a lower frequency and voltage and can still deliver very high bandwidth and low latency. This results in improved performance and greater energy efficiency similar to a well-designed highway system that lets traffic flow at the optimal speed without congestion.
https://itpeernetwork.intel.com/intel-mesh-architecture-data-center

Up to 28C/56T, AVX-512, native dies with mesh architecture, all-core Turbos >3.2 GHz (14nm+), among other changes from Broadwell-EP.
 

Atari2600

Golden Member
Nov 22, 2016
1,224
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I believe it is with SMT, but same number of cores/threads. AMD themselves uses that 7% number a lot too when doing comparisons. I've also seen articles that only measured single core with similar results but I can't find them at the moment. I'd be happy to be pointed to some better analysis, but that is what I recall from when I was doing Ryzen research.
Stumbled across this and thought it might be useful to link back.

In cinebench at least, it looks like the 7% is without SMT. With SMT, Zen is actually slightly ahead of Kaby Lake in IPC.
 

JoeRambo

Senior member
Jun 13, 2013
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648
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Stumbled across this and thought it might be useful to link back.

In cinebench at least, it looks like the 7% is without SMT. With SMT, Zen is actually slightly ahead of Kaby Lake in IPC.
In apples to apples it is ~10% ST in Cinebench.

https://www.extremetech.com/computing/247463-amds-ryzen-5-1500x-1600x-reviewed-taking-fight-intel-mid-range-market

I like this review cause it is running both contenders as people would run them ~DDR3200 and one can see the following interesting points:

1) 7500 with DDR4 @2400 gets destroyed by SMT enabled 7700K with 3200 mem. 7700 is almost TWICE as fast in some of the tasks.
2) Handbrake tests show that program is coded to make use of Intel's CPU resources in vector processing ( full 256bit path ), Ryzen has quite a disadvantage here. So 8 core RYZEN vs 8 core Intel will be at same IPC dissadvantage in those types of apps.
3) Something in Dolphin emu code does not like Ryzen CPU, giving Intel unexpected IPC advantage ( one that could go away with some optimization ).
4) And in games results speak for themselves, 3200 mem equipped 7700K is a beast that is up to 50% faster. ( i know all frames rates are "playable" but CIV turn speed or EU4 sim speed matters)
 

tamz_msc

Platinum Member
Jan 5, 2017
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In apples to apples it is ~10% ST in Cinebench.

https://www.extremetech.com/computing/247463-amds-ryzen-5-1500x-1600x-reviewed-taking-fight-intel-mid-range-market

I like this review cause it is running both contenders as people would run them ~DDR3200 and one can see the following interesting points:

1) 7500 with DDR4 @2400 gets destroyed by SMT enabled 7700K with 3200 mem. 7700 is almost TWICE as fast in some of the tasks.
2) Handbrake tests show that program is coded to make use of Intel's CPU resources in vector processing ( full 256bit path ), Ryzen has quite a disadvantage here. So 8 core RYZEN vs 8 core Intel will be at same IPC dissadvantage in those types of apps.
3) Something in Dolphin emu code does not like Ryzen CPU, giving Intel unexpected IPC advantage ( one that could go away with some optimization ).
4) And in games results speak for themselves, 3200 mem equipped 7700K is a beast that is up to 50% faster. ( i know all frames rates are "playable" but CIV turn speed or EU4 sim speed matters)
Handbrake H.264 doesn't scale very well with cores, plus it is obviously going to depend on the file being encoded. Hence focusing on results from one website doesn't tell the whole story.
 
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JoeRambo

Senior member
Jun 13, 2013
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Handbrake H.264 doesn't scale very well with cores, plus it is obviously going to depend on the file being encoded. Hence focusing on results from one website doesn't tell the whole story.
And? Not every workload is fully parallelizable, and we are discusing "IPC" here, 1C vs 1C. If anything x264 developers are considered optimization demigods, cause substantial percentage of their app is in optimized assembler code.
The "whole" story should include factors like pricing etc. But claiming that Ryzen is within 7% ST of Skylake is not true in quite "a few" workloads either.
 

tamz_msc

Platinum Member
Jan 5, 2017
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And? Not every workload is fully parallelizable, and we are discusing "IPC" here, 1C vs 1C. If anything x264 developers are considered optimization demigods, cause substantial percentage of their app is in optimized assembler code.
The "whole" story should include factors like pricing etc. But claiming that Ryzen is within 7% ST of Skylake is not true in quite "a few" workloads either.

Divide the the frame/s score with the base clocks, the 7700K is ~9% ahead of the 1500X in terms of IPC. The "whole story" in this case means focusing on one result instead of looking at the bigger picture.
 
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tamz_msc

Platinum Member
Jan 5, 2017
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Picking one point of four, ignoring "apples to apples" part and then blaming someone for "not looking at bigger picture" ? o_O
This is apples to apples as well, tested at DDR4 2400 CL15. H.264 is a more representative example than Dolphin because there are far more people doing video transcodes than Dolphin emulation.

"Gaming" isn't a good way of measuring IPC.
 

Sweepr

Diamond Member
May 12, 2006
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Hexus (broke the NDA?) posted some tests:







''...a 10-core powerhouse offering excellent IPC performance and outstanding multi-core potential in a single $999 chip armed with plenty of overclocking headroom.''

10C Core i9-7900X beat their 10C Core i7-6950X sample by 28% @ CB R15 MT and 43.5% @ Handbrake. 4.7 GHz was possible for all cores with 1.25V, which improved performance by ~14% in Cinebench. They didn't disclose the MB or BIOS they got to test, and some results hint it might not be 'final work' - probably explains why it was posted this early.

At the time of writing we can only put this down to a lack of software maturity. In the interests of full disclosure, readers should note that the Core i9-7900X initially scored just 4,015 in the VRMark test and the result climbed to 10,191 courtesy of a new motherboard BIOS. There's clearly still work being done to optimise performance.
http://hexus.net/tech/reviews/cpu/107017-intel-core-i9-7900x-14nm-skylake-x/

Anyway, nice teaser for the more in-depth / technical reviews on monday.
 
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