It requires a big uArch improvement without faster memory, same GPU cache size and same amount of shader units. With Razor Lake they could add more Xe3p units if it has LPDDR6 support.
Pantherlake has essentially minimal memory increases too. 13% is nothing. It will probably be 5% in average. But Xe3 makes caches and memory bandwidth efficient.
N2 is even worse. They could have got something like 16 Xe cores and got another big gain. I would hope the 12 Xe core version is 50% faster then.
@regen1 It's only good in a vacuum. The competitor is RDNA5. Canis shows that RDNA5 is a substantial improvement that'll likely make Xe3P irrelevant, hence my claim it'll be like PTL vs Strix but flipped with AMD having 50%+ advantage.
N2 is even worse. They could have got something like 16 Xe cores and got another big gain. I would hope the 12 Xe core version is 50% faster then.
@regen1 It's only good in a vacuum. The competitor is RDNA5. Canis shows that RDNA5 is a substantial improvement that'll likely make Xe3P irrelevant, hence my claim it'll be like PTL vs Strix but flipped with AMD having 50%+ advantage.
This is only true if they can charge much as Nvidia would have. I don't think people will like that very much. 5 series laptops are going to be $1500 at the rate we're going.
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I think people are taking @Kepler_L2 's comment a bit too literally.
Canis is a 15W TDP with a gaming performance that probably matches Panther Lake when its TDP is set to 30W.
This does not mean that Canis at 15W performs 2x faster than Panther Lake if the latter is also set to 15W. We don't know if PTL-H gains any substantial amount of gaming performance above 22W. Strix Point's gains above 22W in gaming are almost negligible, for example..
It could be that Canis' gaming performance is only ~50% faster than PTL-H when both are set to 15W. And on Canis' side that comes with a bunch of caveats that would make it inadequate to compete against PTL-H in every other PC use case: lower single-threaded CPU performance due to dense cores at lower clocks, much lower thread count that would hurt multitasking PC use, not enough PHYs and I/O for a bunch of TB4/USB4 ports, fewer display outputs, lack of dedicated high performance video codecs for 4K60 streaming, etc.
15W Canis (full focus on gaming) being similar to 30W PTL-H (general purpose chip) doesn't mean Intel couldn't design a gaming-focused monolithic N3P/18A chip with e.g. 192bit L5X, 16 Xe3, 4P + 4E cores, no NPU, etc. that would perform a lot closer to Canis at 15W in gaming FPS / frametimes.
PTL Xe3 came with 50% more units and a doubled GPU cache. Even with a larger uarch improvment on Xe3p it is not getting the same performance improvement.
ToTTenTranz, PTL 12Xe3 will gain a lot from 22W to 45W or 65W. Even Lunar Lake with much lower max iGPU clock speeds is gaining quite a bit with 30 or 37W. I think the CPU cores are too power hungry for iGPU gaming. In the early CES PTL previews on a ~60W device the budget sharing was roughly 50% for both CPU and iGPU. Maybe Intel could improve the power management over time.
ToTTenTranz, PTL 12Xe3 will gain a lot from 22W to 45W or 65W. Even Lunar Lake with much lower max iGPU clock speeds is gaining quite a bit with 30 or 37W. I think the CPU cores are too power hungry for iGPU gaming. In the early CES PTL previews on a ~60W device the budget sharing was roughly 50% for both CPU and iGPU. Maybe Intel could improve the power management over time.
I really doubt this, especially within the 45-65W range (unlike Halo). At some point the gains are bottlenecked by RAM bandwidth, so the iGPU and CPU get high clocks and consume a lot of power but they're mostly stalling for the data to come. It doesn't have a 256bit bus nor 32MB IC like Halo.
Regardless, ThePhawx seems to have some unit in his hands and he's been making a battery of tests on Panther Lake H. We should be getting news about this within the next few days.
It's not bad as Strix Halo, but it's a measurable amount. The advantage compared to Lunarlake 30W is 70-80%, and that's with PTL set at 65W. At similar power it's about ~1.5x. Meaning there's likely about 20% difference between 35W and 65W.
And we know from the Xe3 scaling graph(where it says >1.5x against Lunar) the performance is noticeably lower on lower power envelopes. Yes, the numbers aren't plotted on the graph, but we can approximate, because where Lunarlake scaling ends is likely in the ~35W range. All in all 22W to 65W is probably 35-45% difference in performance.
Pantherlake doesn't have the fancy "Infinity Cache" naming but it essentially has it's own version. 16MB for GPU for 12 Xe cores is basically 16MB IC.
I'm not saying RDNA5 will be 2x better. It's probably going to be ~1.6x, which is not a small amount. Xe3P will likely lose, unless it gets another substantial uarch advantage, made worse by the fact that Xe3P has no Xe3 core count increases.
poke01
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- Mar 8, 2022
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Buddy, that's merely semantics to me. It makes little difference. Their much larger B580 dGPU has only 18MB L2. For a mainstream market iGPU, Pantherlake has an extremely large GPU cache. They just didn't brand the thing that's all. It's like saying AMD has APUs but Intel doesn't. Actually, if AMD has APUs, so does Intel. It serves the same purpose, and their graph about the 16MB cache reducing memory traffic by 20% or something is similar to AMD's graph about IC. Strix Point has a puny 2MB cache.
Strix Halo scales because it's way more oversized thus the ideal perf/power point is much higher than Pantherlake.
At some point you need more power for CPU cores. If you want 30 fps, then 1.2GHz CPU is fine, but what if you want 60 fps, or even 100? That's only doable by a faster CPU. If what you are saying is true and they can get more performance, that's great, but that would be true mostly in the games that struggle to push frames.
@ToTTenTranz
We know the 16 Xe3P core version doesn't exist though.
It's running the iGPU at 1GHz in CP2077 at 20W, and goes up to 1.5GHz at 35W. It's 60% faster. It's pretty much linear scaling in that instance.
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embargo goes down on the 26th at 9 am apparently (est)
Honestly that's my thought too.
Maybe Intel is going balls to the wall in effort though with NVL-H. Moving the compute tile to N2, now allegedly moving the iGPU tile, the cost structure has to be buns...
So in Cyberpunk 2077 and with those particular settings, even at 35W the GPU isn't clocking to the full potential, and at 78 fps, CPU is starting to have an effect on pushing more frames. In that particular instance, 65W might be quite a bit faster than 35W, maybe to the tune of 40%.
Between 20W and 35W the iGPU clocks 50% higher.
From a Ryzen Max 385 Strix Halo at 45W and 25W in 1080p high:
In other games the iGPU clocks higher than in Cyberpunk there.
From a Ryzen Max 385 Strix Halo at 45W and 25W in 1080p high:
In other games the iGPU clocks higher than in Cyberpunk there.
Wait, I am watching the video now and missed that 20W settings are different from 35W settings. 20W is 1200p Med with Xess Quality getting 50-55 fps, and 35W is 1200p Ultra with XeSS Quality, getting 70-78 fps. That's substantial.
The 20W getting 50-55 fps with 1GHz GPU clocks. When he turns on Frame Gen, it's still 1GHz, meaning it's CPU bound already. In Cyberpunk 2077, it seems it's already bound by CPU. This is why it's using 60% CPU @mikk
The 20W getting 50-55 fps with 1GHz GPU clocks. When he turns on Frame Gen, it's still 1GHz, meaning it's CPU bound already. In Cyberpunk 2077, it seems it's already bound by CPU. This is why it's using 60% CPU @mikk
Intel confirms NVL-S is coming at the end of 2026:
So H2 seems to mean Q4 in practice.
So H2 seems to mean Q4 in practice.
Wasn't Intel not listed as N2 launch partner by TSMC? I guess they are gonna just be paper launching at EOY 2026 by binning whatever low yield they can get out of 18A before TSMC is ready to mass produce these chips. Really would be interesting to see if there is a performance difference on these different nodes.
The iGPU runs with 99% utilization, means it is almost fully GPU bound. Have a look to my Strix Halo video, the iGPU there runs with rougly 80-85% utilization, there is a CPU limitation to some degree.
Wouldn't memory bottleneck also lower compute utilization? Idk, I am not familiar with gpu reporting
The CPUs tiles are at TSMC for S/H/HX Series not 18A which is for the SoC and 4+0 compute tile
Canis/(PS 6 handheld) has only rumors going on for it? and probably comes later. Even if the rumors be taken as it is, it seems a handheld optimized SoC and 192bit LP5X ?(as per rumors) vs 128 bit LP5X on NVL-12Xe3P, not exactly apples to apples. We don't know how worthy and in what context are those perf figures are.
Mainstream (dual ch.) competition's perf, launch timing is probably more relevant.
For Xe3p it's better to wait till it releases and then see how it performs, may be good enough may be not but I don't see a point in writing it off. It for sure at least will dispel "Xe3 is a much bigger change than Xe3p is" rumor (u-arch wise that is), but let's wait and see then.
adroc_thurston
Diamond Member
- Jul 2, 2023
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yeah, RDNA5 has tiny-tiny caches.
It's PPAmaxxed to the gills.
From an engineering point, they may be correct, and maybe even 20-25% gain rumor is wrong and we'll see more.
The problem is this. Buyers don't care about how much engineering it took. They care about how much actual gains they'll get. It's like when Nvidia claimed great engineering on the 1080 to reach it's clocks. However, it was on the lower of gen-on-gen gains. Now it's perceived as good, because everything kinda deteriorated - price, power use, and availability. Maybe Xe3 takes care of more of the low-hanging fruit, thus they need more just to get the same.
This is the same with process technology. A lot less time, effort, and money took to get a new process out in the 90's and early 2000's. Now it takes more effort, more time, and more money to get LESS out than they did back then. And before it really was a shrink.
That doesn't seem like apples-to-apples to me. Just moving the costs from SoC to system.
I actually do hope Xe3P is better. Yes RDNA5 is later, but Xe4 seems to be not on the horizon, so something like late 2028, which is a year away from RDNA5. Intel needs a counter for late 2027.
fastandfurious6
Senior member
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Prophecy #175:
Nobody's gonna care about NVL / Xe graphics performance. Unless it does +100% or something crazy, it will get pulverized by Medusa
Nobody's gonna care about NVL / Xe graphics performance. Unless it does +100% or something crazy, it will get pulverized by Medusa
DrMrLordX
Lifer
- Apr 27, 2000
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People seem to be acting like they care about Panther Lake graphics. But it may all be an act since the "good" parts will not be common and it's all to distract from the CPU tile being kind of meh.
Agree that performance matters to end users more than how engineers reach there.
Xe3p on u-arch side would've finished way earlier, even Xe4 might be towards finish or final touches(yeah, physical implementation, configs, software etc. remain). Falcon Shores was Xe3p IP based. Jaguar Shores(Xe4) is tentatively H2 2027 or it may slip to 2028(or get cancelled ?). Xe4 iGPUs may be early 2029(Jan/CES) ?, but that's so far out that so many things can happen/change by then.
By early 2028(Jan/CES?), the iGPU config might have more changes (wrt no. of Xe cores, clocks, memory side), how they will compete will be seen then but that's 2 years or so from now, too far out kinda.
( Note some of narratives that were going on, at first some would say mainstream RDNA 5 iGPU was to come during/compared with PTL's 12Xe3, then changed to NVL-H's 12Xe3P, now it looks like it would come even later.
Anyway we are likely to get decent gains for iGPU perf for gaming and other productivity stuff with time from both Radeon and Intel. Also there should be some good progress on Apple's M-series side on iGPU front. )
Xe-LP for 11-14th Gen( H2 2020 onwards ) (some changes in EU counts, clocks and memory support)
Future(TENTATIVE) :
| 2023 Dec | MTL Xe_LPG | Xe IP |
| 2024 Sept | LNL Xe2_LPG | Xe2 IP |
| 2025 Jan | ARL-H Xe_LPG+ | Xe IP |
| 2026 Jan | PTL Xe3_LPG | Xe3 |
Future(TENTATIVE) :
| 2027 (Jan/Q1?) | NVL-H Xe3p_LPG and Xe3_LPG | Xe3p and Xe3 IP |
| 2028 (Jan/Q1?) or EoY 27 | GPU IP Re-use(with new config changes? ) | Xe3p IP (plus Xe3 reuse?) |
| 2029 (Jan/Q1?) or EoY 28 | Xe4 iGPU debut ? or some rumored "Xe3p V2"? |
If they use Xe3p twice (once in NVL and then in Gen after it), might not be that big issue but they need a tangible jump in Gen beyond that in whichever form.
Edit: Edited the table
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