Discussion Intel Nova Lake in H2-2026: Discussion Threads

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lemans24

Junior Member
Jul 29, 2025
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Here is all what we know about Nova Lake in terms of Improvements
  • IO tile is Intel 3
  • SoC is 18A with 4LPE Arctic Wolf cores and IMC
  • compute is N2(8+16)/18AP depending on SKU
  • GPU is 18AP/Intel 3(not totally sure about this maybe based on XE3/XE3P)
  • Xe3 Display Engines and Xe4 Media engine with professional codec support
  • minimum 70 TOPS Die waste Unit
  • Panther Cove with 4MB Shared L2 for P cores
  • Arctic Wolf E Cores(likely 20% IPC Improvements over Darkmont according to Raichu).
  • AVX 10(aka AVX -512 Support)
  • bumped up core counts for Ultra 5 will beat Ultra 9 285K easily in both ST and MT by a decent margin
  • big Last Level Cache SKU with 144MB L3 cache for a single 8+16 tiles
anything else i miss?
will there be an I/O tile at all ?? thought it would be integrated into Soc since it is 18A
 

OneEng2

Senior member
Sep 19, 2022
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Their margin pressure is due to TSMC as well plus their Fabs utilization dropping due to wafers at external.
That is certainly part of the margin issue. I believe that Intel has been subsidizing their low margin business with their high margin business for quite some time. Now, they are in a position where they are getting killed in many of their traditional high margin products.

In addition to this, Intel have embarked on a mission to compete head to head with TSMC for the cutting edge node crown........ wow. Good luck to them.

This is a prohibitively expensive venture to try to amortize across a fraction of the unit sales that TSMC has.

It's a near "perfect storm" for Intel.
 
Jul 27, 2020
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Not sure why these websites are comparing Nova Lake to a dual-X3D Zen5.
They seem to be insinuating that the bLLC chip rumor is so strong that AMD wants to increase their X3DD marketshare before Nova Lake arrives because obviously consumer dollars are limited so if they already have a decent enough chip, they may not see much reason to ditch their existing Ryzen X3DD unless the NVL bLLC chip shatters every record out there.

Due to differing caching schemes, the NVL bLLC may hypothetically have certain advantages over X3DD (some workloads may really like the Intel approach).