Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

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Tigerick

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Wildcat Lake (WCL) Preliminary Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing ADL-N. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q2/Computex 2026. In case people don't remember AlderLake-N, I have created a table below to compare the detail specs of ADL-N and WCL. Just for fun, I am throwing LNL and upcoming Mediatek D9500 SoC.

Intel Alder Lake - NIntel Wildcat LakeIntel Lunar LakeMediatek D9500
Launch DateQ1-2023Q2-2026 ?Q3-2024Q3-2025
ModelIntel N300?Core Ultra 7 268VDimensity 9500 5G
Dies2221
NodeIntel 7 + ?Intel 18-A + TSMC N6TSMC N3B + N6TSMC N3P
CPU8 E-cores2 P-core + 4 LP E-cores4 P-core + 4 LP E-coresC1 1+3+4
Threads8688
Max Clock3.8 GHz?5 GHz
L3 Cache6 MB?12 MB
TDP7 WFanless ?17 WFanless
Memory64-bit LPDDR5-480064-bit LPDDR5-6800 ?128-bit LPDDR5X-853364-bit LPDDR5X-10667
Size16 GB?32 GB24 GB ?
Bandwidth~ 55 GB/s136 GB/s85.6 GB/s
GPUUHD GraphicsArc 140VG1 Ultra
EU / Xe32 EU2 Xe8 Xe12
Max Clock1.25 GHz2 GHz
NPUNA18 TOPS48 TOPS100 TOPS ?






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As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



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cannedlake240

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Well, there is IPC, and then there is single core performance, and then there is multi-core performance, and then there is thermally limited performance.... and then there is the workload you are talking about.

I hear lots of commentary about Skymont having nearly the IPC of Lion Cove. It is my guess that what we will find is that Skymont does some things really well, and others not so much and that Lion Cove is absolutely necessary to be competitive in a lot of workloads.

Of course, it is always possible that I am wrong.
Of course. LionCove isn't some netburst level disaster and Skymont isn't Zen 3 or M1-like miracle. It's a smaller, lower clocked core that comes with its limitations
 
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Magio

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What do you mean by "IPC across different ISAs"? This is why I dislike that term. It gets people confused. When people say "IPC" they refer to performance per clock, something that doesn't matter whether it's ARM or x86.
IPC isn't performance per clock, it's instructions per clock. A CISC ISA like x86 attempts to achieve more with each instruction than a RISC ISA like ARM, so their IPCs are not directly comparable.

To be clear that's not that major a difference but it is a first meaningful caveat of the obsession with IPC. I listed other reasons why I think the hyperfocus on that single metric is not warranted, because there's so much more needed to evaluate a core than just its IPC.

This isn't meant to disparage the ARM competition, I think Oryon is a great core (I think it will really impress with N3E on the Snapdragon 8 Elite, based on early benchmarks) and Apple's P core is the best core in the industry by a mile. Both ARM and Intel need to wake up and deliver a true new start for x86. Just, the ARM cores' IPC is only one of the things that makes them impressive, not the whole story and a core like the Cortex X4 with its impressive IPC and ridiculously narrow actual usefulness is an example of that.
 
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DavidC1

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This puts Lunar Lake's Skymont very near Arrow Lake's Lion Cove with just a tiny 7% IPC difference. And I expect Arrow Lake's Skymont to have a slightly higher IPC compared to Lunar Lake's Skymont due to L3 and the ring.
The difference isn't slight. Huang's tests show 10-15% in SpecInt, while in FP it seems to be 25% or greater. C&C tests show 15-25% in Int and greater than 40% for FP.

What makes Lion Cove bad is 9% is combined Int/FP. If Lion Cove is getting additional gains from more FP units, then it means Integer gains are LOWER than 9%.
IPC isn't performance per clock, it's instructions per clock. A CISC ISA like x86 attempts to achieve more with each instruction than a RISC ISA like ARM, so their IPCs are not directly comparable.
That's why I said I dislike the term IPC, because everyone uses it differently, but to most people, including Intel "IPC" means performance per clock. Even Intel falls to the same trap.

You in this case are among the rarer ones that are using it at least more correctly.

But no one in actuality cares about Instruction part of the "IPC". They care about per clock performance. Geekbench, Spec, they all measure per clock performance, not "IPC".

@cannedlake240 Zen 3 wasn't beating top competition at fraction of that power so it's nowhere near the effort Mx was.
 
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OneEng2

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Well, in that case (for Arrow Lake), this still puts Skymont IPC extremely close to Lion Cove IPC with a difference is just 7% only.

Also, the Skymont in ARL boosts upto 4.6 GHz whereas the Lion Cove P cores go upto 5.7 GHz. Meaning, the P cores are needed only for the last mile of 1.1 GHz total (which is ~24%).

If Arctic Wolf E cores can widen the gap with the then P core with additional ~30% IPC gain, it renders the then P core almost useless (not factoring in frequency gains).

It appears that the P cores are going away sooner than we think.

View attachment 109741
Lets see how P and E cores fare in something other than SpecInt and SpecInt rate. Detailed reviews will be up soon enough. Also, 9% on top of 24% isn't a trivial difference in performance. Does it justify the huge difference in die size? Maybe not, but if Arrow Lake was made of nothing but Skymont cores, Intel fans would have quite a bit more to be sad about next week.
The difference isn't slight. Huang's tests show 10-15% in SpecInt, while in FP it seems to be 25% or greater. C&C tests show 15-25% in Int and greater than 40% for FP.

What makes Lion Cove bad is 9% is combined Int/FP. If Lion Cove is getting additional gains from more FP units, then it means Integer gains are LOWER than 9%.

That's why I said I dislike the term IPC, because everyone uses it differently, but to most people, including Intel "IPC" means performance per clock. Even Intel falls to the same trap.

You in this case are among the rarer ones that are using it at least more correctly.

But no one in actuality cares about Instruction part of the "IPC". They care about per clock performance. Geekbench, Spec, they all measure per clock performance, not "IPC".

@cannedlake240 Zen 3 wasn't beating top competition at fraction of that power so it's nowhere near the effort Mx was.
I just can't get my head around a P core that is 4 times as big, and I am guessing has 4 times the transistor budget, as an E Core can be nearly equal in performance. So what are we saying here? 1 P Core = 1.4 E Cores?
 

AcrosTinus

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Jun 23, 2024
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Oh my! Am I right when I say an average workload tends to have more int instructions than FP? Even with additional FP units, if LNC gain is only 9%, then is it safe to say LNC gains are something like int 6% & FP 12% for an average of 9%?

If thats the case, I now see why you say LNC is pathetic. No wonder it's under-performing in games which tend to rely more on P cores. This is getting real sad real fast. And I had high hopes for the P core.

Also, it's getting much clearer. It appears P cores have reached an evolutionary dead end. E cores are the future. Hope thats a good thing.
The P-Cores have been redesigned to scale into the future. Based on Intel, this is supposed to be a reset and an investment into the future. This is not for people on Zen4, Alder or Raptor, it is for the people on Zen2 or Coffee Lake.

We have to accept that big performance increases will get even more rare in the future as the node improvements slow down.

The upgrade from 11 Pro to 16 Pro was eye opening.
Another upgrade from 8700K to 13700K was crazy as well.
GPU upgrade from 980Ti to 4070Ti Super, felt like nothing, most games I play are 2D or E-Sports.

Enjoy the performance jumps the moment they happen, you might just see one or maybe two in a decade.
 

OneEng2

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I was talking about Arctic Wolf cores. A CPU with 32 Arctic Wolf cores @4.6 GHz with the exact same performance of Lion Cove cores @5.7 GHz is way batter than a CPU with super fat and power hungry and over-complicated P cores.
  • Area efficient
  • Power efficient
  • Performant
  • Extreme MT performance
Hallmarks of a good CPU.
Perhaps, but 2026 is quite a way off. In the next year and then some, Intel has to pay the bills with what they got until 18A processors can start making money for them (and hopefully 18A foundry customers can help to pay off the price of all that God awful expensive equipment).
 

OneEng2

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The P-Cores have been redesigned to scale into the future. Based on Intel, this is supposed to be a reset and an investment into the future. This is not for people on Zen4, Alder or Raptor, it is for the people on Zen2 or Coffee Lake.

We have to accept that big performance increases will get even more rare in the future as the node improvements slow down.

The upgrade from 11 Pro to 16 Pro was eye opening.
Another upgrade from 8700K to 13700K was crazy as well.
GPU upgrade from 980Ti to 4070Ti Super, felt like nothing, most games I play are 2D or E-Sports.

Enjoy the performance jumps the moment they happen, you might just see one or maybe two in a decade.
I tend to agree with you that the big improvements in performance came on the back of big improvements in process technology giving each successive design double the transistor and power budget of the previous generation.

So ..... now Intel finds itself behind the industry in process technology and must build size and power efficient CPU designs to remain competitive.

Still, as I said above, it is hard to reconcile how a single Skymont core can have 70% the performance of Lion Cove while using 1/4th the die size.
 

OneEng2

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Actually, I'm a bit surprised no one has mentioned this here. Intel has powered-up it's second High-NA recently. As of now, only 2 production High-NA EUVs are up and running in the world. Both Intel. If they play it right, they can have a nice jump over TSMC starting 14A.
Well this could go south for them as well. It is my opinion (and others) that the reason Intel got in trouble with 10nm was because they got out over their skis too far..... ie, too many risks in a single process node jump.

TSMC, at least, seems to believe that there are too many risks to go with high NA for N2.
That used to be true. But not anymore with Intel. 14900K is Intel 7. 285K is N3B which has twice the HP density as Intel 7. A massive 2 node jump. In spite of that, there isn't much performance improvement with the P core. In fact, there's regression in gaming performance (according to X/Twitter leaks), which is sacrilege.
I am finding it more and more difficult to fend off the many good points people are making about the lack luster performance improvement of Lion Cove. I would say that Lion Cove does what it does at a much lower power level that 14900K and lower clock speed. This should help in the DC and it certainly helps in the laptop market.
1/3rd the area actually. And comparing both cores at their peak clocks, Skymont has roughly ~70% the performance of LNC.
Does make you scratch your head doesn't it.
 

alcoholbob

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I tend to agree with you that the big improvements in performance came on the back of big improvements in process technology giving each successive design double the transistor and power budget of the previous generation.

So ..... now Intel finds itself behind the industry in process technology and must build size and power efficient CPU designs to remain competitive.

Still, as I said above, it is hard to reconcile how a single Skymont core can have 70% the performance of Lion Cove while using 1/4th the die size.

That's something they should aim for, but it will be a struggle for them, as historically Intel has had poor perf/watt in productivity benchmarks against AMD even with a node advantage, and it doesn't look like it's changed moving to TSMC 3nm
 
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Hulk

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A while back someone around here wrote that when we talk about IPC we are really talking about throughput at a certain frequency. Like when we say Gracemont's throughput for CB R23 is 260 point/GHz. It's a measurement of performance/frequency, like IPC, but not technically IPS.

So, we write IPC but we're generally talking about throughput.
 

511

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It's difficult to talk in terms of IPC between x86 and Arm due to variable Instructions size of x86 throughout would be a better metric Performance Per Clock would have been a better term
 
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511

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On a sidenote Panther Cove should have 20-25+% IPC Gains to justify the P Coves considering it will have APX and a Major arch changes
 

Det0x

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cannedlake240

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Redwood Cove itself was a disaster. And my respect for the P core team went away with it
Redwood cove was a disaster but Raptor, Golden coves were ok? So a tock is ok but tick is a disaster all of a sudden? Intel themselves said that Raptor cove wasn't even supposed to exist lol, Golden is the tock and Redwood is the tick it's all result of the foundry debacle
 

Hulk

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Redwood cove was a disaster but Raptor, Golden coves were ok? So a tock is ok but tick is a disaster all of a sudden? Intel themselves said that Raptor cove wasn't even supposed to exist lol, Golden is the tock and Redwood is the tick it's all result of the foundry debacle
All of these P cores are pretty comparable performance-wise to their competition so basically all P cores for the past 5 years have been a "disaster."

"Disaster" is a serious disrupting to functioning. AFAIK all of these chips actually function.
 
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