Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Preliminary Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing ADL-N. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q2/Computex 2026. In case people don't remember AlderLake-N, I have created a table below to compare the detail specs of ADL-N and WCL. Just for fun, I am throwing LNL and upcoming Mediatek D9500 SoC.

		Intel Alder Lake - N	Intel Wildcat Lake	Intel Lunar Lake		Mediatek D9500
Launch Date		Q1-2023	Q2-2026 ?	Q3-2024		Q3-2025
Model		Intel N300	?	Core Ultra 7 268V		Dimensity 9500 5G
Dies		2	2	2		1
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		TSMC N3P
CPU		8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		C1 1+3+4
Threads		8	6	8		8
Max Clock		3.8 GHz	?	5 GHz
L3 Cache		6 MB	?	12 MB
TDP		7 W	Fanless ?	17 W		Fanless
Memory		64-bit LPDDR5-4800	64-bit LPDDR5-6800 ?	128-bit LPDDR5X-8533		64-bit LPDDR5X-10667
Size		16 GB	?	32 GB		24 GB ?
Bandwidth			~ 55 GB/s	136 GB/s		85.6 GB/s
GPU		UHD Graphics		Arc 140V		G1 Ultra
EU / Xe		32 EU	2 Xe	8 Xe		12
Max Clock		1.25 GHz		2 GHz
NPU		NA	18 TOPS	48 TOPS		100 TOPS ?

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[511]

This table clearly shows N4P is better than N3B 🤣 if we take Semiwikis estimation for it than Intel 4 is on par with N5 and N3E is similar to Intel 3 in terms of PPW not area as I3 is slightly better than N5

Early reports are that customers aren't overly enthusiastic about 18a, but it hasn't actually released yet so we'll see how well it does when it lands.

Yes apparently they reduced the targets for 18A to get it on time and 18AP will be a better version but it will be on par

VLSI Technology Symposium – Intel describes i3 process, how does it measure up? - Semiwiki

At the VLSI Technology Symposium this week Intel released details on their i3 process. Over the last four nodes Intel has had an interesting process progression. In 2019, 10nm finally entered production with both high performance and high-density standard cells. 10nm went through several...

semiwiki.com

 

[DavidC1]

This table clearly shows N4P is better than N3B 🤣 if we take Semiwikis estimation for it than Intel 4 is on par with N5 and N3E is similar to Intel 3 in terms of PPW not area as I3 is slightly better than N5

They downgraded i3 too.

They initially claimed it'll have HD library and it'll have density improvements for high performance. Instead we got "HD" library which was barely smaller than i4 and nothing for HP.

And we got 18A downgraded to essentially original 20A specs. In this regard they shouldn't have leadership anymore because it was using 18A they would have had leadership.

And they are killing the entire company to achieve those mediocre specs.

 

[DavidC1]

Lenovo Yoga Aura has a 1200p which is a 1080p panel but for the 16:10 aspect ratio.

On the site it's still only 1800p. Besides 15-inch screen makes the whole thing quite bulky.

I think you'll see more of that in the second round of LNL designs whenever those drop. This first salvo at IFA was really centered on the super premium segment which kind of demands great screens so that's what most of these are equipped with.

LNL is not gonna be in entry level designs any time soon if ever but it will find its way in the upper midrange over the next several months and those will be more likely to ship with lower res IPS panels.

There's some like me that would not take battery life tradeoffs for a potentially better looking display. Eh it looks like I have to wait to see what Japanese manufacturers offer.

When I first got my old XPS 12, the screen looked vibrant. It only lasted a month before it felt normal.

Screen is temporary, battery life is forever.

 

[511]

They downgraded i3 too.

They initially claimed it'll have HD library and it'll have density improvements for high performance. Instead we got "HD" library which was barely smaller than i4 and nothing for HP.

You are wrong here 18% PPW and ~10% density increase is what TSMC calling a full node from now on so how is intel different from TSMC also on Intel 3 they met all their goals listed also the denser HP 2-2 Fin can be HP library as well it was a bit misleading but Intel 3 met everything they claimed

And we got 18A downgraded to essentially original 20A specs. In this regard they shouldn't have leadership anymore because it was using 18A they would have had leadership.

And they are killing the entire company to achieve those mediocre specs.

18A was downgraded from what they showed and they are betting the company on it but regarding killing the company what better alternative do they have now it's either go all in or go home broke as for how good 18A is we will find out in Q3 next year product ramp takes time as well DD is the only nice thing we have been given for 18A outside of disappointments which is inline with what TSMC had with N5

 

[SiliconFly]

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[SiliconFly]

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[cebri1]

They downgraded i3 too.

They initially claimed it'll have HD library and it'll have density improvements for high performance. Instead we got "HD" library which was barely smaller than i4 and nothing for HP.

And we got 18A downgraded to essentially original 20A specs. In this regard they shouldn't have leadership anymore because it was using 18A they would have had leadership.

And they are killing the entire company to achieve those mediocre specs.

Intel 3 has HD libraries. There is no evidence that this has changed or that there was any modification of specs.

 

[SiliconFly]

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[cebri1]

I don't think he said Intel 3 doesn't have HD libraries. More like, Intel 3's HD libraries aren't "HD" enough.

How does he know what is enough? He said Intel 3 was downgraded, and that's not true. It's meeting the performance expectations, ofc for him Intel always falls short.

 

[SiliconFly]

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[cebri1]

Yep. Thats true. Intel 3 was never downgraded. But, then again, in his defense, even a half-node should improve the transistors (at least a bit). But Intel 3 didn't bring in any improvements to the HP libraries. They remain exactly the same (something I find a bit disappointing).

Just fyi, estimates put Intel 3 HD density at around 150 - 160 MTr/mm2 and TSMC N3B at ~200. To remain competitive, Intel should also have pushed their HD libraries a bit further. That what I meant by "not HD enough".

What for? Intel 3 never going to compete with N3B for leading edge, it's pretty much an internal node that delivers a nice improvement over Intel 4, more than a 20% density increase.

Why would you aim for higher density targets and add additional risk, when it's a key node for your server lineup? Over Intel 7, Intel 3 already delivers a 40%+ improvement in performance per watt. If GNR builds on the improvements delivered by EMR, GNR is going to be able to provide over 50% improvement in perfomance per watt over SPR. A massive generational improvement.

 

[DavidC1]

Read what it says on the slide:
"Denser HP libraries". That's not what we got, did we?

We should have got a denser HP library, and a separate and even denser HD library.

Instead, the HP is same as Intel 4, and HD only offers 10% gain. It's a downgrade from what they were saying, just like 18A is.

How does he know what is enough? He said Intel 3 was downgraded, and that's not true. It's meeting the performance expectations, ofc for him Intel always falls short.

I'm saying it was downgraded because it was downgrade from the original 5N4Y goals in that VERY slide.

18A's downgraded gain is also over the reduced Intel 3. The density gain is only 30% over Intel 3.

Though Intel never said this, there were projections that 18A would offer substantial density improvements. It was repeated everywhere too, how the TSMC's mediocre scaling gain will be beaten by 20A/18A's amazing density gain.

Look at this forecast: https://semiwiki.com/semiconductor-services/techinsights/310900-can-intel-catch-tsmc-in-2025/

We are estimating a 1.6X density improvement. In the second half of 2024 Intel’s 18A process is due with a 10% performance improvement. We are estimating a 1.06X density improvement making this another half node.

They estimated 20A being 1.6x and 18A being additional 1.06x.

Intel's hype was further accelerated with unrealistic assumptions such as the one above. Remember, 14A is a 2027-2028 process with a mere 15% perf and 20% density gain.

 

[cebri1]

Clearly they are referring to the HD libraries as the performance targets and density targets are aligned to what was disclosed 2 years ago. But whatever.

 

[DavidC1]

Clearly they are referring to the HD libraries as the performance targets and density targets are aligned to what was disclosed 2 years ago. But whatever.

No, they simply missed/lied.

The Intel 3 HP library is not "denser" but the same 240nm pitch as Intel 4. To get the mediocre 10% density, you need the slower HD library. I don't know how you can spin "denser HP library" as meaning anything other than this.

18A was supposed to be 15% + 10% over Intel 3. 20A was supposed to offer 15% by itself.

I remind you guys again 14A is a 2027-2028 process with 15% perf and 20% density gain.

 

[Josh128]

How so?



I haven't heard that N3B has particularly poor yields after the delay. Maybe a little worse than TSMC's other nodes, but still good for production. It is a more expensive node though. The PPW advantage over N4P is pretty small.



Early reports are that customers aren't overly enthusiastic about 18a, but it hasn't actually released yet so we'll see how well it does when it lands.

So vs N4P, 3%-8% lower power, 1.64x density, -1 to +4% perf. Vs N4X, unknown power savings, unknown density, roughly equal perf? It is unknown whether Zen 5 uses N4P or N4X, and its said that Intel uses N3B, which is not shown here. Im sorry, but this is not enough information to declare with any degree of certainty that density is the only advantage ARL has over Zen 5.

 

[jur]

14A is supposedly still in development. Don't be surprised, if gains change. They only got their first high NA a couple of months ago.

 

[DavidC1]

What for? Intel 3 never going to compete with N3B for leading edge, it's pretty much an internal node that delivers a nice improvement over Intel 4, more than a 20% density increase.

Intel themselves said 10%, don't know where you are getting 20% from.

Also they said Intel 3 is a Foundry Node.

You want to give excuses for Intel? Fine, but that doesn't change them not meeting promises in their original 5N4Y presentation.

 

[SiliconFly]

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[DavidC1]

Intel Delivers Leading-Edge Foundry Node with Intel 3 Technology; on Path Back to Process Leadership

Editor’s Note: Welcome to the new Intel Foundry blog! We're launching this resource as a new way to peek inside our systems foundry for the AI era with some of the experts making it happen. We're thrilled to launch the blog with this exciting look at the Intel 3 node’s performance gains from...

community.intel.com

The base Intel 3 process node delivers up to 18% better performance at the same power for an entire processor core, a flexible set of metal interconnect options, and up to 10% greater density than the previous generation Intel 4 node (1).

Overpromising and underdelivering. Not what I expected 3 years ago when Intel brought in Patrick "Pat" Gelsinger, a lifetime Inteller and prodigy engineer as CEO.

 

[trivik12]

Raichu posted 5.3ghz for ARL-U. That is basically a refresh of MTL-U on Intel 3 and has 400mhz frequency gain. It would be interesting to compare performance/efficiency against MTL-U once its out.

 

[Hitman928]

So vs N4P, 3%-8% lower power, 1.64x density, -1 to +4% perf. Vs N4X, unknown power savings, unknown density, roughly equal perf? It is unknown whether Zen 5 uses N4P or N4X, and its said that Intel uses N3B, which is not shown here. Im sorry, but this is not enough information to declare with any degree of certainty that density is the only advantage ARL has over Zen 5.

Zen 5 uses N4P. From the process perspective, N3B’s only significant advantage is logic density.

 

[jdubs03]

So I took another look at the GB Browser and the U7 258V isn’t much behind the U9 288V in multithread. It’s scoring around 10800 vs 11000. I would’ve thought there’d be 288V would have a bigger gap.

 

[trivik12]

Intel Delivers Leading-Edge Foundry Node with Intel 3 Technology; on Path Back to Process Leadership

Editor’s Note: Welcome to the new Intel Foundry blog! We're launching this resource as a new way to peek inside our systems foundry for the AI era with some of the experts making it happen. We're thrilled to launch the blog with this exciting look at the Intel 3 node’s performance gains from...

community.intel.com

Overpromising and underdelivering. Not what I expected 3 years ago when Intel brought in Patrick "Pat" Gelsinger, a lifetime Inteller and prodigy engineer as CEO.

What was over promised? it was more about Iso performance back then.

 

[DrMrLordX]

14A is supposedly still in development. Don't be surprised, if gains change. They only got their first high NA a couple of months ago.

Isn't Intel the major buyer of High NA equipment right now?

 

[Josh128]

Zen 5 uses N4P. From the process perspective, N3B’s only significant advantage is logic density.

Well, 3-8% power efficiency is not insignificant when you are talking about ~250W power levels.

Also, while it is said that Lunar Lake uses the N3(B) node, where was it confirmed that Arrow Lake doesnt use N3P node? It seems counterintuitive that Intel would use a mobile class process for its high performance desktop chips, yet still manages to squeeze out 5.7GHz from that process at an acceptable power draw. It seems much more likely that Arrow Lake is using N3P than N3B, which is used for Lunar Lake with efficiency in mind.

TSMC's 3nm update: N3P in production, N3X on track

The last and final FinFET node from TSMC lives on.

www.anandtech.com