Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Preliminary Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing ADL-N. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q2/Computex 2026. In case people don't remember AlderLake-N, I have created a table below to compare the detail specs of ADL-N and WCL. Just for fun, I am throwing LNL and upcoming Mediatek D9500 SoC.

		Intel Alder Lake - N	Intel Wildcat Lake	Intel Lunar Lake		Mediatek D9500
Launch Date		Q1-2023	Q2-2026 ?	Q3-2024		Q3-2025
Model		Intel N300	?	Core Ultra 7 268V		Dimensity 9500 5G
Dies		2	2	2		1
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		TSMC N3P
CPU		8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		C1 1+3+4
Threads		8	6	8		8
Max Clock		3.8 GHz	?	5 GHz
L3 Cache		6 MB	?	12 MB
TDP		7 W	Fanless ?	17 W		Fanless
Memory		64-bit LPDDR5-4800	64-bit LPDDR5-6800 ?	128-bit LPDDR5X-8533		64-bit LPDDR5X-10667
Size		16 GB	?	32 GB		24 GB ?
Bandwidth			~ 55 GB/s	136 GB/s		85.6 GB/s
GPU		UHD Graphics		Arc 140V		G1 Ultra
EU / Xe		32 EU	2 Xe	8 Xe		12
Max Clock		1.25 GHz		2 GHz
NPU		NA	18 TOPS	48 TOPS		100 TOPS ?

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[SiliconFly]

.

 

[poke01]

Hmm interesting people have low expectations. Remember this is a ST score. Obviously for MT it will go over 30 watts.


This is an engineering sku too. I guess I might be wrong then.

 

[ikjadoon]

5 GHz at 15W is def. possible; it depends on the uArch and how power is measured (uncore? idle-normalized? AC vs DC?)

7840U @ 5.1 GHz peak claimed boost
21W - 23W peaks on GB6
As measured by Phoronix

That was N4. So N3B should help some, no? And we'll see how much / little Lion Cove demands in power. Still hoping for some fanless models. It'd certainly be ironic if LNL had more fanless design wins than Oryon (0 designs).

 

[Josh128]

Do you doubt because Intel is more efficient than AMD?

Lunar Lake is an efficiency focused design and on a slightly better node. There’s no reason why Lunar cannot do 15 watts @ 5.1GHz

3nm is not slightly better than 4nm, its a full node advancement.

 

[Hitman928]

3nm is not slightly better than 4nm, its a full node advancement.

Only in logic density.

 

[jpiniero]

Only in logic density.

Yep.

It's been like, uh, 20 years since node names meant anything other than for marketing purposes?

 

[DavidC1]

Hmm interesting people have low expectations. Remember this is a ST score. Obviously for MT it will go over 30 watts.

This is an engineering sku too. I guess I might be wrong then.

It's possible. The x86 chips have high uncore/idle power so if they got that lowered in Lunarlake, the peak power will go down by the same amount. So node advancements plus minus ~2-3W. On current chips the E core ST efficiency is made worse by the high idle consumption. So the 8W E core ST could be actually 5W.

Considering the ARM competition does it at less than 1/2 the power, it isn't anything fantastic either.

Still hoping for some fanless models. It'd certainly be ironic if LNL had more fanless design wins than Oryon (0 designs).

I'm very disappointed the state of the art efficient battery life designs are all hobbled by 2K resolution OLED displays.

Where is the IPS 1080p ultraportables? If it's actually that efficient it doesn't need a honking 75WHr battery. 50WHr would be more than enough.

Look at this device from 4 years ago: https://www.notebookcheck.net/Acer-...ent-long-lasting-14-inch-laptop.586141.0.html

29 hour idle, 11hr WiFi surfing, 16 hour video playback all on a 50WHr battery. "Efficient" Lunarlake devices still can't catch up to that despite having 70WHr+ batteries, at least not the models we know.

You would think Lunarlake would be able to beat the above device using just a 40WHr battery.

 

[poke01]

Where is the IPS 1080p ultraportables? If it's actually that efficient it doesn't need a honking 75WHr battery. 50WHr would be more than enough.

Lenovo Yoga Aura has a 1200p which is a 1080p panel but for the 16:10 aspect ratio.

 

[Magio]

I'm very disappointed the state of the art efficient battery life designs are all hobbled by 2K resolution OLED displays.

Where is the IPS 1080p ultraportables? If it's actually that efficient it doesn't need a honking 75WHr battery. 50WHr would be more than enough.

I think you'll see more of that in the second round of LNL designs whenever those drop. This first salvo at IFA was really centered on the super premium segment which kind of demands great screens so that's what most of these are equipped with.

LNL is not gonna be in entry level designs any time soon if ever but it will find its way in the upper midrange over the next several months and those will be more likely to ship with lower res IPS panels.

 

[511]

ARL Frequency

https://twitter.com/x/status/1837767696009908369

 

[Magio]

Has anyone seen a Linux result for LNL on Geekbench? I searched for a few SKUs but didn't find anything. Linux usually has a small but noticeable lead on Windows so I'm intrigued to see how LNL fares on there.

 

[Josh128]

Only in logic density.

So only better power efficiency? Source?

 

[cebri1]

ARL Frequency

https://twitter.com/x/status/1837767696009908369

View attachment 108020

That’s a nice frequency bump for MTL Intel 3. Intel 3 looks to be maturing.

 

[jdubs03]

Will be interesting to see what the 285HX will boost to. Maybe 5.6GHz?

 

[Magio]

N3B as a 3nm process is indeed a full node advancement over N4P (which really is a 5nm variant), however N3B in particular was a particularly embattled process which forced TSMC to scale back on its density ambitions and other aspects. Still a noticeable improvement over N4P but far inferior to what's expected of N3E for example.

It's a bit ironic that the first time Intel properly bet on TSMC was on the one node from them that didn't turn out to be a really great one.

 

[jpiniero]

N3B as a 3nm process is indeed a full node advancement over N4P (which really is a 5nm variant),

Not really. The only thing it's decently better on is logic density... but the price increase makes it moot. Apple discontinued the iPhone 15 Pro so Lunar and Arrow will be the only products on the market using N3B.

 

[511]

N3B as a 3nm process is indeed a full node advancement over N4P (which really is a 5nm variant), however N3B in particular was a particularly embattled process which forced TSMC to scale back on its density ambitions and other aspects. Still a noticeable improvement over N4P but far inferior to what's expected of N3E for example.

It's a bit ironic that the first time Intel properly bet on TSMC was on the one node from them that didn't turn out to be a really great one.

Yeah it strikes me comical intel will pray that tsmc gets delayed for them to take lead back🤣

 

[dttprofessor]

Not really. The only thing it's decently better on is logic density... but the price increase makes it moot. Apple discontinued the iPhone 15 Pro so Lunar and Arrow will be the only products on the market using N3B.

no,M3

 

[Magio]

Not really. The only thing it's decently better on is logic density... but the price increase makes it moot. Apple discontinued the iPhone 15 Pro so Lunar and Arrow will be the only products on the market using N3B.

Logic density also helps power consumption. In the case of N3B, poor yields among other things meant it didn't improve performance as much as a full node jump usually would but PPW would inherently see improvements (which we saw from M2 to M3).

And there will be M3 Macs on sale for the foreseeable future.

Yeah it strikes me comical intel will pray that tsmc gets delayed for them to take lead back🤣

Of course Intel wouldn't mind seeing TSMC suffer delays on N2, but really they don't need TSMC delays to look good. If they execute 18A well and on schedule (which would see it ramp to HVM before N2 does) that would be a huge win even if N2 still snatches the "best process in the world" crown back shortly after. (And of course Intel will focus on its process' strengths to argue process leadership while conveniently ignoring the areas in which TSMC will likely be better.)

 

[SiliconFly]

.

 

[Magio]

Intel *needs* TSMC to stay ahead of competition. TSMC delays (if any) will impact Intel negatively.

It would impact (some) of their products negatively but it would help them get their foundries back to leadership which is a much more impactful thing. If TSMC suffers delays, it hurts *all* of Intel's competitors and only some of Intel's products, while if Intel's foundries take the lead as a result it would help them nail some very lucrative contracts with top chipmakers.

 

[SiliconFly]

.

 

[511]

It would impact (some) of their products negatively but it would help them get their foundries back to leadership which is a much more impactful thing. If TSMC suffers delays, it hurts *all* of Intel's competitors and only some of Intel's products, while if Intel's foundries take the lead as a result it would help them nail some very lucrative contracts with top chipmakers.

This 100% TSMC is Successful due to Intel delays + their execution

 

[DrMrLordX]

Intel 3 is turning out to be better than expected. We'll have better insights once GNR & SRF come out.

Huh? Sierra Forest is already out . . .

 

[Hitman928]

So so better power efficiency? Source?

Logic density also helps power consumption.

How so?

In the case of N3B, poor yields among other things meant it didn't improve performance as much as a full node jump usually would but PPW would inherently see improvements (which we saw from M2 to M3).

I haven't heard that N3B has particularly poor yields after the delay. Maybe a little worse than TSMC's other nodes, but still good for production. It is a more expensive node though. The PPW advantage over N4P is pretty small.

Of course Intel wouldn't mind seeing TSMC suffer delays on N2, but really they don't need TSMC delays to look good. If they execute 18A well and on schedule (which would see it ramp to HVM before N2 does) that would be a huge win even if N2 still snatches the "best process in the world" crown back shortly after. (And of course Intel will focus on its process' strengths to argue process leadership while conveniently ignoring the areas in which TSMC will likely be better.)

Early reports are that customers aren't overly enthusiastic about 18a, but it hasn't actually released yet so we'll see how well it does when it lands.