Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing Raptor Lake-U. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q1 2026.

		Intel Raptor Lake U	Intel Wildcat Lake 15W?	Intel Lunar Lake		Intel Panther Lake 4+0+4
Launch Date		Q1-2024	Q2-2026	Q3-2024		Q1-2026
Model		Intel 150U	Intel Core 7	Core Ultra 7 268V		Core Ultra 7 365
Dies		2	2	2		3
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		Intel 18-A + Intel 3 + TSMC N6
CPU		2 P-core + 8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		4 P-core + 4 LP E-cores
Threads		12	6	8		8
Max Clock		5.4 GHz	?	5 GHz		4.8 GHz
L3 Cache		12 MB		12 MB		12 MB
TDP		15 - 55 W	15 W ?	17 - 37 W		25 - 55 W
Memory		128-bit LPDDR5-5200	64-bit LPDDR5	128-bit LPDDR5x-8533		128-bit LPDDR5x-7467
Size		96 GB		32 GB		128 GB
Bandwidth				136 GB/s
GPU		Intel Graphics	Intel Graphics	Arc 140V		Intel Graphics
RT		No	No	YES		YES
EU / Xe		96 EU	2 Xe	8 Xe		4 Xe
Max Clock		1.3 GHz	?	2 GHz		2.5 GHz
NPU		GNA 3.0	18 TOPS	48 TOPS		49 TOPS

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[DavidC1]

If we go with the OG ticktock timeline we'd get Broadwell H1'14, Skylake H1'15, Cannon Lake H1'16 and the next tock (would-be GLC) H1'17.

22nm slipped too, and so did 90nm.

mid-2001: 0.13u
Feb-2004: 90nm
late-2005: 65nm
late-2007: 45nm
Jan-2010: 32nm
Apr-2012: 22nm

Then Haswell was June, and 14nm didn't come until Jan 2015 for laptops, and Broadwell C in middle of 2015. 22nm was a bit too much for them, and they decided to push it further on 14nm. Then they decided it wasn't enough so they pushed it too much again on 10nm. The three are all direct failures of them pivoting hard to attempt to compete in phones/tablets. If you ask when ARM vs x86 was decidedly in favor of ARM, it was in those years. iPhone came out in June of 2007, and it was shockingly revolutionary.

You'll also notice the delayed ones are also the ones that disappointed. 90nm, 22nm, 14nm, and 10nm. In hindsight, I think even 90nm was a result of not pivoting to low power fast enough. While we all said 90nm didn't fail and it was Netburst that failed, I think it was partially a failure of 90nm.

 

[Hitman928]

You can't clock nothing useful at those voltages. If you sold a product based on that, the product will be laughed off the market. It would have worse enthusiast perception than the original Atom. Because those fundamentals apply. That's why they jack 1.3V into the desktop chips. Even if you could lower voltage by 30%, what happens after that? The scaling were gained significantly by reducing voltages in the 90's.

You’re talking about supply voltage, that’s different than threshold voltage.

 

[DavidC1]

You’re talking about supply voltage, that’s different than threshold voltage.

It's related, because they are so close now. When CPUs were at 5V, noone cared about threshold voltages. Now, they do. When you want to clock at 5GHz there's no voltage scaling. When you go under 1V, at some point you get superlinear scaling in regards to voltage. So the old belief that you can use 2x the die to get lower power by voltage scaling is outdated, because that extra 0.1V might gain you 100% increase in frequency. That old belief is almost two decades old. Pentium 4's ran at 1.5V.

 

[511]

?

i should have said like APX is not coming before Zen 7 at least

10nm is an epic disaster but GLC(if you mean Golden Cove) was never possible in 2016-17. Come on!

i mean the schedule was 16-17 but 14nm didn't help matters even than it would have been 2018 wasn't SPR supposed to be a 2017 product ?

 

[regen1]

i mean the schedule was 16-17 but 14nm didn't help matters even than it would have been 2018 wasn't SPR supposed to be a 2017 product ?

SPR(with Golden Cove) in 2017? No. It didn't get delayed by ~5-6 years.
2019 Intel Investor Day roadmap(already after huge delays) had ICL server for 2020, SPR for 2021.
SPR was in the works for a long time but once the platform definition was done with CXL1.1, DDR5 and PCIe 5.0, at most a 2021 launch could have been realistic instead it launched in 2023. A 2021 launch would have made it much more competitive.

Had they been deeper in their node development cycles, Redwood Cove based client(MTL) and Server(GNR) could have launched at least a year earlier from when they actually launched plus product and foundry roadmaps could have been much less complicated.

 

[adroc_thurston]

A 2021 launch would have made it much more competitive.

Ehhh I mean Milan comp at more power with considerably more expensive DRAM attach.
It just wouldn't be a catastrophe of shipping *after* Genoa.

 

[511]

Ehhh I mean Milan comp at more power with considerably more expensive DRAM attach.
It just wouldn't be a catastrophe of shipping *after* Genoa.

It has better perf/ core vs Milan and ISA Goodies that Milan Didn't have

SPR(with Golden Cove) in 2017? No. It didn't get delayed by ~5-6 years.
2019 Intel Investor Day roadmap(already after huge delays) had ICL server for 2020, SPR for 2021.
SPR was in the works for a long time but once the platform definition was done with CXL1.1, DDR5 and PCIe 5.0, at most a 2021 launch could have been realistic instead it launched in 2023. A 2021 launch would have made it much more competitive.

Had they been deeper in their node development cycles, Redwood Cove based client(MTL) and Server(GNR) could have launched at least a year earlier from when they actually launched plus product and foundry roadmaps could have been much less complicated.

ICL 2020 was with delays and than SPR ... So much that's not funny.

 

[mikegg]

I could see this being a factor at Intel, especially their P-Core team, but not at AMD. AMD team is flying high, lots of adrenaline, conquering server and desktop segments. With notebook leadership within eye sight.

Let's put the pipe down a little. AMD is doing well relative to Intel but they aren't doing well relative to Apple, Qualcomm, and Arm server chips.

 

[regen1]

Ehhh I mean Milan comp at more power with considerably more expensive DRAM attach.
It just wouldn't be a catastrophe of shipping *after* Genoa.

Still would have outdone Milan for performance and about a year of availability over Genoa is lot a better than what we got. Anyway these are hypotheticals. AMD actually shipped good products and did well in Server whereas Intel got entangled in its many issues esp. with ICL, SPR.

It has better perf/ core vs Milan and ISA Goodies that Milan Didn't have

ICL 2020 was with delays and than SPR ... So much that's not funny.

Server ICL actually launched in 2021. Yeah, it was tragic.

 

[Joe NYC]

Let's put the pipe down a little. AMD is doing well relative to Intel but they aren't doing well relative to Apple, Qualcomm, and Arm server chips.

Arm in server chips - the only merchant Arm CPU is on life support. So, it can't stand on its own, can only piggyback on something else.

As far as AMD, if you consider relative strengths in different categories, AMD is weakest in notebooks (vs. Apple, Intel, Qualcomm). AMD needs exceptional execution on its roadmap to achieve leadership. Which is always less than 50:50 probability - to achieve something exceptional.

But in server and desktop, it looks like strength to strength for AMD, and it is Intel that needs exceptional execution to catch up.

 

[Doug S]

Arm in server chips - the only merchant Arm CPU is on life support.

Because the companies interested in ARM CPUs for servers are the hyperscalers, and it makes sense for them to do their own tailored to their specific needs rather than buying from a third party and paying their markup on top of TSMC's markup.

Trying to sell merchant ARM CPUs is swimming against the tide. They will never get a hyperscaler to buy their products because they build their own tailored to their specific needs rather than pay a third party's markup. Of the customers accessible to them the only way they can win against the "easy option" of buying Epyc/Xeon is significantly undercutting them on price - and AMD/Intel sell in huge volumes (especially including the PC market where similar designs are used) so they can better amortize their design cost. Their customers are necessarily limited to those running Linux, because while apparently Windows Server is (finally) supported on ARM, those customers would be restricted on what it can run based on what server packages have been ported to ARM (any TCO gains they may get if the ARM servers are cheaper take a big hit running under emulation)

If Qualcomm or Nvidia could make ARM PCs a thing then they might stand a chance at creating a merchant ARM server market. Someone who tries to sell servers alone has no chance - they won't have enough volume to price competitively and still thrive.

 

[Joe NYC]

Because the companies interested in ARM CPUs for servers are the hyperscalers, and it makes sense for them to do their own tailored to their specific needs rather than buying from a third party and paying their markup on top of TSMC's markup.

But x86 CPUs have all those markups. TSMC markup + AMD markup

So, apples to apples, on its own Arm can't compete in the server market against x86. Only if something else is carrying it.

Trying to sell merchant ARM CPUs is swimming against the tide. They will never get a hyperscaler to buy their products because they build their own tailored to their specific needs rather than pay a third party's markup. Of the customers accessible to them the only way they can win against the "easy option" of buying Epyc/Xeon is significantly undercutting them on price - and AMD/Intel sell in huge volumes (especially including the PC market where similar designs are used) so they can better amortize their design cost. Their customers are necessarily limited to those running Linux, because while apparently Windows Server is (finally) supported on ARM, those customers would be restricted on what it can run based on what server packages have been ported to ARM (any TCO gains they may get if the ARM servers are cheaper take a big hit running under emulation)

The "exploit" hyperscalers use is getting their designs from Arm without paying full market price for them. That's something Arm is working very hard to correct.

If hyperscalers had either pay full price to Arm or to employ their own CPU design teams, such as Qualcomm is doing, that would significantly reduce attractiveness of hyperscalers using Arm.

Another variable is that both Intel and AMD are now competing directly with Arm. Intel with E-Core based servers and AMD with Dense cores.

We will see what happens when these new designs (Clearwater Forest and Venice Dense) are released, if they start to push back against use of Arm by hyperscalers.

 

[DrMrLordX]

Arm in server chips - the only merchant Arm CPU is on life support. So, it can't stand on its own, can only piggyback on something else.

And once NeoVerse licensing costs go up, the cost benefit of having your own in-house design team starts looking a lot less attractive. That's assuming ARM hasn't already raised prices!

 

[Doug S]

But x86 CPUs have all those markups. TSMC markup + AMD markup

So, apples to apples, on its own Arm can't compete in the server market against x86. Only if something else is carrying it.

Hyperscalers have to pay the AMD/Intel markup because they can't make their own x86 CPUs, but there are plenty of customers who want to run x86 code so they need to support it.

Now I don't keep up with their bulk pricing but to the extent they offer cheaper ARM cycles than x86 cycles they might induce customers who don't NEED to run x86 to port their code to ARM to take advantage of the savings. If they charge basically the same then there is no incentive for customers to switch and they'll have to keep paying AMD/Intel's markups to get x86 chips.

 

[Joe NYC]

And once NeoVerse licensing costs go up, the cost benefit of having your own in-house design team starts looking a lot less attractive. That's assuming ARM hasn't already raised prices!

I have not followed it closely, but Arm seems to have a goal of raising licensing prices much higher, restrict licenses, use litigation (so far unsuccessful) in order to harvest a much higher return from licensees, and then also start selling Arm's own merchant silicon.

That's just a broad outline, there may be limited advances on each one of these fronts, but that's the big picture.

There are rumors that Meta may be the first customer of merchant Arm server CPU. It just happens that Meta is one of the hyperscalers without its own Arm CPU. So Arm will have an incentive to flip the other hyperscalers as well. And the tool to do it may be making hyperscaler's licensed in-house designed uneconomical, by raising their pricing substantially.

If Arm succeeds, it will end up benefiting Arm (of course) but also Intel and AMD, by eliminating one source of competition.

 

[LightningZ71]

Long term, the only thing that ARM's new strategy is going to do is push hyper scalers to develop RiscV products eventually. Eventually, they will need to find cost relief somewhere...

 

[Joe NYC]

Long term, the only thing that ARM's new strategy is going to do is push hyper scalers to develop RiscV products eventually. Eventually, they will need to find cost relief somewhere...

Like Linux on desktop, fusion power, that will arrive in certain number of years, but that number of years never changes, year after year, decade after decades.

So RiscV may be 10 years from dominating the datacenter, and will remain 10 years from dominating datacenter forever.

 

[oak8292]

It seems like there is a lot of noise around ARM. Here is an interview from this year on the Platform.

Arm Says Neoverse Is A More Universal Compute Substrate Than X86

Back at the end of July, we had a discussion with CPU maker AMD and the topic of conversation was hybrid cloud. In the course of that conversation, one of

www.nextplatform.com

The cores being implemented now in the server space are more similar to the mobile industry with ‘standardized’ Neoverse cores. Graviton 4 has a fair amount of volume and the non-recurring engineering, NRE costs for cores is finally going down as volume increases. AMD had a similar problem with per core costs. NRE needs to be spread over volume.

X86 software in the server space has been a significant moat but it is getting smaller with cloud vendors. AWS claims that 50% of their compute was ARM (Graviton) over the last two years and they are the largest cloud.

I believe that Softbank put up the money for Neoverse when they fully owned ARM and ARM was probably losing money due to lack of volume.

RISC-V has a massive hill to climb in software, standardization in core architecture and volume. If RISC-V is important in servers in the next ten years it will be because of a Chinese need and it will be strategic and not economic.

 

[511]

Do you know the real reason People are Moving to Gravitation is they are offering them for cheaper than X86 VMs and are having lower margins as well

 

[LightningZ71]

The point is that, so long as x86 and ARM continue to push duopoly pricing strategies, it will be in the best interests of hyper scalers to invest in their own solutions. Given their size, they can afford to develop it in house so as an industry consortium. The biggest issue is going to be a translation layer for the instruction set.

 

[511]

https://twitter.com/x/status/1987915707254980980

 

[oak8292]

The point is that, so long as x86 and ARM continue to push duopoly pricing strategies, it will be in the best interests of hyper scalers to invest in their own solutions. Given their size, they can afford to develop it in house so as an industry consortium. The biggest issue is going to be a translation layer for the instruction set.

There isn’t a lot of ‘translation’ layer going on in servers. If you read the interview I linked you will see that even architectural differences with the same instruction set matter. If software is optimized for AVX512 then those are the x86 CPUs that hyperscalers want.

One of the biggest issues for ARM was a ‘standardized’ plug and play server core with a stable release of Linux.

Volume matters. AMD has a 50% margin for architecture. They don’t develop process. That is the margin that hyperscalers have to license Neoverse cores, customize a processor for their specific loads and develop the software stack. AWS was already fabricating a DPU, Nitro with TSMC in the millions and Graviton was an easy extension with savings on purchase and power.

 

[Geddagod]

https://twitter.com/x/status/1987915707254980980

Attempting to do area calculations using that extremely low rez, slanted, and blurry PTL pic is not very worthwhile IMO, unless he got a much better shot from elsewhere that I haven't seen.
The only area figure that I can take somewhat seriously from that is maybe the 4x Darkmont cluster, but even that...

 

[511]

Attempting to do area calculations using that extremely low rez, slanted, and blurry PTL pic is not very worthwhile IMO, unless he got a much better shot from elsewhere that I haven't seen.
The only area figure that I can take somewhat seriously from that is maybe the 4x Darkmont cluster, but even that...

well he got better res for sure ...

 

[Geddagod]

well he got better res for sure ...

He didn't say anything abt that on his post ¯\_(ツ)_/¯