Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Preliminary Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing ADL-N. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q2/Computex 2026. In case people don't remember AlderLake-N, I have created a table below to compare the detail specs of ADL-N and WCL. Just for fun, I am throwing LNL and upcoming Mediatek D9500 SoC.

		Intel Alder Lake - N	Intel Wildcat Lake	Intel Lunar Lake		Mediatek D9500
Launch Date		Q1-2023	Q2-2026 ?	Q3-2024		Q3-2025
Model		Intel N300	?	Core Ultra 7 268V		Dimensity 9500 5G
Dies		2	2	2		1
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		TSMC N3P
CPU		8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		C1 1+3+4
Threads		8	6	8		8
Max Clock		3.8 GHz	?	5 GHz
L3 Cache		6 MB	?	12 MB
TDP		7 W	Fanless ?	17 W		Fanless
Memory		64-bit LPDDR5-4800	64-bit LPDDR5-6800 ?	128-bit LPDDR5X-8533		64-bit LPDDR5X-10667
Size		16 GB	?	32 GB		24 GB ?
Bandwidth			~ 55 GB/s	136 GB/s		85.6 GB/s
GPU		UHD Graphics		Arc 140V		G1 Ultra
EU / Xe		32 EU	2 Xe	8 Xe		12
Max Clock		1.25 GHz		2 GHz
NPU		NA	18 TOPS	48 TOPS		100 TOPS ?

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[LightningZ71]

They really don't have to sacrifice much in the way of ST performance either. Simply including a single Skymont quad that's not optimized for area, but optimized for clock instead, would get you so close in many tasks that it wouldn't matter much.

 

[Thunder 57]

Not 5 years but say in 15-20 years.

That is a more likely timeline. That is also an eternity in the tech world. Twenty years ago we were all running single core CPU's. I can't imagine what things will look like 20 years from now.

 

[GTracing]

I thought this statement by Chester Lam weird.

That puts [Zen2] well ahead of Skymont, despite being a much smaller core that clocks lower under multithreaded load.

Did he mean to say it's a much older core? Zen2 isn't smaller than Skymont. Even if you put them in the same node I think Skymont would be smaller.

 

[511]

Finally it's here

Skymont in Desktop Form: Atom Unleashed

Skymont is Intel's newest E-Core architecture.

chipsandcheese.com

 

[ajsdkflsdjfio]

Finally it's here

Skymont in Desktop Form: Atom Unleashed

Skymont is Intel's newest E-Core architecture.

chipsandcheese.com

IKR, honestly weird how zero reviewers truly tried to isolate and test the skymont cores, too many people sleeping on them.

 

[SiliconFly]

.

 

[DavidC1]

I believe Darkmont doesn't add anything new. I think it's just the same Skymont on a new node with a fancy name.

Yes it does. It improves things a bit on the front end. Should be 3-5% faster.

Update: It comes with the ability to fetch more?(not remembering correctly) and branch prediction that can predict two branches at a time. Something like that.

 

[Rheingold]

ComputerBase tested with Microcode 114 and all the other fixes:

Intel Arrow Lake mit MCU 114 & Windows-Updates im Test

Intel verspricht mehr Leistung für Arrow Lake-S durch Microcode-, Windows- und Spiele-Updates. MCU 110, 112, 113 & 114 im Benchmark-Test.

www.computerbase.de

Just +2% in average frame rates, the biggest improvement is CP2077 with +21%:



Arrow Lake is still 5% behind 14th gen in gaming.

 

[SiliconFly]

.

 

[Rheingold]

Not all.

Clarification: All other currently available fixes, meaning everything else besides MC114 according to this slide:



The "CSME Firmware Kit" resulting in upcoming BIOSes is the not yet available item.

 

[igor_kavinski]

Arrow Lake is still 5% behind 14th gen in gaming.

vs. 14900K with mc114 and improvement is vs. mc110:

 

[SiliconFly]

.

 

[AcrosTinus]

vs. 14900K with mc114 and improvement is vs. mc110:

View attachment 113556

Still not worth buying...
You gain nothing but lower power draw on a DESKTOP....
With Pat being basically thrown out, I will wait for the next two generations of products before calling for Intel's demise.

 

[OneEng2]

What is Skymont missing that would hinder it from adding AVX512?

Transistors.

LOL, but seriously, not too far off.

Basically, you need more of everything, and more complex decode. More fetch, more retire, more, more, more.

Remember, Intel had this feature, then dropped it because it took up so much space, and it ran so hot. It looks to me like it takes a quite a bit of doing to make it happen.... and not overheat the processor. No matter what, it takes a good chunk of die space.

What's he talking about? Clock for clock performance is better than Zen 4 according to his SpecInt and SpecFP scores. Remember 7950X is 5.7GHz vs 4.6GHz for 285K's SKT. Yes, it's beating Zen 4 per clock in both Int and FP. 23% clock difference but 19% in Int and 18% in FP. 7950X is AMD's previous generation flagship.

Possibly so, but at pretty low clock speeds, and on Zen 4 not Zen 5 (which should be the correct comparison at this time). Additionally, once you throw a MT app at it, Zen 5 gains around 40% performance per core while Skymont does not (lacks SMT). So I would argue that Zen 5c has considerably higher performance per clock than Skymont.

Also, if you look at the math, Zen 5c is actually pretty close in performance per area to Skymont if they were on the same process (I did some guestimates on this in another thread).

Where I think Skymont does well is in performance per watt. This is what makes it so good in thin and light laptops.

 

[ajsdkflsdjfio]

Basically, you need more of everything, and more complex decode. More fetch, more retire, more, more, more.

Remember, Intel had this feature, then dropped it because it took up so much space, and it ran so hot. It looks to me like it takes a quite a bit of doing to make it happen.... and not overheat the processor. No matter what, it takes a good chunk of die space.

They had this feature in alder-lake and all its derivatives if I'm not mistake. Also it was indeed fused off in a later microcode patch, but it's not like it used up so much power and heat that it instantly made the CPU unusable. It was simply not useful for the average consumer and resulted in slightly lower clocks on the CPU so Intel turned it off. As for die size I doubt it is really that significant. If you look at Skylake(no avx512) vs Skylake-X(avx 512) the core sizes are very similar. Also if avx-512 took so much space I just don't see how it is economical for Intel to continue producing so many chips designed with it just to turn it off.

Possibly so, but at pretty low clock speeds, and on Zen 4 not Zen 5 (which should be the correct comparison at this time). Additionally, once you throw a MT app at it, Zen 5 gains around 40% performance per core while Skymont does not (lacks SMT). So I would argue that Zen 5c has considerably higher performance per clock than Skymont.

40% performance per core gain is just not true, not to mention the vast amount of workloads that do not benefit from SMT at all.

949->1208 = 27% not 40% and that's only in heavy multi-threaded workloads.

Besides hyperthreading is not a free lunch even in the heavy multi-threaded workloads that benefit from it the most. There are tons of issues with massive multithreading and consequently advantages that e-cores without hyperthreading introduce especially in data center.

Also if you did in fact want to add hyperthreading to Skymont it'd be less of a die size increase than you would think, maybe around 10-15 percent according to Intel's own figures comparing LIon cove with HT vs without.

 

[Rheingold]

He talks abt the mid-jan upcoming patch in the video. It's too soon to test.

That's what I wrote. The Firmware Kit is what's missing for those BIOSes to be compiled. It's at 35m18s in the interview video.

 

[igor_kavinski]

It was simply not useful for the average consumer and resulted in slightly lower clocks on the CPU so Intel turned it off.

That's not the reason they disabled it and later fused it off. It could only be used with E-cores off and this to them was not acceptable after all the development costs of integrating E-cores. Ironically, gamers did turn off the E-cores anyway and some of them went to AMD due to AVX-512 being used in a PS3 emulator. Had Intel just let AVX-512 stay, they would have gained more marketshare away from AMD for users going from AM4 to LGA1700 or kept their users who were forced to go AMD because Intel disappointed them.

 

[511]

There are just clown at Intel for making the wrong decision

 

[igor_kavinski]

Also, I think it was pure arrogance too. They thought, hey, if someone wants to use AVX-512, they should pay for our HEDT CPUs and maybe lots of businesses with critical AVX-512 workloads probably did do that. But it was still a really short sighted decision and I bet Pat was involved in that.

 

[Abwx]

From C&C conclusions:

What's he talking about? Clock for clock performance is better than Zen 4 according to his SpecInt and SpecFP scores. Remember 7950X is 5.7GHz vs 4.6GHz for 285K's SKT. Yes, it's beating Zen 4 per clock in both Int and FP. 23% clock difference but 19% in Int and 18% in FP. 7950X is AMD's previous generation flagship.

Here clock for clock for all sub tests, or rather IPC, wich is the same thing,
in a vast majority of the tests Z4 is ahead, as i once said SKT is Z3 level.

https://substackcdn.com/image/fetch/f_auto,q_auto:good,fl_progressive:steep/https%3A%2F%2Fsubstack-post-media.s3.amazonaws.com%2Fpublic%2Fimages%2F7153c62f-048b-4eea-bcc8-29364e8a1696_1177x491.png

 

[511]

Here clock for clock for all sub tests, or rather IPC, wich is the same thing,
in a vast majority of the tests Z4 is ahead, as i once said SKT is Z3 level.

https://substackcdn.com/image/fetch/f_auto,q_auto:good,fl_progressive:steep/https%3A%2F%2Fsubstack-post-media.s3.amazonaws.com%2Fpublic%2Fimages%2F7153c62f-048b-4eea-bcc8-29364e8a1696_1177x491.png

Its sorted by IPC Higher is better than SKT wins in 17/23

 

[Meteor Late]

Its sorted by IPC Higher is better than SKT wins in 17/23

He is clearly confusing 285K for P core and 258V for E core, when 285K here is also E core, the difference in IPC between the two is down to using a much higher latency LPDDR and lower cache configuration in Lunar Lake, among other things.

 

[511]

Yeah Skymont is beating Zen4 clock for Clock

 

[Meteor Late]

But it's also worth mentioning that, different to Ryzen, Intel has lower L3 Cache accessible by a single core the lower the core count their CPU has, so a Skymont core will perform a bit worse with a Core Ultra 5 for instance. That's one of the things I like about Ryzen, each core can always access the full 32MB cache of a chiplet, no matter Ryzen 5, 7 or 9.

 

[OneEng2]

They had this feature in alder-lake and all its derivatives if I'm not mistake. Also it was indeed fused off in a later microcode patch, but it's not like it used up so much power and heat that it instantly made the CPU unusable. It was simply not useful for the average consumer and resulted in slightly lower clocks on the CPU so Intel turned it off. As for die size I doubt it is really that significant. If you look at Skylake(no avx512) vs Skylake-X(avx 512) the core sizes are very similar. Also if avx-512 took so much space I just don't see how it is economical for Intel to continue producing so many chips designed with it just to turn it off.

40% performance per core gain is just not true, not to mention the vast amount of workloads that do not benefit from SMT at all.
View attachment 113596
949->1208 = 27% not 40% and that's only in heavy multi-threaded workloads.

Besides hyperthreading is not a free lunch even in the heavy multi-threaded workloads that benefit from it the most. There are tons of issues with massive multithreading and consequently advantages that e-cores without hyperthreading introduce especially in data center.

Also if you did in fact want to add hyperthreading to Skymont it'd be less of a die size increase than you would think, maybe around 10-15 percent according to Intel's own figures comparing LIon cove with HT vs without.

In server loads, SMT has gained AMD 40% per pheonix reviews. For a desktop application, while 30% is certainly less than 40%, it is still considerable.

I also question the general use of Spec Int as a general performance metric. Arrow Lake really gets taken to the cleaners when the code has lots of back and fourth memory access. It really needs things to fit and STAY in the local L2. Skymont gets in trouble with lots of branches. I think this makes for a really tricky scheduler.

I am hoping to see SMT and AVX512 in Intel's next generation. They can't keep on having less of everything than AMD and expecting people to buy them (at least not at the same price).

Just to be fair, when AMD had dismal single threaded performance, but more cores, AMD suddenly moved the goal post to MT .... which at that time was a small amount of applications. Intel bet on high performance single core and won hearts and minds.

I see AMD doing the same thing today with Zen 5 and Zen 5 X3D. Seems like this message still works today.

I am surprised more people aren't talking about how great Lunar Lake is in thin and light. Seems like that product really hit a good cord, but all anyone cares about is high performance desktop benchmarks. Strange.