Discussion Intel Meteor, Arrow, Lunar & Panther Lakes + WCL Discussion Threads

[Tigerick]

Wildcat Lake (WCL) Preliminary Specs

Intel Wildcat Lake (WCL) is upcoming mobile SoC replacing ADL-N. WCL consists of 2 tiles: compute tile and PCD tile. It is true single die consists of CPU, GPU and NPU that is fabbed by 18-A process. Last time I checked, PCD tile is fabbed by TSMC N6 process. They are connected through UCIe, not D2D; a first from Intel. Expecting launching in Q2/Computex 2026. In case people don't remember AlderLake-N, I have created a table below to compare the detail specs of ADL-N and WCL. Just for fun, I am throwing LNL and upcoming Mediatek D9500 SoC.

		Intel Alder Lake - N	Intel Wildcat Lake	Intel Lunar Lake		Mediatek D9500
Launch Date		Q1-2023	Q2-2026 ?	Q3-2024		Q3-2025
Model		Intel N300	?	Core Ultra 7 268V		Dimensity 9500 5G
Dies		2	2	2		1
Node		Intel 7 + ?	Intel 18-A + TSMC N6	TSMC N3B + N6		TSMC N3P
CPU		8 E-cores	2 P-core + 4 LP E-cores	4 P-core + 4 LP E-cores		C1 1+3+4
Threads		8	6	8		8
Max Clock		3.8 GHz	?	5 GHz
L3 Cache		6 MB	?	12 MB
TDP		7 W	Fanless ?	17 W		Fanless
Memory		64-bit LPDDR5-4800	64-bit LPDDR5-6800 ?	128-bit LPDDR5X-8533		64-bit LPDDR5X-10667
Size		16 GB	?	32 GB		24 GB ?
Bandwidth			~ 55 GB/s	136 GB/s		85.6 GB/s
GPU		UHD Graphics		Arc 140V		G1 Ultra
EU / Xe		32 EU	2 Xe	8 Xe		12
Max Clock		1.25 GHz		2 GHz
NPU		NA	18 TOPS	48 TOPS		100 TOPS ?

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.

 

[adroc_thurston]

In Integer it'll likely beat Golden Cove and by a decent amount.

Ugh no.

They are doing pretty well with their E cores aren't they?

No they really aren't.

8-wide decode with 700+ ROB along with other necessary expansions will do that.

More stuff is bad yes.
They need to figure out the fundamentals first.

Alder/Raptor/MTL E cores are probably larger than expected because they are on the same die as the P cores, so they can't be optimized so well.

Chefe Atoms are still on the same die in all future Intel products, too.

 

[DavidC1]

@SiliconFly @eek2121 @FlameTail

The big Lunarlake slide leak is exactly the same shape as in Intel's slide. It's legit.

 

[DrMrLordX]

Intel’s yields on Intel 4 are said to be higher then Intel 7.

According to whom? 10nm was a disaster from the start, but the Intel 7 (or "super 7") they're using today for Raptor Lake has been through many revisions and now supplies the lion's share of product volume for Intel. In contrast, Intel 4 is Intel's first EUV node, and every product slated for release on that node was cancelled except for one relatively small compute tile for Meteor Lake. From the perspective of an outside observer, it certainly doesn't look like Intel 4 would have great yields. Maybe the yield% is improved by the fact that Intel never released any sizeable dice on Intel 4.

Intel would look pretty foolish talking about process leadership and coming up with this elaborate plan, executing on it for years, and then turning around and saying “just kidding guys, IFS sucks, we are using TSMC”.

Not trying to nitpick but I don't think the word "executing" is appropriate here. And it would be consistent with Intel's troubles as of late if they did use TSMC for Lunar Lake.

Intel 4 not so much cos it's a purpose built node for MTL's CPU tile.

What? No, Meteor Lake's compute tile just happened to be the "last man standing". The pipecleaner for Intel 4 was one of the Ponte Vecchio tiles. Intel cancelled that.

 

[Thunder 57]

According to whom? 10nm was a disaster from the start, but the Intel 7 (or "super 7") ...

Super 7? I haven't heard Intel 7 referred to as that. For a moment I thought it was the late 90's again!

 

[SiliconFly]

According to whom? 10nm was a disaster from the start, but the Intel 7 (or "super 7") they're using today for Raptor Lake has been through many revisions and now supplies the lion's share of product volume for Intel. In contrast, Intel 4 is Intel's first EUV node, and every product slated for release on that node was cancelled except for one relatively small compute tile for Meteor Lake. From the perspective of an outside observer, it certainly doesn't look like Intel 4 would have great yields. Maybe the yield% is improved by the fact that Intel never released any sizeable dice on Intel 4.

Yield is very different from volume. Yield is defect%. A node can have higher yield while having lower volume. Intel 4 is a high yield low volume node (EUV has a positive impact on yield).

 

[eek2121]

You are false. Intel confirmed more than once that Panther Lake will be the first consumer chip on 18A. There is zero about 18A on Lunar Lake and zero about any Intel process because it doesn't use any. It's the only upcoming chip where Intel never mentioned a process node unlike other upcoming chips in the next 1-2 years, logical thinking helps.

I am not gonna get into a debate about this. Intel has said Arrow Lake is Intel 20A multiple times, yet people still dispute. They have also stated multiple times that Lunar Lake is 18a.

The extra tag shown on the slides was originally there to show that Intel will also be working with third party partners on other parts of the chip (like they did with MTL)

Note that once upon a time Intel did have plans to use external fabs, but only as a backup in case IFS could not execute. It is my understanding that those plans have been shelved.

Other people here claim to have more knowledge than me and they might. I could be completely wrong. However, I suspect I am not (if I am, I have been fed BS). It makes absolutely no sense for Intel to use an external fab for their core IP. Doing so means they are admitting that IFS has failed. Disclosure requirements to shareholders would likely be required since Intel stock would fall, and from a technical standpoint? N3b is an inferior node to 20a/18a.

Anyway, I have said my piece. Time will show whether I am right or not.

 

[SiliconFly]

I am not gonna get into a debate about this. Intel has said Arrow Lake is Intel 20A multiple times, yet people still dispute. They have also stated multiple times that Lunar Lake is 18a.

The extra tag shown on the slides was originally there to show that Intel will also be working with third party partners on other parts of the chip (like they did with MTL)

Note that once upon a time Intel did have plans to use external fabs, but only as a backup in case IFS could not execute. It is my understanding that those plans have been shelved.

Other people here claim to have more knowledge than me and they might. I could be completely wrong. However, I suspect I am not (if I am, I have been fed BS). It makes absolutely no sense for Intel to use an external fab for their core IP. Doing so means they are admitting that IFS has failed. Disclosure requirements to shareholders would likely be required since Intel stock would fall, and from a technical standpoint? N3b is an inferior node to 20a/18a.

Anyway, I have said my piece. Time will show whether I am right or not.

I too agree on many of the points. CPU tile on N3B is disastrous for IFS and a total waste of tons of (design/porting) time and money... all for a low-volume niche product which isn't going to bring in lots of money for Intel and it's a onetime thing too where the design won't be reused. Doesn't make sense.

If it's on 20A or 18A, it makes perfect sense, as all the IPs can be partially or fully reused. Makes the investment worth it.

But there is still one major contradiction. The timelines for LNL release date (announced by Intel) and 18A volume ramp (announced by Intel) do not match. If LNL is on 18A, then LNL will launch 6 months after ARL (2025 H1) and not alongside it (like Intel's claims of 2024 launch).

It's confusing. Hope the idiots at Intel Marketing make decent slides instead of half cooked ones.

 

[eek2121]

I too agree on many of the points. CPU tile on N3B is disastrous for IFS and a total waste of tons of (design/porting) time and money... all for a low-volume niche product which isn't going to bring in lots of money for Intel and it's a onetime thing too where the design won't be reused. Doesn't make sense.

If it's on 20A or 18A, it makes perfect sense, as all the IPs can be partially or fully reused. Makes the investment worth it.

But there is still one major contradiction. The timelines for LNL release date (announced by Intel) and 18A volume ramp (announced by Intel) do not match. If LNL is on 18A, then LNL will launch 6 months after ARL (2025 H1) and not alongside it (like Intel's claims of 2024 launch).

It's confusing. Hope the idiots at Intel Marketing make decent slides instead of half cooked ones.

Intel could also pull up 18A volume production by a few months or launch in limited volume until 18a capacity scales. Also remember that “launch” != “available”

Altogether there is enough wiggle room that they could do it.

People are saying the same thing about Arrow Lake even though Intel has publicly stated and restated Arrow Lake will be on Intel 20A.

Every single time a reporter has asked them that, the answer has been the same.

Are they denying also using TSMC? Of course not. However the absence of a denial is not an admittance. Intel may want to keep their options open for the future.

Anyways, ASUS has announced NUCs with Meteor Lake recently. I was laid off recently, but as soon as I find employment again I hope to pick one up to play around with.

 

[jpiniero]

I too agree on many of the points. CPU tile on N3B is disastrous for IFS and a total waste of tons of (design/porting) time and money... all for a low-volume niche product which isn't going to bring in lots of money for Intel and it's a onetime thing too where the design won't be reused. Doesn't make sense.

If Arrow Lake desktop CPU tile is all N3B... that's not a low volume niche product.

Intel wants to sell the idea to Wall Street that they are staying on the leading edge of fabs... but they still have to have product to sell.

 

[mikk]

I am not gonna get into a debate about this. Intel has said Arrow Lake is Intel 20A multiple times, yet people still dispute. They have also stated multiple times that Lunar Lake is 18a.

It is on 20A+N3B. Note that the first versions will be on N3B which should be the 8+16 desktop tile. And no Intel didn't say Lunar is on 18A, this is false. They didn't specify any process because it isn't using an Intel node.

 

[maddie]

It makes absolutely no sense for Intel to use an external fab for their core IP. Doing so means they are admitting that IFS has failed.

Mentioned several times previously, I think this is the part troubling you the most. A horror, if true.

 

[uzzi38]

Handheld gaming might be too high TDP for it lol
Don't handhelds go up to 30 watts or slightly more in performance modes? I don't remember exactly.

Gaming handhelds are best suited to 15W due to battery sizes.

You can do more on many of them, but 15W performance is the best match.

 

[SiliconFly]

Intel could also pull up 18A volume production by a few months or launch in limited volume until 18a capacity scales. Also remember that “launch” != “available”

Altogether there is enough wiggle room that they could do it.

People are saying the same thing about Arrow Lake even though Intel has publicly stated and restated Arrow Lake will be on Intel 20A.

Every single time a reporter has asked them that, the answer has been the same.

Are they denying also using TSMC? Of course not. However the absence of a denial is not an admittance. Intel may want to keep their options open for the future.

Anyways, ASUS has announced NUCs with Meteor Lake recently. I was laid off recently, but as soon as I find employment again I hope to pick one up to play around with.

Makes sense. LNL might probably have a limited volume launch alongside ARL with wide availability after a couple of months later. That works.

 

[SiliconFly]

People are saying the same thing about Arrow Lake even though Intel has publicly stated and restated Arrow Lake will be on Intel 20A.

Yep! ARL is clearly on 20A like Intel has said many times.

If Arrow Lake desktop CPU tile is all N3B... that's not a low volume niche product.

Intel wants to sell the idea to Wall Street that they are staying on the leading edge of fabs... but they still have to have product to sell.

One thing thats clear about ARL is, it's on 20A (not N3B).

ARL on N3B is just an unsubstantiated rumor based on false interpretation of some old Intel slides.

 

[trivik12]

Already we have a benchmark for lunar lake though I am not sure if its correct as its saying for a desktop and lunar lake is just for ULPC unless its about AIO.

Details for Computer/Device Intel Lunar Lake Client Platform Lunar Lake Client System (Intel LNL-M LP5 RVP1)

ranker.sisoftware.co.uk

 

[SiliconFly]

Just went thru many older articles thoroughly from recognized sources about LNL being on 18A, 20A or N3B and one thing is clear. There's no one right answer.

All speculation of LNL on N3B is mostly based on this one confusing Intel slide. Some of the articles even mention outright that they're only speculating based on the slide and publicly available information. But it's impossible to say how much right or wrong this slide is.

Then there is this slightly older Intel slide which clearly indicates LNL is on 18A. But since it's a bit old, the roadmap might have changed since it was published. So, we can't be 100% sure.

Then we have another (possible) Intel slide which says LNL is N3B. I'm not sure whether it's actually from Intel themselves, or more likely an OEM partner. There's a chance it might be legit.

So, it brings us back to square one. LNL can be on 18A or 20A or N3B until Intel says otherwise.

 

[Khato]

Then there is this slightly older Intel slide which clearly indicates LNL is on 18A. But since it's a bit old, the roadmap might have changed since it was published. So, we can't be 100% sure.

I don't even see 18A mentioned on that slide? Just 'Intel Next' and 'External' beneath 'Lunar Lake & Beyond'.

Regardless, Intel won't have much problem explaining the usage of external process for client processors if they maintain effectively 100% utilization of all IFS fabs. The message at that point is pretty simple - this is why we're building more fabs, we don't have enough capacity in IFS to meet demand. Now the naysayers will claim such is due to poor yields etc, but it really is just a matter of a certain previous CEO stalling new construction for years.

 

[Dayman1225]

All speculation of LNL on N3B is mostly based on this one confusing Intel slide. Some of the articles even mention outright that they're only speculating based on the slide and publicly available information. But it's impossible to say how much right or wrong this slide is.

Then there is this slightly older Intel slide which clearly indicates LNL is on 18A. But since it's a bit old, the roadmap might have changed since it was published. So, we can't be 100% sure.

How is the first slide confusing and the second one clear, basically the same slide except Intel next/18A and external are swapped.

LNL is N3B
ARL is N3B AND 20A
Panther is 18A

 

[trivik12]

I dont know what Intel is doing in hiding the node for a product. It has to come out and the product is already shipped to OEMs so the info will be leaked through that as well(though I am not sure one can guess the node just looking at the chip).

 

[SiliconFly]

How is the first slide confusing and the second one clear, basically the same slide except Intel next/18A and external are swapped.

LNL is N3B
ARL is N3B AND 20A
Panther is 18A

The second (older) slide clearly starts with MTL on Intel 4 AND External. Since MTL CPU tile is not TSMC, that means only one thing:

MTL CPU Tile (Intel 4) + Other Tiles (External)
and,
ARL CPU Tile (Intel 20A) + Other Tiles (External)
LNL CPU Tile (Intel Next) + Other Tiles (External)

Thats the most direct way to read that slide. Makes it very obvious. But here's the kicker. Just got a screen grab of Pat's speech from Intel Innovation. And he very clearly says this:



He said "18A is on track, PDK 0.9 is almost ready and the first two designs of 18A will be Panther Lake & Clearwater Forest!" Howzzat? So, Pat himself says LNL is not 18A!!!!!

That leaves us with just two alternatives for LNL, 20A or N3B. Among these two, my bet is on N3B. Cos, Battlemage is N3B and porting LNL to N3B is easier and cheaper cos LNL design is node agnostic. At the same time, porting Battlemage to 20A is a nightmare cos it's freaking expensive and just not worth the effort.

This tomshardware article also has come to the same conclusion. Now all evidence clearly points to N3B.

So, LNL is mostly N3B.

 

[mikk]

That leaves us with just two alternatives for LNL, 20A or N3B. Among these two, my bet is on N3B. Cos, Battlemage is N3B and porting LNL to N3B is easier and cheaper cos LNL design is node agnostic. At the same time, porting Battlemage to 20A is a nightmare cos it's freaking expensive and just not worth the effort.

This tomshardware article also has come to the same conclusion. Now all evidence clearly points to N3B.

So, LNL is mostly N3B.

20A is no option either, otherwise they would have confirmed it happily. The fact they never mentioned the process node on Lunar Lake is telling. We got a really big leak not long ago with N3B in it and people are still try to deny it. The same will happen with ARL on N3B and 20A.

 

[hemedans]

Gaming handhelds are best suited to 15W due to battery sizes.

You can do more on many of them, but 15W performance is the best match.

Even 15w isn't ideal that can be less than 2 hour of battery life, most people who get 3-4H battery life in deck they set 8-9W, I think meteor lake has potential here but with E cores or those LP cores not P cores.

 

[TESKATLIPOKA]

Even 15w isn't ideal that can be less than 2 hour of battery life, most people who get 3-4H battery life in deck they set 8-9W, I think meteor lake has potential here but with E cores or those LP cores not P cores.

What is important is IGP and how efficient It is, after all we are talking about gaming.
CPU cores are not as important, but It wouldn't hurt being more efficient either.

 

[DrMrLordX]

Yield is very different from volume. Yield is defect%. A node can have higher yield while having lower volume. Intel 4 is a high yield low volume node (EUV has a positive impact on yield).

Okay, great. Now explain why you think Intel 4 is actually high yield. Given how many critical products (especially Ponte Vecchio) had to be pulled off Intel 4, my guess is that Intel 4 has a high defect rate.

 

[FlameTail]

What is this....