Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

[Tigerick]

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.





Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

 

[FlameTail]

You can't compare teraflops across GPU architectures from different vendors.

Of course. I said 4.6 TFLOP only because that's the only identifier that GPU has. Qualcomm hasn't said how many cores it has, at what MHz it's running or it's architectural details.

Anyways here's a benchmark:

 

[cebri1]

I think this a pretty significant result for Intel. Matching the 780M on the first real iteration of a capable iGPU, considering the years of experience AMD has. Well done Intel.

 

[DrMrLordX]

puts on her NostaSeronx hat

Careful, it might get stuck.

Tunnel Lake => ????

Still waiting on my Tunnelborer, AMD. Maybe Intel licensed the design from them????

 

[eek2121]

Frequency could differ of course. It's the same chip with same features at the end of the day. Base clock isn't lower on 185H. Not sure if 3.8 Ghz is accurate btw, it's really high for 28W, maybe without GPU load. 2.5 Ghz is nonsense however considering that Raptor Lake 13900 already runs at 2.6 Ghz base. You are talking like we have confirmed base clock speeds which is not true.

Very likely an inaccurate reading.

Base clock will be similar to other chips unless other things (E-core frequencies, GPU, etc) are drastically different.

Base frequencies are high due to new process. Same goes for “low” boost frequencies. I also believe the boost clock may be a misread, either that or Intel has another ultra 9 SKU planned. I say this because there was an MTL chip that had 5323, 5386, and 5401 mhz as peak boost clock readings. The leak is gone now…

Intel Arc "Meteor Lake" integrated GPU has been tested in OpenCL benchmark, faster Arc A350M - VideoCardz.com

Intel Arc Alchemist integrated GPU performance between A370M and A350M mobile graphics This is the very first benchmark featuring Intel’s new generation of integrated graphics. There is a new Arc in town. This time, it is entering the third phase, which is its integration into a next-generation...

videocardz.com

If it's slower than 780M, it's a

View attachment 88907

Maybe for a gamer. Not for everyone else.

You can't compare teraflops across GPU architectures from different vendors.

This.

 

[Geddagod]

Anyone know how much silicon area Phoenix is spending on its iGPU? I'm completely guessing that Phoenix's area efficiency is still much higher than Intel's, even with MTL.

 

[tamz_msc]

Anyone know how much silicon area Phoenix is spending on its iGPU? I'm completely guessing that Phoenix's area efficiency is still much higher than Intel's, even with MTL.

Why compare tiled vs monolithic?

 

[dullard]

Why compare tiled vs monolithic?

Or along those lines, which tile to compare? The CPU with Intel 4? The iGPU with TSMC N5? The SoC with TSMC N6?

 

[Geddagod]

Why compare tiled vs monolithic?

Obv there's going to be some overhead, but I highly doubt it's going to be extremely large.

Or along those lines, which tile to compare? The CPU with Intel 4? The iGPU with TSMC N5? The SoC with TSMC N6?

I literally specified iGPU.
Also, there are some aspects of the iGPU that got moved off to the SOC tile, but I wouldn't be surprised that even with that advantage, if Intel's iGPU tile is still less area efficient than Phoenix's

 

[mikk]

I literally specified iGPU.
Also, there are some aspects of the iGPU that got moved off to the SOC tile, but I wouldn't be surprised that even with that advantage, if Intel's iGPU tile is still less area efficient than Phoenix's

Considering how large the media+display units are on a modern GPU I doubt it. GT1 of MTL is roughly 23mm², GT2 with twice the compute units should be something between 40-50mm². Phoenix is 178mm² overall with a GPU size allocation of 30%, 40%? Don't forget MTL has 33% more compute units build in - AMD uses higher clock speeds to compensate for it.

 

[Geddagod]

Considering how large the media+display units are on a modern GPU I doubt it. GT1 of MTL is roughly 23mm², GT2 with twice the compute units should be something between 40-50mm². Phoenix is 178mm² overall with a GPU size allocation of 30%, 40%? Don't forget MTL has 33% more compute units build in - AMD uses higher clock speeds to compensate for it.

Makes sense. I don't actually think we have a detailed Phoenix die shot (well full phoenix at least) so it's tough to break it down much more.

 

[dullard]

I literally specified iGPU.

You specified iGPU for Phoenix and then just a general Meteor Lake without specifying which tile.

 

[Geddagod]

You specified iGPU for Phoenix and then just a general Meteor Lake without specifying which tile.

You're right. I meant to compare the area Phoenix spends on the iGPU vs the amount of area MTL spends on the CPU.

 

[dullard]

You're right. I meant to compare the area Phoenix spends on the iGPU vs the amount of area MTL spends on the CPU.

You want to compare a TSMC 4 nm GPU to a TSMC N5 GPU and then claim one is more area efficient than the other. What a surprising result you might get.

 

[H433x0n]

You're right. I meant to compare the area Phoenix spends on the iGPU vs the amount of area MTL spends on the CPU.

I don’t think MTL will win that comparison. MTL iGPU has a portion of the silicon dedicated to different tasks with built in XMX & RT acceleration.

Radeon is also more efficient with area than the still immature Intel graphics architectures.

 

[Geddagod]

You want to compare a TSMC 4 nm GPU to a TSMC N5 GPU and then claim one is more area efficient than the other. What a surprising result you might get.

Ye, because the jump from N4 from N5 (6%) is such a large and meaningful density improvement lol
Stop trying bud, all this just cuz u thought I was tryna compare the phoenix igpu to the cpu of MTL lmao

I don’t think MTL will win that comparison. MTL iGPU has a portion of the silicon dedicated to different tasks with built in XMX & RT acceleration.

Radeon is also more efficient with area than the still immature Intel graphics architectures.

Ye idk. We will see when MTL die shots come out, and Phoenix (not Phoenix 2) die shots too (I think we have diagrams of both archs, but I'm not sure exactly how area accurate they both are).

 

[uzzi38]

You want to compare a TSMC 4 nm GPU to a TSMC N5 GPU and then claim one is more area efficient than the other. What a surprising result you might get.

You think a peak 6% logic shrink (no SRAM shrink) makes for a super unfair comparison?

Alright then bud.

 

[dullard]

Ye, because the jump from N4 from N5 (6%) is such a large and meaningful density improvement lol
Stop trying bud, all this just cuz u thought I was tryna compare the phoenix igpu to the cpu of MTL lmao

The GPUs are so different in areas due to the needs of internal connection vs external connection, different numbers of execution units, different supported features, the fact that Meteor Lake's GPU is split into both TSMC N6 (on the SoC tile) and N5 (on the GPU tile), etc. Especially since the display controller and media engine are both on N6 it is FAR from being just a 6% density difference. But, go ahead and beat your chest with pride that Phoenix's use of TSMC 4 nm display controller is more area efficient than Meteor Lakes use of TSMC 6 nm.

At least TSMC 4 nm vs Intel 4 would have been an interesting comparison. I realize that CPUs are more complex than GPUs, but at least we would have something really interesting to compare. And do note, that it is you making up the idea that I thought you were comparing a GPU to a CPU. I simply stated that you didn't specify. Even if your statement was explicitly clear that it was iGPU vs iGPU you still didn't specify the meteor lake graphics capabilities on the N6 SoC or the N5 tile. But you do you.

 

[dullard]

You think a peak 6% logic shrink (no SRAM shrink) makes for a super unfair comparison?

Alright then bud.

See my post above, it isn't just a 6% shrink. Only parts are a 6% shrink. Some of Meteor Lakes graphics are on TSMC N6. Who said unfair? Both will be recent chips with similar use cases. That is a fair comparison. I just said it wouldn't be surprising that TSMC 4 nm is more area efficient than TSMC's larger nodes.

 

[mikk]

I don’t think MTL will win that comparison. MTL iGPU has a portion of the silicon dedicated to different tasks with built in XMX & RT acceleration.

Radeon is also more efficient with area than the still immature Intel graphics architectures.

There is no XMX in Meteor Lake GPU tile.

 

[Geddagod]

An entire essay and an edit 8 mins later, you taking this pretty seriously huh? lmao

The GPUs are so different in areas due to the needs of internal connection vs external connection,

1) I doubt that adds much area regardless (based on the diagrams Intel has shown)
2) This is exactly why I said having die shots of both CPUs would be nice earlier, you could remove that from the calculations

different numbers of execution units

Doesn't matter if perf is similar

the fact that Meteor Lake's GPU is split into both TSMC N6 (on the SoC tile) and N5 (on the GPU tile), etc

Already brought up by someone else, and responded too there as well lol

Especially since the display controller and media engine are both on N6 it is FAR from being just a 6% density difference.

That's legit an advantage for Intel's area, since I wasn't even counting that. But, you can easily just exclude both of those from the calculations, from AMD's die shot, which is why I was asking for it above, in multiple comments actually.

But, go ahead and beat your chest with pride that Phoenix's use of TSMC 4 nm display controller is more area efficient than Meteor Lakes use of TSMC 6 nm.

Again, I never even was going to count that. Did you even read any of the other messages in this thread, or did you just see so much red after reading my comment you just focused all your attention on this essay of a reply?

And do note, that it is you making up the idea that I thought you were comparing a GPU to a CPU. I simply stated that you didn't specify.

It doesn't take a genius to realize that I was talking about an iGPU vs iGPU comparison. It would be ridiculous to compare anything different.
Also, you literally said "which tile to compare? The CPU with Intel 4?" lmao

But you do you.

You do you? Bud, I would like to, but someone is typing out a article defending his honor every time I poke fun of you not understanding that it doesn't need to be specified that one should compare an iGPU vs an iGPU in area, since that is something that shouldn't have to be said explicitly based on how obvious it is.

 

[dullard]

You do you? Bud, I would like to, but someone is typing out a article defending his honor every time I poke fun of you not understanding that it doesn't need to be specified that one should compare an iGPU vs an iGPU in area, since that is something that shouldn't have to be said explicitly based on how obvious it is.

I'm simply trying to get people to communicate better here for more meaningful discussions. If your first post on the topic requires others to memorize multiple other pages (that you weren't part of), then you could have done it better. Just say what you want to say and say it completely. That is all. Nothing to get worked up about.

Here is what you could have typed (my edits in red) and all of this would not have happened. Why don't people just want to be clear and precise here? Without the part in red, people can get confused, angry, and the forum gets worse. For example, you never specified that you weren't counting the display controller or the media engine until it was called out. Those words don't appear in any recent pages of this thread. So how were we to guess that you wanted to exclude these necessary parts of the iGPU?

I'm completely guessing that Phoenix's iGPU (excluding media engine and display controller) area efficiency is still much higher than Intel's MTL iGPU (excluding media engine and display controller).

On topic, I happen to disagree with you on a fundamental point. I think that spreading connections out to allow for multiple tiles to connect/communicate requires far more area than a monolithic connection requires. While companies are working to get the connections smaller (EMIB, interposers, Foveros, etc) the connections are all currently WAY bigger than a few single nm thick wires would require. For example, the Foveros bumps that Meteor Lake uses are 25 um to 50 um in size. Not nanometers, micrometers. ~1000x larger connections needed in each direction. In terms of area, that is ~1000^2 times larger for a Forveros bump vs a monolithic wire.

 

[Geddagod]

I'm simply trying to get people to communicate better here for more meaningful discussions.

What a noble pursuit

If your first post on the topic requires others to memorize multiple other pages (that you weren't part of), then you could have done it better.

It literally doesn't.
It would be nice if you read a couple of messages in between the comment you last made and the one you're making now, not multiple pages lol, But I did reiterate it anyway, so it's not a problem.

Nothing to get worked up about.

I'm not the one typing essays out here lol

and all of this would not have happened.

All of this could not have happened if you just took a joke

For example, you never specified that you weren't counting the display controller or the media engine until it was called out.

Can't believe I had to waste one whole extra line in the 140 pages of this thread. That's ma fault.

Without the part in red, people can get confused, angry, and the forum gets worse.

It's literally just you lol

I think that spreading connections out to allow for multiple tiles to connect requires far more area than a monolithic connection requires.

I doubt it does for MTL's IGPU tile specifically, at least based on the diagrams Intel has shown, though it's dubious how area accurate it is. Which is why die shots for both would be nice, something I also mentioned above.

 

[Saylick]

Y'all need to relax.

 

[Geddagod]

Y'all need to relax.

 

[majord]

View attachment 88912
I think this a pretty significant result for Intel. Matching the 780M on the first real iteration of a capable iGPU, considering the years of experience AMD has. Well done Intel.

what are we looking at?