Discussion Intel current and future Lakes & Rapids thread

[SiliconFly]

A while ago, MLID said ARL & LNL are going to be on TSMC N3B in spite of Intel saying otherwise. Now, RGT has posted Intel Q3 earnings call on X/twitter which is more in line with Intel's previous claims.

Looks like MLID is wrong again. Intel is keeping their client CPU tiles in their own fabs after all. ARL -> 20A, LNL->20A(?), Panther Lake -> 18A. No client CPU tiles in TSMC (only the other tiles as expected).

And Panther Lake is not some scaled down niche offering like LNL. It is the main client offering like MTL & ARL (ARL-R 8+32 is the niche offering in 2025).

And Pat has repeated the same "breakthru ppw for ARL" which is inline with the 63% ppw gain ARL is getting jumping from the outdated Intel 7 -> 20A. ARL sounds awesome!

 

[DrMrLordX]

Intel is keeping their client CPU tiles in their own fabs after all.

They probably aren't even taking any N3B wafers, so how would they put Arrow Lake on N3B? I think the original plan was to use both N3B and 20a for Arrow Lake, but obviously that's changed.

 

[SiliconFly]

They probably aren't even taking any N3B wafers, so how would they put Arrow Lake on N3B? I think the original plan was to use both N3B and 20a for Arrow Lake, but obviously that's changed.

Ok. But it was MLID who recently claimed ARL is also gonna be on TSMC N3B. I was just pointing out the error.

 

[jpiniero]

Ok. But it was MLID who recently claimed ARL is also gonna be on TSMC N3B. I was just pointing out the error.

It's likely dual sourced.

Now... they might be able to wiggle out of the TSMC part if they want... but that would also likely mean they wouldn't have enough supply to fully cover the desktop market. They would have to do something about that... and I have a feeling that would end up being Raptor Lake Refresh Refresh.

 

[Geddagod]

Looks like MLID is wrong again. Intel is keeping their client CPU tiles in their own fabs after all. ARL -> 20A, LNL->20A(?), Panther Lake -> 18A. No client CPU tiles in TSMC (only the other tiles as expected).

No, they never said all that lol. Again, look at the quote, all they said was ARL was on 20A. ARL is also going to be on N3 and LNL is only N3. This is also officially from Intel themselves.

And Panther Lake is not some scaled down niche offering like LNL. It is the main client offering like MTL & ARL (ARL-R 8+32 is the niche offering in 2025).

MTL is exactly a scaled down offering, tho it's not as niche as LNL.

which is inline with the 63% ppw gain ARL

You cannot simply multiply all the ppw improvements like that, not how it works lol

 

[SiliconFly]

No, they never said all that lol. Again, look at the quote, all they said was ARL was on 20A. ARL is also going to be on N3 and LNL is only N3. This is also officially from Intel themselves.
View attachment 87894

MTL is exactly a scaled down offering, tho it's not as niche as LNL.

You cannot simply multiply all the ppw improvements like that, not how it works lol

This slide keeps coming up frequently & is being wrongly interpreted. The purple External square indicates TSMC for all other tiles. Not the CPU tile.

As for the ppw gains, Intel has published the data already. 7 -> 4 -> 3 -> 20A. The math is simpler than you think.

 

[SiliconFly]

It's likely dual sourced.

Now... they might be able to wiggle out of the TSMC part if they want... but that would also likely mean they wouldn't have enough supply to fully cover the desktop market. They would have to do something about that... and I have a feeling that would end up being Raptor Lake Refresh Refresh.

Dual sourcing sounds good. But Intel hasn't mentioned anything about using TSMC for their CPU tiles. We haven't had any credible leaks either. So, it's safe to assume the CPU tiles are exclusive to Intel fabs as of now.

 

[Geddagod]

This slide keeps coming up frequently & is being wrongly interpreted. The purple External square indicates TSMC for all other tiles. Not the CPU tile.

As for the ppw gains, Intel has published the data already. 7 -> 4 -> 3 -> 20A. The math is simpler than you think.

No, because if that was true than they would have included TSMC N5 on the "MTL and ARL" section since MTL uses N5 on the iGPU tile. That's been confirmed by Intel themselves. It's only the CPU tiles.
Also you can't multiply PPW like that. We have no idea where on the PPW curve they are getting their numbers.

We haven't had any credible leaks either. So, it's safe to assume the CPU tiles are exclusive to Intel fabs as of now.

Literally every leaker is saying it's going to be on TSMC N3 as well lol

 

[igor_kavinski]

And Pat has repeated the same "breakthru ppw for ARL" which is inline with the 63% ppw gain ARL is getting jumping from the outdated Intel 7 -> 20A. ARL sounds awesome!

Oh no! Everyone better dump your AMD stock now! Arrow Lake will demolish AMD and then run over it backwards because it looks up and Pat sees it in the rear view mirror!

 

[Goop_reformed]

Or maybe we should support AMD and buy their over-rated products, so they don't amass way too much losses.

Amd products are over-rated? How so in comparison to Intel servers and desktop offerings?

 

[dullard]

A while ago, MLID said ARL & LNL are going to be on TSMC N3B in spite of Intel saying otherwise.

Please learn to read MLID's Key. Anything in darker blue is essentially confirmed. Anything in light blue is speculation based on rumors. Anything in white is MLID's total guess.



In your examples N3 was in dark blue. B was in light blue. As in MLID is saying N3B is just a rumor--he isn't claiming it is a certainty.


If you don't take the time to understand his posts, then you cannot honestly claim they are right/wrong.

 

[eek2121]

They probably aren't even taking any N3B wafers, so how would they put Arrow Lake on N3B? I think the original plan was to use both N3B and 20a for Arrow Lake, but obviously that's changed.

They never planned to use N3 for compute tiles. Saying “things changed” is a cop-out. Things did not change. A bunch of people took a marketing slide and a few other actually legit leaks out of context and got everything mixed up and wrong.

This slide keeps coming up frequently & is being wrongly interpreted. The purple External square indicates TSMC for all other tiles. Not the CPU tile.

As for the ppw gains, Intel has published the data already. 7 -> 4 -> 3 -> 20A. The math is simpler than you think.

Of course it was. I keep telling people this.

No, because if that was true than they would have included TSMC N5 on the "MTL and ARL" section since MTL uses N5 on the iGPU tile. That's been confirmed by Intel themselves. It's only the CPU tiles.
Also you can't multiply PPW like that. We have no idea where on the PPW curve they are getting their numbers.

Literally every leaker is saying it's going to be on TSMC N3 as well lol

The legit ones knew exactly what was going on. Intel has been pretty clear on plans since 2020 or so. Intel CPU compute tiles in client systems will always use an Intel fab unless something unpredictable happens.

Intel has and will continue to use a mix of internal and external fabs for everything else.

Intel does actually plan to eventually move the GPU in-house. It will be a while, however.

Intel has used TSMC for specialty orders (for CPU compute) in the past, but none of those chips were ever sold externally to my knowledge (unless I am forgetting a chip).

They are strongly against using an external fab for core IP for reasons I mentioned in earlier posts.

If Intel fabs run into more issues or they receive a crazy good deal (such as being able to make the chip much cheaper externally) we could possibly see some movement, but until then…

 

[SiliconFly]

Please learn to read MLID's Key. Anything in darker blue is essentially confirmed. Anything in light blue is speculation based on rumors. Anything in white is MLID's total guess.

View attachment 87899

In your examples N3 was in dark blue. B was in light blue. As in MLID is saying N3B is just a rumor--he isn't claiming it is a certainty.
View attachment 87900

If you don't take the time to understand his posts, then you cannot honestly claim they are right/wrong.

Be he's saying with high confidence that ARL CPU tile is gonna be on N3. And I don't think is gonna happen.

 

[SiliconFly]

They never planned to use N3 for compute tiles. Saying “things changed” is a cop-out. Things did not change. A bunch of people took a marketing slide and a few other actually legit leaks out of context and got everything mixed up and wrong.

Of course it was. I keep telling people this.

The legit ones knew exactly what was going on. Intel has been pretty clear on plans since 2020 or so. Intel CPU compute tiles in client systems will always use an Intel fab unless something unpredictable happens.

Intel has and will continue to use a mix of internal and external fabs for everything else.

Intel does actually plan to eventually move the GPU in-house. It will be a while, however.

Intel has used TSMC for specialty orders (for CPU compute) in the past, but none of those chips were ever sold externally to my knowledge (unless I am forgetting a chip).

They are strongly against using an external fab for core IP for reasons I mentioned in earlier posts.

If Intel fabs run into more issues or they receive a crazy good deal (such as being able to make the chip much cheaper externally) we could possibly see some movement, but until then…

Agree. Except for that misleading marketing slide, Intel has never mentioned moving the cpu tile to TSMC. Thats why I keep saying MLID is wrong about ARL being on N3.

 

[SiliconFly]

They probably aren't even taking any N3B wafers, so how would they put Arrow Lake on N3B? I think the original plan was to use both N3B and 20a for Arrow Lake, but obviously that's changed.

Good to know. Then based on what info MLID makes the "High Confidence" claim?

 

[Kepler_L2]

They never planned to use N3 for compute tiles. Saying “things changed” is a cop-out. Things did not change. A bunch of people took a marketing slide and a few other actually legit leaks out of context and got everything mixed up and wrong.

Of course it was. I keep telling people this.

The legit ones knew exactly what was going on. Intel has been pretty clear on plans since 2020 or so. Intel CPU compute tiles in client systems will always use an Intel fab unless something unpredictable happens.

Intel has and will continue to use a mix of internal and external fabs for everything else.

Intel does actually plan to eventually move the GPU in-house. It will be a while, however.

Intel has used TSMC for specialty orders (for CPU compute) in the past, but none of those chips were ever sold externally to my knowledge (unless I am forgetting a chip).

They are strongly against using an external fab for core IP for reasons I mentioned in earlier posts.

If Intel fabs run into more issues or they receive a crazy good deal (such as being able to make the chip much cheaper externally) we could possibly see some movement, but until then…

 

[SiliconFly]

View attachment 87902

So they did have a N3 part. But cancelled early I think. Looks like ADM also went down the drain along with this. But the recent MLID slide still claims that ARL is also still on N3. So, ARL Halo still exists? Or something else? Or intel tCPU on N3 entirely cancelled?

 

[Kepler_L2]

So they did have a N3 part. But cancelled early I think. Looks like ADM also went down the drain along with this. But the recent MLID slide still claims that ARL is also still on N3. So, ARL Halo still exists? Or something else? Or intel tCPU on N3 entirely cancelled?

There is still a CPU tile on N3.

 

[jpiniero]

There is still a CPU tile on N3.

There has been rumors though that they are at least having second thoughts about actually going forward with it.

TSMC probably wants to convert the N3B production lines to N3E ASAP too so I could see Intel getting off easy if they choose not to use it.

 

[Doug S]

There has been rumors though that they are at least having second thoughts about actually going forward with it.

TSMC probably wants to convert the N3B production lines to N3E ASAP too so I could see Intel getting off easy if they choose not to use it.

TSMC has plenty of reason to minimize the amount of production on N3B, so either a carrot "we'll fund porting your design from N3B to N3E if you agree to eliminate or minimize your usage of N3B" or a stick "yields of N3B are crappy and you aren't getting the known good die deal Apple did" would likely be sufficient to encourage them towards N3E. If not from day one then ASAP.

Heck even Apple's KGD deal might have an expiration date, encouraging them to have an N3E spin of A17P ready to go once TSMC flips the mass production switch on N3E.

 

[Geddagod]

The legit ones knew exactly what was going on.

Like who?
Edit:

A bunch of people took a marketing slide and a few other actually legit leaks out of context and got everything mixed up and wrong.

What was out of context about that Intel slide?

 

[mikk]

They never planned to use N3 for compute tiles. Saying “things changed” is a cop-out. Things did not change. A bunch of people took a marketing slide and a few other actually legit leaks out of context and got everything mixed up and wrong.

This is nonsense, how can you be so wrong? It is fictitious level, you claim something without any source. ARL is on both N3+20A, Intel themselves told us and every trustable leaker I'm aware of says the same. Furthermore LNL compute tile is on N3.

 

[DrMrLordX]

Now... they might be able to wiggle out of the TSMC part if they want... but that would also likely mean they wouldn't have enough supply to fully cover the desktop market. They would have to do something about that... and I have a feeling that would end up being Raptor Lake Refresh Refresh.

Yup, I think (based on various leaks) is that the original plan was for Arrow Lake-S 8+16 to be on N3B and for mobile Arrow Lake 6+8/2+8/other configs to be on 20a. But with Intel delaying their N3 deliveries (to wait for N3E cuz N3B is looking kinda jank), that kills their plans for 8+16 tiles on N3B. Which means they either have to try 8+16 compute tiles on 20a with limited supply because who knows how bad the yields will be for that? Or they get only 6+8 tiles ala Meteor Lake.

They never planned to use N3 for compute tiles.

See above.

This is nonsense, how can you be so wrong?

He's entitled to his opinions, even if they might be wrong. Mine might be wrong too. I'm not an insider or anything. At this point it's pretty clear that we won't be seeing Arrow Lake compute tiles on N3B anymore but hey Intel could surprise us somehow!

edit: based on what @Kepler_L2 posted even some of the 6+8 tiles might have been on N3 originally? Which is certainly interesting.

 

[H433x0n]

Yup, I think (based on various leaks) is that the original plan was for Arrow Lake-S 8+16 to be on N3B and for mobile Arrow Lake 6+8/2+8/other configs to be on 20a. But with Intel delaying their N3 deliveries (to wait for N3E cuz N3B is looking kinda jank), that kills their plans for 8+16 tiles on N3B. Which means they either have to try 8+16 compute tiles on 20a with limited supply because who knows how bad the yields will be for that? Or they get only 6+8 tiles ala Meteor Lake.

It’s too late in the process to switch to N3E for ARL, or any other TSMC node for that matter. It’s arguably too late to swap the 8+16 tile to 20A unless for some reason they were doing parallel development on the top die this entire time.

Maybe they decide the bad PR of using a TSMC node and lackluster performance necessitates a change but I’d say it’s probably unlikely. Intel’s bring up process is notoriously long and it’s a hyper competitive environment so I don’t see them risking any type of delay.

 

[DrMrLordX]

It’s too late in the process to switch to N3E for ARL, or any other TSMC node for that matter.

Exactly, which is part of what I said. Intel will likely not use any N3 node for Arrow Lake.

It’s arguably too late to swap the 8+16 tile to 20A unless for some reason they were doing parallel development on the top die this entire time.

Parallel development would be the only way they could effectively switch the 8+16 die to 20a, yes.