Discussion Intel current and future Lakes & Rapids thread

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Saylick

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Sep 10, 2012
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This made me recall something I saw (maybe at semiwiki?) last year claiming that Intel was only doing BSPD and not BPR with 20A AND 18A. I'm pretty sure I heard that TSMC was going for both with N2P but they obviously haven't announced anything officially about that so its all based on rumors. Given the nearly non existent shrink they have already claimed for N2, plus the rumors that would be addressed the following year, it would seem they'd have to be doing BPR with N2P.

If Intel has already successfully tested BSPD with Intel 3 the wafer handling concerns would appear to be addressed. Well, at least for one off tests, that doesn't necessarily imply it is feasible at production quantities yet but I have to believe the vendors of wafer handling equipment are or will be ready. BPR is the big piece as far as scaling as I understand it, as the width of power vias has become an effective limiter on further reductions in cell size.
Intel is doing BSPD with PowerVia starting with 20A, while TSMC is doing BSPD with BPR with N2P.

1692910952683.png
 

A///

Diamond Member
Feb 24, 2017
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This made me recall something I saw (maybe at semiwiki?) last year claiming that Intel was only doing BSPD and not BPR with 20A AND 18A. I'm pretty sure I heard that TSMC was going for both with N2P but they obviously haven't announced anything officially about that so its all based on rumors. Given the nearly non existent shrink they have already claimed for N2, plus the rumors that would be addressed the following year, it would seem they'd have to be doing BPR with N2P.

If Intel has already successfully tested BSPD with Intel 3 the wafer handling concerns would appear to be addressed. Well, at least for one off tests, that doesn't necessarily imply it is feasible at production quantities yet but I have to believe the vendors of wafer handling equipment are or will be ready. BPR is the big piece as far as scaling as I understand it, as the width of power vias has become an effective limiter on further reductions in cell size.
Intel has been pushing for powervia with bspd with nano tsv vs traditional tsv. it's more dense compared to bspd with pbr that imec is pushing. coincidentally imec developed nano tsv a few years ago for heterogeneous design integration.
 

FangBLade

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Apr 13, 2022
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Yes, but not a lot of models, expect a much more healthy amount to be available in H1’24
I hope the availability will be better than the AMD Phoenix. I'm looking to get myself a new laptop, and efficiency is a very important factor for me. The Phoenix offers both efficiency and excellent integrated graphics, but the model I want doesn't have that processor version. MTL seems like an excellent alternative to me. According to all the leaks, Intel has been focusing on efficiency, and the iGPU should experience significant growth, so I hope I won't have to wait for long.
 

A///

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Feb 24, 2017
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i mentioned it a while back but my hunch is on hp and dell having first access since they are the biggest sellers in the laptop game. acer, asus, lenovo, samsung and other random brands will get it in 1h.
 

SiliconFly

Golden Member
Mar 10, 2023
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Something very interesting popped up recently regarding Intel 4. Many sites including Wikichip & Semiwiki have already reported that Intel 4 (HP library) is almost on par with TSMC N3 long back. But some new research by IC Knowledge has revealed that Intel 4 actually has better density than TSMC N3 (HP cells).

It specifically states, that Intel 4 has slightly higher density than TSMC N3.

This means, Intel 4 is easily on par or slightly better than TSMC N3. And considering Intel 3 has 18% higher PPA than Intel 4, Intel 3 will also comfortably beat TSMC N3 by a decent margin this year itself when it RTMs in Q4.

This makes MTL the 1st Intel CPU to actually have a (slight) node advantage over competition after many years!
 
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Henry swagger

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Feb 9, 2022
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Something very interesting popped up recently regarding Intel 4. Many sites including Wikichip & Semiwiki have already reported that Intel 4 (HP library) is almost on par with TSMC N3 long back. But some new research by IC Knowledge has revealed that Intel 4 actually has better density than TSMC N3 (HP cells).

It specifically states, that Intel 4 has slightly higher density than TSMC N3.

This means, Intel 4 is easily on par or slightly better than TSMC N3. And considering Intel 3 has 18% higher PPA than Intel 4, Intel 3 will also comfortably beat TSMC N3 by a decent margin this year itself when it RTMs in Q4.

This makes MTL the 1st Intel CPU to actually have a (slight) node advantage over competition after many years!
Since 2017 i think last time intel had a node advantage.. 20A should double intel 4 density.. thats why cougar cove is 16 big + 32 e cores 😁💻
 

SiliconFly

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Mar 10, 2023
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Since 2017 i think last time intel had a node advantage.. 20A should double intel 4 density.. thats why cougar cove is 16 big + 32 e cores 😁💻
20A does not double Intel 4's density. From 4 => 20A, the ppa increase is just 36%. Since Intel was in a hurry, they just didn't spend enough time/money/energy to optimize/shrink the node even further. They just settled for a decent shrink just to stay competitive. A safe bet that has actually put them back on track.

Also, Intel 15th gen Arrow Lake is the only product on Intel 20A.. not Cougar Cove. Intel 16th gen Lunar Lake & above are on 18A.

And 17th gen is either Panther Lake or Cougar Lake with either Panther Cove or Cougar Cove. Pretty confusing. Not much details yet. And even if cougar cove exists, I don't think its gonna have 16 P-cores & 32 E-cores. Makes the die too large & expensive, power consumption will be too high & may end up being hotter than a toaster. Just sayin'
 
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mikk

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May 15, 2012
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Pretty sure we will never see ADM on any of Intels GT2 SKUs for MTL and ARL. If there is a GT3 for ARL with 320EU or even 384EUs this could be an option. In the older ARL-P roadmap it sounded like ADM will be exclusive to GT3 models to maximize performance (GT3 N3 with ADM to maximize performance). ARL GT2 with 192EUs I don't think we will see this.


I found something which supports my assumption.

0x7D01 ///< MeteorLake P (6+8+GT2)
0x7D03 ///< MeteorLake P (6+8+GT3+ADM)



We also had MTL GT3 entries in a test driver a long time ago and Intel accidently showed a 192EU variant of MTL in a public slide. ADM was tied to the GT3 version which they cancelled a long time ago. If there is a GT3 on ARL-P we might/should see ADM but who knows if it comes because Intel cancels a lot of things and the leaked roadmap is very old by now.
 
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Saylick

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Sep 10, 2012
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Yea.

No one ever said MTL was good.
We'll see in a months time what we're getting. If the P cores are really that power hungry, it would suggest that the power efficiency of MTL comes more so from that 1 E core on the IOD rather than the new process...
 

Saylick

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Sep 10, 2012
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Does it have any?
IIRC LNL-M is the first Intel product with actually decent efficiency in 1t, idle and steady-state.
Raichu claims it has 50% better PPW over the previous gen, which is a nice improvement, even if the bar was rather low. Idk how true those claims are.
 

lightisgood

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May 27, 2022
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At Intel TECH tour.MY (23/8/21-25), Intel confirms that Fab34 is'nt running for HVM of Intel 4 yet.
I guess that the capacity limit of MTL is about 4~6M units per month.
 

SiliconFly

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Mar 10, 2023
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That's 1t power.
Rubbish. 22W @ 4.8GHz 1T would make it the biggest joke of the year. Not even Intel is capable of something silly like that.

For starters, MTL is expected to be extremely power efficient. Intel even said that the Intel 4 process node has been heavily optimized for power efficiency. And RWC is not exactly the same as Raptor Cove. RWC is heavily power optimized for MTL. The entire tile architecture in MTL is also designed with extreme power efficiency in mind. I'm think MTL's power efficiency is gonna be out of the world.

I wuldn't be surprised if MTL mobile can comfortably match the performance of RPL mobile at just half the power. Maybe even less!

Hence Ultra. Their supposed-to-be Centrino moment!
 
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mikk

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May 15, 2012
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22W is in the same 1T power draw ballpark as Phoenix 7940HS and Raptor Lake 13700H, although we don't know if it's core or chip power he refers to. ST isn't about power efficiency these days but about max performance. Any efficiency targets refer to MT, they may reach a 1.5x target in MT whereas in ST it's about the same.

Phoenix HS and Raptor-H is a good example; same 1T efficiency in Cinebench but vastly better MT efficiency for Phoenix.
 
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eek2121

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Aug 2, 2005
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@mikk ripped the thoughts out of my mind and digitized them. 🤣

Also, high 1T power consumption is not indicative of efficiency. It is indicative of scalability. There is nothing inherently wrong with say, 40-50W ST power consumption, so long as the performance is there to match. The issue with Intel is that the performance has increased much slower than power consumption.

We can be certain MTL-P will be much more power efficient than Raptor Lake. Moving from Intel 7 to Intel 4 almost guarantees that.

It is the one chip I am keeping an eye out for because if Intel executes properly it is going to up the game in terms of idle/low activity power consumption. (based on rumors anyway)