Discussion Intel current and future Lakes & Rapids thread

[Markfw]

Intel claims next-gen Xeon will have massive perf/watt improvements:

View attachment 84985

They don't compare anything to the competition, and no numbers. Its just marketing advertisement.

 

[H433x0n]

Intel didn't need that either.
All the HMP scheduling work was done by MS for Qualcomm back in 2017.

It’s not that simple. It was a prudent decision to develop the thread director.

It’d be completely irresponsible to allow the performance & user experience be determined by Microsoft’s software. Microsoft is a big company with a lot of responsibilities.

The heterogeneous architecture is here to stay, it’s best to fully embrace it and optimize performance.

 

[adroc_thurston]

It was a prudent decision to develop the thread director.

More like Intel is NIH syndrome incarnate.

It’d be completely irresponsible to allow the performance & user experience be determined by Microsoft’s software.

MS' HMP implementation works better than whatever Intel did, that's the thing.

 

[Khato]

Uhhh, pretty sure everything I've read is reasonably clear about thread directory simply providing better feedback to the OS. Which probably isn't much more than marketing putting a name to existing performance/power/temperature monitors.

 

[Abwx]

Intel claims next-gen Xeon will have massive perf/watt improvements:

View attachment 84985

That doesnt mean much if they compare a 60C SPR to a 144 cores SF, they say 240% better perf/watt but without stating the perf level, if that s at same throughput for the two SKUs there s nothing impressive.

FI Bergamo has 2.7x SPR s perf/Watt at 2x the perfs, if you reduce the former s 128C to the same perf as SPR 60 cores then it will have roughly 5x the perf/Watt, we re talking of 400% better perf/watt here, that s all the subtility of such comparisons where s theres big differences in nodes and core count.

 

[igor_kavinski]

AMD's approach is more sensible. It's a compact version of the same big core with less cache, and still includes smt.

AMD's approach is more Rebel Alliance-like. People get together and excitedly collaborate to do the impossible.

Intel functions like the Empire. There are bickering Moffs and Admirals. Everyone pretending to be loyal but each of them doing things to get the other in trouble. And when the Emperor or Vader lose their patience, they snuff the weak ones out, publicly.

 

[H433x0n]

That doesnt mean much if they compare a 60C SPR to a 144 cores SF, they say 240% better perf/watt but without stating the perf level, if that s at same throughput for the two SKUs there s nothing impressive.

FI Bergamo has 2.7x SPR s perf/Watt at 2x the perfs, if you reduce the former s 128C to the same perf as SPR 60 cores then it will have roughly 5x the perf/Watt, we re talking of 400% better perf/watt here, that s all the subtility of such comparisons where s theres big differences in nodes and core count.

The y-axis is perf per thread.

 

[Geddagod]

AMD's approach is more Rebel Alliance-like. People get together and excitedly collaborate to do the impossible.

Intel functions like the Empire. There are bickering Moffs and Admirals. Everyone pretending to be loyal but each of them doing things to get the other in trouble. And when the Emperor or Vader lose their patience, they snuff the weak ones out, publicly.

In theory, Intel's approach is better, albeit more costly.

Also, major bummer GNR isn't using LNC. It's been rumored for a while that it wouldn't, but this is the first official Intel confirmation afaik.
No idea what Pat was talking about when he said "major new core" and "10%+ stronger in the core" for the GNR redefinition. I'm going to guess he meant >10% higher frequency iso power for the core itself ig.

 

[H433x0n]

In theory, Intel's approach is better, albeit more costly.

Also, major bummer GNR isn't using LNC. It's been rumored for a while that it wouldn't, but this is the first official Intel confirmation afaik.
No idea what Pat was talking about when he said "major new core" and "10%+ stronger in the core" for the GNR redefinition. I'm going to guess he meant >10% higher frequency iso power for the core itself ig.

I’m not sure why that’d be a bummer. If the projections from IgorsLab are accurate then LNC would perform worse or at parity with RWC+.

 

[A///]

AMD's approach is more Rebel Alliance-like. People get together and excitedly collaborate to do the impossible.

Intel functions like the Empire. There are bickering Moffs and Admirals. Everyone pretending to be loyal but each of them doing things to get the other in trouble. And when the Emperor or Vader lose their patience, they snuff the weak ones out, publicly.

AMD has historically made significant advancements where Intel has followed in their shadow.

 

[A///]

It probably is better overall, it basically lets them forego the development of their own ThreadDirector. The point I made originally still stands since from a development standpoint most of the work would carry over because the Windows OS will handle it through their own scheduling.

Yes of course and therre won't be dilly dallying of the cpu through bios level updates. intel is stuck chasing their tail here with microsoft on the sidelines cheering a mirror image of themselves on the pitch here without realising they need to be in there with intel. windows will handle amd's approach better in the long run and amd won't need to do unconventional things to gain st performance here like intel is trying to while possibly giving up the nt lead.

who knows what drugs they're taking at intel these days.

 

[Geddagod]

I’m not sure why that’d be a bummer. If the projections from IgorsLab are accurate then LNC would perform worse or at parity with RWC+.

As underwhelming as LNC is lol, I highly doubt RWC is going to be better.
RWC+ does not exist. This new info from Intel themselves should kill that MLID rumor. GNR uses RWC.
Even SNC in ICL, which through a combination of poor design and a shady Intel 10nm+ node was pretty bad, but still was ~MT perf as CML, and had higher ST perf of ~10% due to higher IPC.

 

[igor_kavinski]

who knows what drugs they're taking at intel these days.

The expensive, pharmaceutical grade, kind.

 

[Geddagod]

As underwhelming as LNC is lol, I highly doubt RWC is going to be better.
RWC+ does not exist. This new info from Intel themselves should kill that MLID rumor. GNR uses RWC.
Even SNC in ICL, which through a combination of poor design and a shady Intel 10nm+ node was pretty bad, but still was ~MT perf as CML, and had higher ST perf of ~10% due to higher IPC.

Also, the best case scenario for LNC is that those projections were due to the fact that it's Fmax frequency is really bad. Stuff like that you could improve with a combination of node and design fixes- look at TGL and RPL. That's Panther Lake copium.
Looking forward to more leaks about ARL in a couple months tho, as they start sending out ES samples to OEMs.

 

[H433x0n]

As underwhelming as LNC is lol, I highly doubt RWC is going to be better.
RWC+ does not exist. This new info from Intel themselves should kill that MLID rumor. GNR uses RWC.
Even SNC in ICL, which through a combination of poor design and a shady Intel 10nm+ node was pretty bad, but still was ~MT perf as CML, and had higher ST perf of ~10% due to higher IPC.

RWC in GNR is not identical to RWC in MTL. There’s almost always changes from client to server cores. Usually they’re relatively minor and have to do with cache layout and optimizing packaging but nonetheless there are changes. I mean, you could technically call EMR cores a sort of RPC+. MLID claiming a +10% IPC increase was never really a physical possibility given the modest improvements from RPC (as you know).

An improvement of 3-6% for Specfp and 4-8% for Specint is in the realm of RWC improvements over RPC.

 

[Saylick]

I’m not sure why that’d be a bummer. If the projections from IgorsLab are accurate then LNC would perform worse or at parity with RWC+.

Also, the best case scenario for LNC is that those projections were due to the fact that it's Fmax frequency is really bad. Stuff like that you could improve with a combination of node and design fixes- look at TGL and RPL. That's Panther Lake copium.
Looking forward to more leaks about ARL in a couple months tho, as they start sending out ES samples to OEMs.

Yeah, the rumors say that LNC has pretty high IPC gains, like 30-40%, but it tops out at like low to mid 4 GHz, which essentially nullifies the IPC gains in the desktop market. However, since servers don't clock their cores all that high to begin with, LNC in the server space shouldn't be too bad... that is assuming the bigger core doesn't burn a ton of power, thus leading to a clock regression even in the server space.

 

[H433x0n]

Also, the best case scenario for LNC is that those projections were due to the fact that it's Fmax frequency is really bad. Stuff like that you could improve with a combination of node and design fixes- look at TGL and RPL. That's Panther Lake copium.
Looking forward to more leaks about ARL in a couple months tho, as they start sending out ES samples to OEMs.

I’m just going off of the general internet / anandtech consensus that LNC is DOA or “stillborn”. I don’t have any concrete insider info to say otherwise even though I’m pretty skeptical Intel would willing head straight into a disaster product launch.

 

[igor_kavinski]

I’m pretty skeptical Intel would willing head straight into a disaster product launch.

Like SPR, you mean?

 

[Geddagod]

Yeah, the rumors say that LNC has pretty high IPC gains, like 30-40%, but it tops out at like low to mid 4 GHz, which essentially nullifies the IPC gains in the desktop market. However, since servers don't clock their cores all that high to begin with, LNC in the server space shouldn't be too bad... that is assuming the bigger core doesn't burn a ton of power, thus leading to a clock regression even in the server space.

Ye, I think you're too optimistic abt LNC IPC gains though, and too pessimistic abt clocks. Bionic over at Twitter claimed 5ghz clocks? IIRC. So that would be like just north of 20% IPC (20-25%) considering the leaked Igor benches. I'm pretty sure Exist knows the specifics as well though, but idk if he even could talk about it, and I don't want to bother him lol.
Completely agree about that second point tho. It could just be Intel's physical design/layout team for LNC dropped a stinker and the entire frequency/power curve sucks. That would be like the worst case for Intel though. And that honestly could mean that LNC is essentially a bulldozer moment, with the only thing saving it being the fact that it's on a majorly better node than its predecessor.
Also is it just me, or are people completely over using the "bulldozer moment" meme online? AFAIK, a bulldozer moment is a ambitious arch that was often a regression vs its predecessor that just completely fails to compete as well. I heard people describing RPL-R as a "bulldozer moment" online and I was like ??? Perhaps I'm too liberal with it too, but calling RPL-R a "bulldozer moment" just seems extreme...

 

[H433x0n]

Like SPR, you mean?

SPR launching in 2021 would’ve been just fine. Even now, it’s still selling okay.

 

[Geddagod]

I’m just going off of the general internet / anandtech consensus that LNC is DOA or “stillborn”

Adroc is just having fun. The time when people should really hit the 'wtf' button (pls don't ban me mods I didn't say the actual word) is when leakers who have an actual personal connection with Intel themselves start freaking out IMO (cough Raichu cough). Because if people who are passionate abt Intel start saying an Intel product is bad... then ye you know it's bad.

I’m pretty skeptical Intel would willing head straight into a disaster product launch.

Well ye, like Igor said, looks at SPR.
What looks to be a pretty important distinction with ARL is that even if perf doesn't hit targets, it at the very least works fine. Intel would launch it, at the very least, for investor promises, and because it still looks like overall perf is a small uplift over RPL and efficiency should still be an improvement, I would expect some volume as well.
ICL launched, and it was subpar. ICL honestly seems like a situation very similar to ARL tbh, except maybe volume-wise.
I also genuinely think you are poo-pooing ARL too much here. It's really bad for what it could have been, but as an overall product it's fine (excluding costs and stuff lol). Depending on how power draw in mobile looks as well, I wouldn't call it a disaster.

 

[Saylick]

Also is it just me, or are people completely over using the "bulldozer moment" meme online? AFAIK, a bulldozer moment is a ambitious arch that was often a regression vs its predecessor that just completely fails to compete as well. I heard people describing RPL-R as a "bulldozer moment" online and I was like ??? Perhaps I'm too liberal with it too, but calling RPL-R a "bulldozer moment" just seems extreme...

Is that a thing? I personally haven't felt like people are using Bulldozer as a meme at the moment...

But yeah, a Bulldozer moment is when there's an overhaul of the architecture that sounds great on paper but the execution or physical implementation sucks. In my opinion, it doesn't even have to be an ambitious architecture; it just needs to be a paradigm shift that goes awry.

Raptorlake is definitely not a Bulldozer moment, but RDNA 3 would be.

 

[adroc_thurston]

an overhaul of the architecture that sounds great on paper

Well BD never sounded great on paper.

but RDNA 3 would be.

Also not it.

Adroc is just having fun

No, I'm being serious for once.
Judgement tbd on Skymont, but LNC looks pretty bad indeed.

 

[H433x0n]

Adroc is just having fun. The time when people should really hit the 'wtf' button (pls don't ban me mods I didn't say the actual word) is when leakers who have an actual personal connection with Intel themselves start freaking out IMO (cough Raichu cough). Because if people who are passionate abt Intel start saying an Intel product is bad... then ye you know it's bad.

Well ye, like Igor said, looks at SPR.
What looks to be a pretty important distinction with ARL is that even if perf doesn't hit targets, it at the very least works fine. Intel would launch it, at the very least, for investor promises, and because it still looks like overall perf is a small uplift over RPL and efficiency should still be an improvement, I would expect some volume as well.
ICL launched, and it was subpar. ICL honestly seems like a situation very similar to ARL tbh, except maybe volume-wise.
I also genuinely think you are poo-pooing ARL too much here. It's really bad for what it could have been, but as an overall product it's fine (excluding costs and stuff lol). Depending on how power draw in mobile looks as well, I wouldn't call it a disaster.

I genuinely don’t know where it’ll end up so I wouldn’t say I’m bearish but I just have no real expectations of it. The only person I talk to in Intel works in DCAI and he’s adamant it won’t end up a disaster. He also doesn’t have a direct connection to the project.

If you go by IgorsLab’s data it will have anywhere from a 0-3% & 1-4% uplift in Specint & Specfp respectively. It’d basically be a repeat of RPL-R from a performance standpoint. I can’t think of a product launch with that small of a performance improvement that wasn’t merely a refresh.

 

[Saylick]

Well BD never sounded great on paper.

Well, you can't say that... if that were the case, then it would be saying that AMD willingly developed BD knowing that it didn't have promise, not even on paper.

Also not it.

Physical implementation and missing clock targets aside, it's a blunder that RDNA 3's doubled up FP units aren't even taken advantage of in many workloads, at least not on launch. I'm sure AMD will optimize drivers for the computing power of RDNA 3 but the fact that the hardware is underutilized is very much a Bulldozer-esque moment.

No, I'm being serious for once.
Judgement tbd on Skymont, but LNC looks pretty bad indeed.

Eh.