Looks like a geekbench problem - since max boost == base clock.Max boost 3.1 GHz?
wat
Thanks I've no real reason to buy either as I prefer higher clocks for all around use which I why I've stuck to mainstream systems. I did run Xeons and Opterons in the back past but that and having to own a mainstream system or two was too much.Its the Xeon W5 3435X So 16 cores spread across 4 tiles, wich is 4 cores per tile. If you dont care about AVX512 but want 8 Channel and Lots of PCI express lanes then the 5955WX is just as fast as the 3435X and should be cheaper too.
Looks like a geekbench problem - since max boost == base clock.
Lol Zen4 TR is just going to rip that a new back passage when it lands 😆🔥Water Cooled Threadripper can do the same with only 691 Watts, thats 234 Watts less
Lol Zen4 TR is just going to rip that a new back passage when it lands 😆🔥
And Intel is not doing its part to preasure AMD with Sapphire Rapids Lacklustre performance.That's cool and all, but given AMD's track record, that's gonna take awhile.
Should be early 2h 2023. June to september.That's cool and all, but given AMD's track record, that's gonna take awhile.
Interesting, and surprising if true. A bit off-topic tho. Sadly the Sapphire Rapids Xeon W products appear to be stillborn.Should be early 2h 2023. June to september.
They were supposed to go against Threadripper 3000 series.Interesting, and surprising if true. A bit off-topic tho. Sadly the Sapphire Rapids Xeon W products appear to be stillborn.
Water Cooled Threadripper can do the same with only 691 Watts, thats 234 Watts less
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Is Intel's chiplet cost really that high?That must be some High End Water Cooler...
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Water Cooled Threadripper can do the same with only 691 Watts, thats 234 Watts less
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Icelake or SPR MCC?
Intel AIB interconnect does consume more energy than monolithicIs Intel's chiplet cost really that high?
A monolithic 24C SPR vs 24C Zen 3 is like 15% more efficient in CB23, but a 56C SPR uses >30% more energy for the same score as a 64C Zen 3 TR? Yes the TR has more cores, but it still shouldn't be this bad.
Is Intel's chiplet cost really that high?
A monolithic 24C SPR vs 24C Zen 3 is like 15% more efficient in CB23, but a 56C SPR uses >30% more energy for the same score as a 64C Zen 3 TR? Yes the TR has more cores, but it still shouldn't be this bad.
Yes, it is of course more than monolithic but there is more to it than might meet the eye at first sight:Intel AIB interconnect does consume more energy than monolithic
Performance improvement for DB workloads? Maybe also some special confidential workloads by their large customers that depend on this design decision?Intel had this idea of a unified L3 cache across several tiles.
Yes, who knows - at least not me, I promise.Performance improvement for DB workloads? Maybe also some special confidential workloads by their large customers that depend on this design decision?
Have you seen any HammerDB server benchmarks recently? HammerDB is relatively easy to use to find out the OLTP and OLAP performance of a server. If they kept the storage array similar between the servers, it would provide a good comparison point. Another probably better way is to create a huge 100GB RAMDRIVE and run HammerDB on that and you get an idea of the complete performance profile of the CPU+Memory subsystem of a particular server platform.But all the reviews show that for common workloads their design simply seems to be inferior.
I wish we had some more data on SNC4 vs SNC-OFF modes. Would give a lot more insight on what workloads, if any, benefit.Yes, it is of course more than monolithic but there is more to it than might meet the eye at first sight:
Intel had this idea of a unified L3 cache across several tiles. That is why there are huge amounts of traffic across EMIB for next to no benefit. AMD OTOH has much less bandwidth via IFoP at much higher power per bit transferred to begin with. But because their L3 is exclusive per CCD, there is only a tiny bit of coherency traffic going on. And this is why they are much more efficient.
Of course there might be edge cases - but it is more than questionable why Intel took that design direction in the grand scheme.