Discussion Intel current and future Lakes & Rapids thread

Page 711 - Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.
Toggle sidebar Toggle sidebar
Markfw

Markfw

Moderator Emeritus, Elite Member
May 16, 2002
27,241
16,107
136
  • Like
Reactions: Tarkin77
E

Exist50

Platinum Member
Aug 18, 2016
2,452
3,106
136
Markfw said:
Also, you can bet that 2P system is running over 1000 watts vs the genoa at probably 300. or less.
Click to expand...
Sapphire Rapids is up to 350W per socket, while Genoa is up to around 360W (socket and some SKUs up to 400W). We can reasonably assume the top CPUs on each platform are in the highest TDP brackets.
 
  • Like
Reactions: Tlh97 and controlflow
N

nicalandia

Diamond Member
Jan 10, 2019
3,331
5,282
136
Doug S said:
Charlie had an article yesterday about SPR's successor, Emerald Rapids. He said Intel still maintains it will come around a year after SPR,
Click to expand...
The latest info we have is that Intel plans to Ramp Up both SPR-SP and EMR-SP at the same time. This means that Emerald Rapids could be release at mid to late 2023
 
Markfw

Markfw

Moderator Emeritus, Elite Member
May 16, 2002
27,241
16,107
136
nicalandia said:
closer to 800 Watts for those Intel 2S Systems.
Click to expand...
and 1/2 that for Genoa at the same performance. You think data centers are going to deal with that without considering Genoa ? Power nowadays is king. Not just me, its a real consideration now.
 
J

jpiniero

Lifer
Oct 1, 2010
16,807
7,253
136
Exist50 said:
If yields were actually the problem, why would they only delay the launch of the MCC die, which has ~half the silicon of a full XCC package? And why would those yield issues not apply to ICL-SP, ADL, RPL, etc? And how would a single quarter be enough to materially change them? There's a lot of things that make no sense here.
Click to expand...

Because the bigger the die, the more painful having defects is. This is why doing a massive monolithic die is such a bad idea.
 
moinmoin

moinmoin

Diamond Member
Jun 1, 2017
5,242
8,456
136
nicalandia said:
It's really the Whole Enchilada...! Lower Yields and Bugs that are compounding the issue. more than 13 Steppings is something really unheard of before.
Click to expand...
nicalandia said:
The latest info we have is that Intel plans to Ramp Up both SPR-SP and EMR-SP at the same time. This means that Emerald Rapids could be release at mid to late 2023
Click to expand...
I'm still really curious how all that can lead to continuous delays to SPR but not affect EMR as much to the point that their launch time converge. EMR a year after SPR seems more realistic.
 
N

nicalandia

Diamond Member
Jan 10, 2019
3,331
5,282
136
Sorry guys I messed Up..

This is the Sapphire Rapids-SP held by Sandra Rivera(Intel Executive)

148 Complete Dies
1667324535779.png


This one is for the Massive 34C Monolithic Die with only 68 Complete Dies
1667324649373.png



So 50% to 60% Yields for SPR-SP is between 74 - 90 fully functional dies so between 15 and 20 CPUs per Wafer which is still very low.
 
  • Like
Reactions: Schmide, Tlh97 and lightisgood
E

Exist50

Platinum Member
Aug 18, 2016
2,452
3,106
136
jpiniero said:
Because the bigger the die, the more painful having defects is. This is why doing a massive monolithic die is such a bad idea.
Click to expand...
More silicon and especially more non-redundant silicon makes defects more painful. But Intel's been shipping large monolithic dies on a worse 10nm process in the form of Ice Lake server for a while now. And if you believe the rumor, they seem willing to ship the XCC with ~2x the silicon per package. If it were a yield issue, how are these reconcilable? And then how would they fix it in merely a quarter?
 
J

jpiniero

Lifer
Oct 1, 2010
16,807
7,253
136
Exist50 said:
More silicon and especially more non-redundant silicon makes defects more painful. But Intel's been shipping large monolithic dies on a worse 10nm process in the form of Ice Lake server for a while now.
Click to expand...

Icelake Server cores and the monolithic dies themselves are much smaller than Golden Cove Server. And they probably aren't selling that much Icelake, given how far the server volume has fallen.

Another quarter might give them extra time to build up some inventory so they have something to sell. At least initially. Or to buy extra time to decide whether to delay it even more.
 
E

Exist50

Platinum Member
Aug 18, 2016
2,452
3,106
136
jpiniero said:
Icelake Server cores and the dies themselves are much smaller than Golden Cove Server
Click to expand...
The big die is roughly 628mm2. That is quite large by any definition, and they launched it a year and a half ago. And right now, you can go out and buy ~250mm2 of fully enabled Intel 7 for a few hundred bucks, no issue.
jpiniero said:
And they probably aren't selling that much Icelake, given how far the server volume has fallen.
Click to expand...
But then why couldn't they do the same low volume shipments for SPR?
jpiniero said:
Another quarter might give them extra time to build up some inventory so they have something to sell. At least initially.
Click to expand...
I could see them trying to build up volume, but that seems a bit different from claiming yield issues. Also, the current market isn't exactly itching to buy.
 
  • Like
Reactions: Tlh97 and controlflow
L

LightningZ71

Platinum Member
Mar 10, 2017
2,508
3,191
136
Keep in mind, Ice Lake is on an earlier version of the 10nm process (the second generation, which Intel wants to call 10nm, trying to forget cannon lake). It has notable power issues on top of whatever yield issues it may have. Tiger Lake was on a later version called 10sf. That improved on the power and yield characteristics markedly over 10+. AlderLake and Saphire Rapids are on Intel 7, previously known as 10ESF. These are different processes that share some design rules, but are built on different lines with different yields and performance profiles.
 
D

Doug S

Diamond Member
Feb 8, 2020
3,575
6,312
136
nicalandia said:
The latest info we have is that Intel plans to Ramp Up both SPR-SP and EMR-SP at the same time. This means that Emerald Rapids could be release at mid to late 2023
Click to expand...

What's the point of that? Isn't EMR supposed to be better than SPR? That's like if Apple ran into issues with M2 Max that delayed it until M3 Max was ready...they would just skip M2 Max entirely if that happened.
 
  • Like
Reactions: Tlh97 and scannall
N

nicalandia

Diamond Member
Jan 10, 2019
3,331
5,282
136
Doug S said:
What's the point of that? Isn't EMR supposed to be better than SPR?
Click to expand...
Yes, but not by much and Intel seem to think that having two different generations of about similar product lines will not have an impact due to different customer's need.
 
IntelUser2000

IntelUser2000

Elite Member
Oct 14, 2003
8,686
3,787
136
  • Like
Reactions: Tlh97, lightisgood and Exist50
DrMrLordX

DrMrLordX

Lifer
Apr 27, 2000
22,902
12,971
136
Markfw said:
Also, you can bet that 2P system is running over 1000 watts vs the genoa at probably 300. or less.
Click to expand...

Genoa is going to use more power than that per socket, depending on the SKU. We'll get a better idea of the exact numbers later, but assume that Genoa can use up to 350-400W per socket.
 
Markfw

Markfw

Moderator Emeritus, Elite Member
May 16, 2002
27,241
16,107
136
DrMrLordX said:
Genoa is going to use more power than that per socket, depending on the SKU. We'll get a better idea of the exact numbers later, but assume that Genoa can use up to 350-400W per socket.
Click to expand...

Since Milan does at the most 280, and future nodes should do better on power, I would doubt they go over 320 or so got 96 cores. But we will see.
 
E

Exist50

Platinum Member
Aug 18, 2016
2,452
3,106
136
Markfw said:
Since Milan does at the most 280, and future nodes should do better on power, I would doubt they go over 320 or so got 96 cores. But we will see.
Click to expand...
These numbers have been leaked, if not outright published, several times. And I'm not sure why after Raphael you'd doubt that they'd need ≥350W for +50% cores + DDR5 + PCIe 5.0/CXL. I'd imagine the cores themselves only get ~half of it.
 
  • Like
Reactions: Tlh97 and controlflow
Markfw

Markfw

Moderator Emeritus, Elite Member
May 16, 2002
27,241
16,107
136
Exist50 said:
These numbers have been leaked, if not outright published, several times. And I'm not sure why after Raphael you'd doubt that they'd need ≥350W for +50% cores + DDR5 + PCIe 5.0/CXL. I'd imagine the cores themselves only get ~half of it.
Click to expand...
Servers are designed and set to to be more efficient. I run my 7950x at 142 watt. It smokes my new Milan 7763's in performance and they are 280 watt,

Let just see benchmarks when they are both available. But even at 350, its still more efficient by 100% than SR. (350 vs dual 350)
 
E

Exist50

Platinum Member
Aug 18, 2016
2,452
3,106
136
Markfw said:
Servers are designed and set to to be more efficient
Click to expand...
Yes, but there're limits. 350W would be only ~3.6W/core if you ignore IO entirely. If, as a first order estimate, half the power is going to fabric and IO, that's <2W a core, or similar to (if not less than) a smartphone core's sustained power. It would be pointless to push a core below its power at Vmin, so I'd imagine that will set the floor.

But yes, I expect we will see a ~2x efficiency gap.
 
  • Like
Reactions: Tlh97 and coercitiv
You must log in or register to reply here.

TRENDING THREADS

COMPANY
RESOURCES
FOLLOW
Top Bottom