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Discussion Intel current and future Lakes & Rapids thread

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Supports my expectation that a delayed product not only is late but misses expectations.

Maybe it's running very close to 2GHz.

But as @lobz points out Sandra is garbage. Don't know why they even exist.

According To Yuuki_AnS Even the Late QS samples(Stepping E1/E2) have some issues.

"There is a UPI Link Error on some SPR-SP processor that Reach E1/E2 QS samples"
 
What is the significance of UPI, and how bad could this error be (in terms of time to fix)?
Not much info is reported by Yuuki_Ans on this, but UPI is very important because it's Intel's Infinity Fabric(coherent interconnect) so it's affecting performance. This could be the delay issue. I mean. How on else could you explain a Multi core performance on par with ROME EPYC, Lower than Milan and utterly Annihilated by Genoa?
 
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Is it actually a quad socket part? I thought they weren't on the drawing boards.
I mean each cpu is essentially a quad NUMA, even the monolithic parts had numa suggestions because they were so big. The UPI links between sixteen pieces of silicon must be an engineering nightmare.
 
Is it actually a quad socket part? I thought they weren't on the drawing boards.
I mean each cpu is essentially a quad NUMA, even the monolithic parts had numa suggestions because they were so big. The UPI links between sixteen pieces of silicon must be an engineering nightmare.
Yeah, it's a Quad Socket System, but the Xeon 8450H could be a 4S or a 8S System(4-8 CPUs System Processor. 4S for sure) All of Intel Scalable Xeons with H and HL suffix are either S4S or S8S Systems(for 4- 8 sockets or more than 8).

Intel Scalable processors with S prefix(S4S and S8S) along with Windows Data Center edition are capable of expanding to more than a few dozen of sockets on a Coherent Single System Image.(Third-party node controller technology to expand the number of sockets beyond the Four-Eight sockets). Granted on Production sample where the UPI Links are not buggy.


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Those are QS Samples with full retail number. Do you think they would be locking those just before the release?(according to Yuuki_AnS the QS don't have SDSi locks)
The way I understood SDSi is that by default parts of the CPU would be locked and have to be unlocked through SDSi which needs a working driver with trusted certification to verify a given installation is allowed to access originally locked features. If the QS is supposed to be equal to launch chips and SDSi is about unlocking features, then the QS absolutely would have locked features as well, otherwise it wouldn't be a QS.

Then the big question is: what exactly is being locked there, and may that result in the low performance we are seeing there? UPI links for example have been a premium feature in the past Intel used for segmentation, so may use SDSi now.
(Did Yuuki_AnS state everything of the QS is unlocked?)
 
Some of the SKU leakers have shown E3-stepping QS. Wonder if those fare any better?

Also do we have any benches with artificial thread limits to (hopefully) keep workloads local to one tile?
 
Do we have any benches with artificial thread limits to (hopefully) keep workloads local to one tile?

Not yet, due to Mesh of Rings on Xeons even HCC Monolithic CPUs that large benefit from what is called Cluster-on-die (COD) AND Sub-NUMA cluster (SNC). With four tiles per CPU you can imagine how complex this is for the scheduler.
 
On the topic of Raptor Lake, it seems to behave exactly as expected. It's an Alder Lake refresh with Alder Lake refresh-like clocks, IPC, etc. The fun part will be when we repeat this discussion with Redwood Cove...
 
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I was hoping for higher power efficiency.

On the same process? With more cores? With higher clocks? Really?

EDIT: Meteor Lake is currently the chip to watch out for if you are hoping for improved power consumption, and even then, I suspect Intel will push the chips 'just because'.
 
Were there any notable leaks from this "Extreme player" leaker? I watched the source video, and he only showed a motherboard and gpu box. Other videos on his channel seem to be just harware news.
 
Let's stick to the good news so far:
  • min FPS has gone up ~30% on average @ 1080p
  • power increase is presented as "peak", may actually be correlated with the increase in min FPS
Not great, not terribad. Needs more leakage, maybe a seller could put them up for sale "by accident".
 
On the same process? With more cores? With higher clocks? Really?

EDIT: Meteor Lake is currently the chip to watch out for if you are hoping for improved power consumption, and even then, I suspect Intel will push the chips 'just because'.

You mean Arrowlake? Cause no reputable sources are expecting high end MTL chips.
 
On the topic of Raptor Lake, it seems to behave exactly as expected. It's an Alder Lake refresh with Alder Lake refresh-like clocks, IPC, etc. The fun part will be when we repeat this discussion with Redwood Cove...
Why? isn't redwood cove a new core unlike raptor which seems to be just GLC with increased L2?
 
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