Discussion Intel current and future Lakes & Rapids thread

[Ajay]

Unfortunately it is a distinct possibility that Gelsinger will only have 5 years as CEO. I sure wouldn't bet on it though since it's an arbitrary board decision and the only potential historical application of it would have been with Craig Barret who transitioned from CEO to chairman of the board at age 65. While perhaps not quite on the same level as those that preceded him, I'd say Craig Barret was still a solid Intel CEO. Far better than the trio that followed that ran Intel like any generic big business.

I would note that there is one reason for Intel to receive preferential treatment on US subsidies - Intel's leading edge process is developed and deployed in the US first. TSMC's Arizona site is scheduled to start production in 2024... with a 5nm class process that'll be what, 3-4 years old at that point? Meanwhile Samsung is intentionally neglecting to mention what process their new fab in Texas is targeting. (Their existing Austin fab "primarily focuses on the production of 14nm and 28/32nm technologies".) I wouldn't be the least bit surprised if Taiwan and South Korea are imposing IP export restrictions in order to keep the most lucrative investments by TSMC and Samsung in country. So the real choice might be subsidizing Intel to keep US semiconductor production as close to the leading edge as Intel can manage, or subsidize the table scraps from TSMC and Samsung.

All fair points. I was kind of shocked that the initial TSMC AZ plants are going to be 5N, I really expected them to be 3N** at least. With Intel, so much depends on getting enough EUV lithographs from ASML. Apparently, they managed the first of the new line of high NA machines. Hopefully it's not just a one off. I guess Swan was a bit more than a care taker.

Export restrictions on TSMC make allot of sense given the strategic importance to Taiwan. South Korea, while it could be true, they really need to get into the US and Europe to bolster to get more device wins and bolster their manufactured product portfolio.

 

[eek2121]

TSMC's CEO believes we have at least 20 years to run before we reach those limits. Everyone who has claimed that physical limitations are coming around the corner soon has been proven wrong.

Even though there will obviously be a physical limit reached at some point, that doesn't mean that everyone is going to reach it at the same time, or that some players won't get stuck on other problems (beyond the more obvious economic issues) well before they reach physical limits.

I am usually the last person to argue against this, but we really ARE approaching a limit. TSMC and Intel may call their future processes something ridiculous, but the laws of physics still apply. Even if you ignore the minimum size needed for a transistor, heat density is already a VERY big issue. I predict 5nm will be the sweet spot for mainstream stuff going forward, and N4/N3/Intel 4/Intel 3 will be the performance stuff. We will eventually manage to shrink things a bit more, but don't buy TSMC or Intel's marketing, measurable gains will be apparent from the products.

I hope I'm wrong, of course, but I suspect I'm not. This is where other technologies will become vital. 3D stacking, new cooling techniques, etc.

EDIT: That is not to say there won't be improvements. Transistors that don't shrink very well will see improvements going forward.

 

[Exist50]

Even if you ignore the minimum size needed for a transistor, heat density is already a VERY big issue.

That's what stuff like MESO is for. If thermal density is the limitation, it'll get more focus.

 

[Doug S]

That's what stuff like MESO is for. If thermal density is the limitation, it'll get more focus.

Not to mention that the percentage of transistors that are active at a time is decreasing almost as quickly as the number of transistors on a die are increasing. When you add a bunch of transistors for an NPU, big cache, and additional GPU cores they aren't all active at once.

Unless they are power gated leakage can be a problem, and it is starting to once again become more important which is one of the reasons why the industry is moving on from FinFET.

 

[igor_kavinski]

Intel's Driver Lists Upcoming Discrete GPUs, CPUs Through 2025 | Tom's Hardware (tomshardware.com)
Intel accidentally releases test driver for DG3 "Elasti" dGPU, Raptor/Meteor/Arrow/Lunar-Lake iGPUs - VideoCardz.com

Lunar Lake appearing in a driver means they have prototype silicon already on hand for testing?

The files also confirm the configurations of the upcoming integrated solutions. Intel is to double and then quadruple the GPU core count over Alder Lake iGPU solution.

• MTL_3x4x16= 192 (Execution Units)
• ARL_6x4x16= 384 (Execution Units)

384 execution units on a desktop CPU would be massive! 12X increase compared to the 32 units in 12900K.

 

[Exist50]

Lunar Lake appearing in a driver means they have prototype silicon already on hand for testing?

Nah, stuff usually shows up in drivers well in advance.

384 execution units on a desktop CPU would be massive! 12X increase compared to the 32 units in 12900K.

That would be for a mobile chip, beyond doubt.

 

[igor_kavinski]

That would be for a mobile chip, beyond doubt.

That's an even crazier thought! How they gonna feed that many execution units with a max TDP of 35W?

 

[dullard]

Intel accidentally releases test driver for DG3 "Elasti" dGPU, Raptor/Meteor/Arrow/Lunar-Lake iGPUs - VideoCardz.com

Lunar Lake appearing in a driver means they have prototype silicon already on hand for testing?

Since they already have an early Meteor Lake chip, it is theoretically possible to have produced a very early Lunar Lake chip (same equipment to manufacture, but more EUV time). But, I doubt that is what the drivers are referring to. Instead, since Intel is moving back to chiplets, the GPU chiplet could theoretically be the same across multiple CPUs. It would be possible to use the higher end Meteor Lake graphics chiplet in the lower end Lunar Lake CPU.

 

[mikk]

It would be possible to use the higher end Meteor Lake graphics chiplet in the lower end Lunar Lake CPU.

Lunar Lake graphics differs, it's Gen12.9 (Xe2 based). Meteor Lake and Arrow Lake on the other side are Gen12.7 Xe1 based.

 

[andermans]

Since they already have an early Meteor Lake chip, it is theoretically possible to have produced a very early Lunar Lake chip (same equipment to manufacture, but more EUV time). But, I doubt that is what the drivers are referring to. Instead, since Intel is moving back to chiplets, the GPU chiplet could theoretically be the same across multiple CPUs. It would be possible to use the higher end Meteor Lake graphics chiplet in the lower end Lunar Lake CPU.

I suspect it is just for testing with the various simulators companies have before they have silicon.

 

[uzzi38]

Nah, stuff usually shows up in drivers well in advance.



That would be for a mobile chip, beyond doubt.

Never mind what I originally wrote, I just checked myself like I should have done to start. Agreed it's almost certainly for a mobile product though.

 

[IntelUser2000]

That's an even crazier thought! How they gonna feed that many execution units with a max TDP of 35W?

Not so much when you consider we don't even have Alderlake mobile, and Meteorlake is 2 generations after that and Arrowlake is 3 generations after. We're looking at the most optimistic case of MTL in early 2023 and Arrowlake in early 2024.

LPDDR5x-8533 is coming soon, so it'll at least support that, and maybe something like LPDDR6 with 10533 speeds, not to mention possibilities of adding large on-die/package caches.

 

[uzzi38]

Not so much when you consider we don't even have Alderlake mobile, and Meteorlake is 2 generations after that and Arrowlake is 3 generations after. We're looking at the most optimistic case of MTL in early 2023 and Arrowlake in early 2024.

LPDDR5x-8533 is coming soon, so it'll at least support that, and maybe something like LPDDR6 with 10533 speeds, not to mention possibilities of adding large on-die/package caches.

I don't think we'll see LPDDR6 any time soon given DDR6 is looking like very late in the decade, but definitely agreed on large caches.

LPDDR5X on it's own gives double the bandwidth of what Tiger Lake runs on today. Bump up cache levels a few notches Infinity Cache style and I can see 384EUs being easily manageable, especially if Intel keep clocks low like they do currently in mobile.

 

[dullard]

We're looking at the most optimistic case of MTL in early 2023 and Arrowlake in early 2024.

TSMC N3 is supposedly shipping to a customer for revenue Q1 2023. https://www.anandtech.com/show/17013/tsmc-update-3nm-in-q1-2023-3nm-enhanced-in-2024-2nm-in-2025

Arrow Lake is rumored to be using TSMC N3. So, theoretically Arrow Lake should be able to hit Intel's goal of yearly launches late 2023 (Alder Lake late 2021, Raptor Lake lake 2022, Arrow Lake late 2023). I would say that 2024 is not the most optimistic case. That is, unless you are talking about the mobile chips would be most optimistic in 2024.

 

[Exist50]

That's an even crazier thought! How they gonna feed that many execution units with a max TDP of 35W?

I suspect they'll allow it to use at least up to 45W if the manufacturer wants. Should be able to replace up to mid range dGPU laptop configs, depending on when it launches.

 

[mikk]

Not so much when you consider we don't even have Alderlake mobile, and Meteorlake is 2 generations after that and Arrowlake is 3 generations after. We're looking at the most optimistic case of MTL in early 2023 and Arrowlake in early 2024.

It's not like we got a 50% iGPU shader uplift every generation. By looking into past generations from AMD and Intel, these increases are big. Intel was conservative over multiple years since Sandy Bridge and AMD offered 512 shader units from 2017 till 2021 and in 2022 apparently they have 768 shader. Without accounting for the clock speed+uarch differences it's a 50% uplift within 5 years. It was more than enough against the old Intel but now I believe AMD needs to be more aggressive in the next years.

 

[IntelUser2000]

Arrow Lake is rumored to be using TSMC N3.

I don't buy this unless they want to kill their process ambitions.

Meteorlake: Intel 4
Arrowlake: Intel 3
Lunarlake: Intel 20A
Novalake: Intel 18A

Intel 3 is a modification of their Intel 4 process so it makes sense to use that. They might use TSMC N3 elsewhere.

"5 process nodes in 4 years"
"Leadership by 2025"

Process is to me an unquestionable part of their plan. If they "skip" Intel 3 then 20A and 18A is dead, period. And I mean Intel 3 has to be a significant part of their process. If it turns like an FPGA or Cannonlake it's dead as a doorknob. No, it has to be mass produced like Tigerlake. There's no such thing as skipping a process. It's expecting a baby to walk before they crawl.

And where do you see Meteorlake fitting there huh? It just disappears into the thin air?

It's not like we got a 50% iGPU shader uplift every generation. By looking into past generations from AMD and Intel, these increases are big.ut now I believe AMD needs to be more aggressive in the next years.

Remembrandt will be a huge improvement in iGPU performance, while Intel seems to stand still for two years with Alderlake and Raptorlake. 2700 in Time Spy is 80-100% improvement over Cezanne.

My guess is they are bringing some of their Xe-HPG gains and either Alderlake or Raptorlake will have the 1.5x clocks/1.5x perf/watt improvement. But again that'll be 2200 in TS and behind Remembrandt. Looks like to me they want to try competing again in Meteorlake and Arrowlake and nothing from now until then.

The gains you are going to see in GPUs and CPUs will absolutely dwarf what we see now. After a lull since 2016, things are intensifying again, as with 1995. It won't be all roses but it won't be 5% a year anymore.

That's an even crazier thought! How they gonna feed that many execution units with a max TDP of 35W?

Competition is demanding Meteorlake to be 3x as fast and Arrowlake with double the EUs 6x as fast. Since I don't believe they'll move zero from now until 2023 in Meteorlake, something is happening before then right? Which I assume it will. 1.5x with clocks x 2x with hardware = 3x with 192EUs in Meteorlake.

 

[uzzi38]

It's not like we got a 50% iGPU shader uplift every generation. By looking into past generations from AMD and Intel, these increases are big. Intel was conservative over multiple years since Sandy Bridge and AMD offered 512 shader units from 2017 till 2021 and in 2022 apparently they have 768 shader. Without accounting for the clock speed+uarch differences it's a 50% uplift within 5 years. It was more than enough against the old Intel but now I believe AMD needs to be more aggressive in the next years.

There's a tonne of headroom AMD can take advantage of, I wouldn't worry about that. As in, it should be relatively easy to scale up performance from Rembrandt onwards.

If anything knowing that Intel's doing what they're doing is a great thing, because it looks like the iGPU space will have some real competition, which is neat.

 

[dullard]

I don't buy this unless they want to kill their process ambitions.

Meteorlake: Intel 4
Arrowlake: Intel 3
Lunarlake: Intel 20A
Novalake: Intel 18A

Intel 3 is a modification of their Intel 4 process so it makes sense to use that. They might use TSMC N3 elsewhere.

"5 process nodes in 4 years"
"Leadership by 2025"

Process is to me an unquestionable part of their plan. If they "skip" Intel 3 then 20A and 18A is dead, period. And I mean Intel 3 has to be a significant part of their process. If it turns like an FPGA or Cannonlake it's dead as a doorknob. No, it has to be mass produced like Tigerlake. There's no such thing as skipping a process. It's expecting a baby to walk before they crawl.

And where do you see Meteorlake fitting there huh? It just disappears into the thin air?

I don't think I've ever seen anyone claim your list of nodes. Not all rumors match exactly, but the consensus is more like this:

• Raptor Lake: Intel 7
• Meteor Lake: Mix, but includes Intel 4
• Arrow Lake: TSMC N3. But this does depend on timing. Intel 3 isn't supposed to be ready until after Arrow Lake has started manufacturing. But, Intel could delay Arrow Lake to use Intel 3.
• Lunar Lake: Intel 3
• Nova Lake: Intel 20A

That way they still get their 5 process nodes in 4 years.

1. 14 nm: Rocket Lake larly 2021
2. Intel 7: Alder Lake late 2021/early 2022, Raptor Lake late 2022
3. Intel 4: Meteor Lake early 2023. Arrow Lake would come late 2023, but could be mix of TSMC N3 and whatever node Intel wants for the other chiplets
4. Intel 3: Lunar Lake late 2024
5. Intel 20A: Nova Lake late 2025

And if they do hit that goal, then 20A would have the process leadership in 2025 (although not for very long). There is no skipping Intel 3.

 

[mikk]

Remembrandt will be a huge improvement in iGPU performance, while Intel seems to stand still for two years with Alderlake and Raptorlake. 2700 in Time Spy is 80-100% improvement over Cezanne.

The timespy score is not that impressive depending on the clock speed. If it's running at 2 Ghz for this score it's not that great. Too early to judge about Rembrandt.

My guess is they are bringing some of their Xe-HPG gains and either Alderlake or Raptorlake will have the 1.5x clocks/1.5x perf/watt improvement.

ADL and Raptor iGPU is based on Gen12LP there is no change, they can only benefit from the 10ESF efficiency gains over 10SF. MTL and Arrow are based on Gen12.7 which is HPG based, this is a much bigger change in combination with a TSMC node. Intel claims 1.5x better perf/watt for DG2 @6nm and 1.5x clock speed improvements over Xe LP. MTL is using a 5nm or even 3nm GPU tile.

 

[uzzi38]

The timespy score is not that impressive depending on the clock speed. If it's running at 2 Ghz for this score it's not that great. Too early to judge about Rembrandt.





ADL and Raptor iGPU is based on Gen12LP there is no change, they can only benefit from the 10ESF efficiency gains over 10SF. MTL and Arrow are based on Gen12.7 which is HPG based, this is a much bigger change in combination with a TSMC node. Intel claims 1.5x better perf/watt for DG2 @6nm and 1.5x clock speed improvements over Xe LP. MTL is using a 5nm or even 3nm GPU tile.

It's over double the performance of mobile Renoir/Cezanne (highest 5800U score is 1300pts), how is that not impressive?

I guess you're comparing to Tiger Lake, but if anything Tiger Lake overachieves in the benchmark, because the chip is definitely not nearly 50% faster in games.

 

[Ajay]

I don't think I've ever seen anyone claim your list of nodes. Not all rumors match exactly, but the consensus is more like this:

• Raptor Lake: Intel 7
• Meteor Lake: Mix, but includes Intel 4
• Arrow Lake: TSMC N3. But this does depend on timing. Intel 3 isn't supposed to be ready until after Arrow Lake has started manufacturing. But, Intel could delay Arrow Lake to use Intel 3.
• Lunar Lake: Intel 3
• Nova Lake: Intel 20A

That way they still get their 5 process nodes in 4 years.

1. 14 nm: Rocket Lake larly 2021
2. Intel 7: Alder Lake late 2021/early 2022, Raptor Lake late 2022
3. Intel 4: Meteor Lake early 2023. Arrow Lake would come late 2023, but could be mix of TSMC N3 and whatever node Intel wants for the other chiplets
4. Intel 3: Lunar Lake late 2024
5. Intel 20A: Nova Lake late 2025

And if they do hit that goal, then 20A would have the process leadership in 2025 (although not for very long). There is no skipping Intel 3.

The process development roadmap given by @IntelUser2000 is correct, but that info is paywalled. Anyway, it's a pretty aggressive, though more incremental (aside from GAA nano-wire in 20A) than Intel's historical 'jumps' forward. AKA, they've seen the success TSMC has had and have woken up and are doing the same thing.

 

[IntelUser2000]

It's over double the performance of mobile Renoir/Cezanne (highest 5800U score is 1300pts), how is that not impressive?

I guess you're comparing to Tiger Lake, but if anything Tiger Lake overachieves in the benchmark, because the chip is definitely not nearly 50% faster in games.

The top Xe G7 gets 1800 in TS GPU while top non H Vega gets 1300. The TDP is higher on the Xe G7 so maybe it'll be 30% and be in line with TS scores?

@mikk It's impressive particularly since there's nothing from Intel for 3 generations. I also know from looking at reviews on the mini gaming PCs that while the Iris Xe is indeed faster when both are set at 25W TDP the Vega gets closer and even surpasses it at lower TDP settings. That's underwhelming for a chip that will hold the fort for 3 years.

@Ajay Good to hear what I think they need to do is their plans. Yea the half node jumps surely make it sound better than it is.

 

[uzzi38]

The top Xe G7 gets 1800 in TS GPU while top non H Vega gets 1300. The TDP is higher on the Xe G7 so maybe it'll be 30% and be in line with TS scores?

@mikk It's impressive particularly since there's nothing from Intel for 3 generations.

@Ajay Good to hear what I think they need to do is their plans. Yea the half node jumps surely make it sound better than it is.

I don't think so, Renoir/Cezanne gain very little iGPU performance past about 18W, and same goes for Tiger Lake past about 25W - for reference the highest I've seen my 80EU 1135G7 do under normal gaming conditions is 11.3W, but under an unrealistic load (Yakuza 0 but at 4x render resolution) it capped at 13W. So Tiger Lake should generally still be maxed out in most games within reasonable power limits for a -U chip.

 

[IntelUser2000]

an unrealistic load (Yakuza 0 but at 4x render resolution) it capped at 13W. So Tiger Lake should generally still be maxed out in most games within reasonable power limits for a -U chip.

Time Spy at 1500 points means the scene is heavily GPU bound and is stuttering with the CPU underutilized.

In games, you'd never do that so the CPU starts to matter. I'd assume the continual increasing TDP would help in real world gaming higher than GPU power consumption suggests.

They struggled with this balance for a while in the earlier generations where people would complain the CPU Turbo would take too much away from the GPU power just to give an example.

Not saying you are wrong but just FYI.