... which coincidentally shows a negative 3% ST IPC scaling going from 3.9 ICL to 4.7 TGL. I thought the cache subsystem of ICL was already well known.That is a brutal GB5 ST score. Given the typical latency of those laptop memory subsystems, that is an epic score...
SPR should be on time with enough volume for Aurora. It's PVC that's under scrutiny really.
Ian believes Intel has a hard deadline of the end of next year to deliver Aurora. Which means they would have to finish both Sapphire Rapids and Ponte Vecchio by then.
You don’t need to believe Intel. The evidence is out there. We have proof these chips are hitting 4.7 Ghz. Intel has told the press TGU is a 15w part.
What evidence is that? Being able to hit a high turbo frequency with brute voltage and power proves absolutely nothing about power efficiency. Then there is the issue of 15w. Where is the evidence that the performance is x% better at that throttled power instead of the one minute benchmark where the test has just enough time to finish in PL1 with unlimited power? I was there when they started to degrade the power rating definition... somewhat in response to AMD also doing the same thing, but whatever.
Anyways, like people have said time will tell, just pinky promise to call out Intel marketing again when the numbers fall flat.
... which coincidentally shows a negative 3% ST IPC scaling going from 3.9 ICL to 4.7 TGL. I thought the cache subsystem of ICL was already well known.
People here mentioned that the base frequency has increased by >500MHz? If I’m not wrong the base frequency must be sustained on all cores and still meet TDP. Voltage will probably have to be lower at the same freq, being such a big contributor.
That is a brutal GB5 ST score. Given the typical latency of those laptop memory subsystems, that is an epic score. This new cache subsystem seems to be doing great job!
I would expect properly tuned desktop class system to have ~1850ST score ( @ 5ghz clock )
What evidence is that? Being able to hit a high turbo frequency with brute voltage and power proves absolutely nothing about power efficiency. Then there is the issue of 15w. Where is the evidence that the performance is x% better at that throttled power instead of the one minute benchmark where the test has just enough time to finish in PL1 with unlimited power? I was there when they started to degrade the power rating definition... somewhat in response to AMD also doing the same thing, but whatever.
Anyways, like people have said time will tell, just pinky promise to call out Intel marketing again when the numbers fall flat.
There are numerous independent benchmark results from testing/validation including a clevo and acer laptop. There is also press coverage including an AnandTech article.
Edit: Also confirms there are no changes to the core itself other than the cache.
Indeed, 8C/16T Desktop 65W chip at a competitive price would be a big, big deal for potential sales volume one would think.
Will the 8 actually be in any kind of volume? Guessing no, which is why Rocket Lake exists.
Golden Cove will have to convincingly beat Zen 4 on per-core performance to be competitive since Zen 4 will definitely have core count advantage. It will be interesting if that actually happens.
.. which coincidentally shows a negative 3% ST IPC scaling going from 3.9 ICL to 4.7 TGL. I thought the cache subsystem of ICL was already well known.
While voltage is a big part of the story, frequency increase still takes a (linear) toll on power usage.
The only clear thing about Intel's disclosures is the people in this forum who claimed Sunny Cove was inherently bad at high frequencies (independent of the process node) will have to eat some high crow dosage.
I hope I don't have to wait a whole year to see what Tiger Lake can do with DDR5-5400.
It does have support according to Dr. Ian, but actual hardware with DDR5 modules isn't expected until later in its life, which would be sometime in June next year. I'm not planning to buy it but I just want to see this CPU flex its muscles properly with the highest bandwidth memory available.I don't think TigerLake will ever support DDR5. Alder Lake probably will in some incarnation.
It does have support according to Dr. Ian, but actual hardware with DDR5 modules isn't expected until later in its life, which would be sometime in June next year. I'm not planning to buy it but I just want to see this CPU flex its muscles properly with the highest bandwidth memory available.
Very curious choice by Intel if they put Gracemont cores in AlderLake-S according to rumors. Does that mean the "Cove" cores are really power hungry and having only these cores in the chip would mean an astronomical TDP? Something to do maybe with the limits of Silicon manufacturing at the nanoscale? Or is it because they made certain design decisions to favor performance at the expense of so much power that having too many "Cove" cores too close together becomes prohibitive?That's odd. Alder Lake-P should be available by then, or very close to then. If it isn't . . .
Very curious choice by Intel if they put Gracemont cores in AlderLake-S according to rumors. Does that mean the "Cove" cores are really power hungry and having only these cores in the chip would mean an astronomical TDP? Something to do maybe with the limits of Silicon manufacturing at the nanoscale? Or is it because they made certain design decisions to favor performance at the expense of so much power that having too many "Cove" cores too close together becomes prohibitive?
I understand Gracemont cores being in a mobile chip but in a desktop chip?
AMD marketing won't miss the chance of making fun of that. "We only have real cores in our CPUs!"Plus you can say in marketing it has 16 cores.
It does have support according to Dr. Ian, but actual hardware with DDR5 modules isn't expected until later in its life, which would be sometime in June next year. I'm not planning to buy it but I just want to see this CPU flex its muscles properly with the highest bandwidth memory available.
AMD marketing won't miss the chance of making fun of that. "We only have real cores in our CPUs!"
I suppose it all depends on how fast the Gracemont cores in Alder Lake actually are.That's true. Alas, I guess that Alder Lake only supports max one chiplet each, so the alternative is only having the 8 big cores enabled.
I'm just guessing sometime around June next year would be "later in life" for Tiger Lake. Despite DDR5's higher cost, some manufacturers could decide to include it in premium laptop designs to differentiate their offerings.From where did you get 1 year? It could come early 2021....or never.