Discussion Intel current and future Lakes & Rapids thread

[JoeRambo]

That is a brutal GB5 ST score. Given the typical latency of those laptop memory subsystems, that is an epic score. This new cache subsystem seems to be doing great job!

I would expect properly tuned desktop class system to have ~1850ST score ( @ 5ghz clock )

 

[jpiniero]

https://twitter.com/i/web/status/1294580552503353344

Ian believes Intel has a hard deadline of the end of next year to deliver Aurora. Which means they would have to finish both Sapphire Rapids and Ponte Vecchio by then.

 

[lobz]

That is a brutal GB5 ST score. Given the typical latency of those laptop memory subsystems, that is an epic score...

... which coincidentally shows a negative 3% ST IPC scaling going from 3.9 ICL to 4.7 TGL. I thought the cache subsystem of ICL was already well known.

 

[uzzi38]

https://twitter.com/i/web/status/1294580552503353344

Ian believes Intel has a hard deadline of the end of next year to deliver Aurora. Which means they would have to finish both Sapphire Rapids and Ponte Vecchio by then.

SPR should be on time with enough volume for Aurora. It's PVC that's under scrutiny really.

 

[dmens]

You don’t need to believe Intel. The evidence is out there. We have proof these chips are hitting 4.7 Ghz. Intel has told the press TGU is a 15w part.

What evidence is that? Being able to hit a high turbo frequency with brute voltage and power proves absolutely nothing about power efficiency. Then there is the issue of 15w. Where is the evidence that the performance is x% better at that throttled power instead of the one minute benchmark where the test has just enough time to finish in PL1 with unlimited power? I was there when they started to degrade the power rating definition... somewhat in response to AMD also doing the same thing, but whatever.

Anyways, like people have said time will tell, just pinky promise to call out Intel marketing again when the numbers fall flat.

 

[geegee83]

What evidence is that? Being able to hit a high turbo frequency with brute voltage and power proves absolutely nothing about power efficiency. Then there is the issue of 15w. Where is the evidence that the performance is x% better at that throttled power instead of the one minute benchmark where the test has just enough time to finish in PL1 with unlimited power? I was there when they started to degrade the power rating definition... somewhat in response to AMD also doing the same thing, but whatever.

Anyways, like people have said time will tell, just pinky promise to call out Intel marketing again when the numbers fall flat.

People here mentioned that the base frequency has increased by >500MHz? If I’m not wrong the base frequency must be sustained on all cores and still meet TDP. Voltage will probably have to be lower at the same freq, being such a big contributor.

 

[JoeRambo]

... which coincidentally shows a negative 3% ST IPC scaling going from 3.9 ICL to 4.7 TGL. I thought the cache subsystem of ICL was already well known.

ST scaling is not perfect + we are comparing best score for ICL versus pre-release score for TGL?
Anyway my point was that for proper GB5 score, memory is important in several subtests.

 

[dmens]

People here mentioned that the base frequency has increased by >500MHz? If I’m not wrong the base frequency must be sustained on all cores and still meet TDP. Voltage will probably have to be lower at the same freq, being such a big contributor.

So they managed to patch up their woefully inconsistent low voltage transistor operation to the point it might be able to compete with AMD on power rated runs... congrats I guess.

 

[eek2121]

That is a brutal GB5 ST score. Given the typical latency of those laptop memory subsystems, that is an epic score. This new cache subsystem seems to be doing great job!

I would expect properly tuned desktop class system to have ~1850ST score ( @ 5ghz clock )

Yes, I saw that little gem last night. However, I would not expect perfect scaling, other workloads will likely hit the chip harder.

What evidence is that? Being able to hit a high turbo frequency with brute voltage and power proves absolutely nothing about power efficiency. Then there is the issue of 15w. Where is the evidence that the performance is x% better at that throttled power instead of the one minute benchmark where the test has just enough time to finish in PL1 with unlimited power? I was there when they started to degrade the power rating definition... somewhat in response to AMD also doing the same thing, but whatever.

Anyways, like people have said time will tell, just pinky promise to call out Intel marketing again when the numbers fall flat.

There are numerous independent benchmark results from testing/validation including a clevo and acer laptop. There is also press coverage including an AnandTech article.

 

[dmens]

There are numerous independent benchmark results from testing/validation including a clevo and acer laptop. There is also press coverage including an AnandTech article.

Where? Has the NDA lifted?

 

[DrMrLordX]

Edit: Also confirms there are no changes to the core itself other than the cache.

. . . which, interestingly enough, does not necessarily bode well for Rocket Lake. It doesn't really matter if its based off Sunny or Willow, all we have to do is look at the cache.

Indeed, 8C/16T Desktop 65W chip at a competitive price would be a big, big deal for potential sales volume one would think.

Will the 8 actually be in any kind of volume? Guessing no, which is why Rocket Lake exists.

That's the rub, isn't it? What're the yields like on 10nm now? Certainly something must have improved, which is why Intel is getting better frequency/power curves out of it (and why TigerLake is actually going to perform significantly better than IceLake, we think). Even if they're getting better transistor characteristics, there's still the question of defect rate. And how many wafers are they going to have to sacrifice to IceLake-SP and Sapphire Rapids?

Golden Cove will have to convincingly beat Zen 4 on per-core performance to be competitive since Zen 4 will definitely have core count advantage. It will be interesting if that actually happens.

Zen4 is looking like a 2022 CPU now. If ADL-P can make it out in 2021, it'll face Cezanne for awhile.

 

[IntelUser2000]

Ideally, the 40% gain would translate into 40% gain in MT and 25% gain in ST, but based on leaks it could be that Tigerlake offers Icelake CPU core performance at half the power, or 25% performance increase in general with same power.

.. which coincidentally shows a negative 3% ST IPC scaling going from 3.9 ICL to 4.7 TGL. I thought the cache subsystem of ICL was already well known.

It's 19% in ST Integer, then there's the whole user-submitted part.

While voltage is a big part of the story, frequency increase still takes a (linear) toll on power usage.

The only clear thing about Intel's disclosures is the people in this forum who claimed Sunny Cove was inherently bad at high frequencies (independent of the process node) will have to eat some high crow dosage.

1) Fair point.
2) Some not all. We'll never get Core-iso or Process-iso comparisons. For all I know 10nm SF is better than 14nm in most curves.

 

[igor_kavinski]

I hope I don't have to wait a whole year to see what Tiger Lake can do with DDR5-5400.

 

[DrMrLordX]

I hope I don't have to wait a whole year to see what Tiger Lake can do with DDR5-5400.

I don't think TigerLake will ever support DDR5. Alder Lake probably will in some incarnation.

 

[igor_kavinski]

I don't think TigerLake will ever support DDR5. Alder Lake probably will in some incarnation.

It does have support according to Dr. Ian, but actual hardware with DDR5 modules isn't expected until later in its life, which would be sometime in June next year. I'm not planning to buy it but I just want to see this CPU flex its muscles properly with the highest bandwidth memory available.

 

[DrMrLordX]

It does have support according to Dr. Ian, but actual hardware with DDR5 modules isn't expected until later in its life, which would be sometime in June next year. I'm not planning to buy it but I just want to see this CPU flex its muscles properly with the highest bandwidth memory available.

That's odd. Alder Lake-P should be available by then, or very close to then. If it isn't . . .

 

[igor_kavinski]

That's odd. Alder Lake-P should be available by then, or very close to then. If it isn't . . .

Very curious choice by Intel if they put Gracemont cores in AlderLake-S according to rumors. Does that mean the "Cove" cores are really power hungry and having only these cores in the chip would mean an astronomical TDP? Something to do maybe with the limits of Silicon manufacturing at the nanoscale? Or is it because they made certain design decisions to favor performance at the expense of so much power that having too many "Cove" cores too close together becomes prohibitive?

 

[jpiniero]

Very curious choice by Intel if they put Gracemont cores in AlderLake-S according to rumors. Does that mean the "Cove" cores are really power hungry and having only these cores in the chip would mean an astronomical TDP? Something to do maybe with the limits of Silicon manufacturing at the nanoscale? Or is it because they made certain design decisions to favor performance at the expense of so much power that having too many "Cove" cores too close together becomes prohibitive?

It's for mobile. Mainstream Desktop of course piggybacks on mobile.

 

[igor_kavinski]

I understand Gracemont cores being in a mobile chip but in a desktop chip?

 

[jpiniero]

I understand Gracemont cores being in a mobile chip but in a desktop chip?

It's the same silicon. If it's there, why not have models with the small core enabled? Plus you can say in marketing it has 16 cores.

 

[igor_kavinski]

Plus you can say in marketing it has 16 cores.

AMD marketing won't miss the chance of making fun of that. "We only have real cores in our CPUs!"

 

[mikk]

It does have support according to Dr. Ian, but actual hardware with DDR5 modules isn't expected until later in its life, which would be sometime in June next year. I'm not planning to buy it but I just want to see this CPU flex its muscles properly with the highest bandwidth memory available.

From where did you get 1 year? It could come early 2021....or never.

 

[jpiniero]

AMD marketing won't miss the chance of making fun of that. "We only have real cores in our CPUs!"

That's true. Alas, I guess that Alder Lake only supports max one chiplet each, so the alternative is only having the 8 big cores enabled.

 

[eek2121]

That's true. Alas, I guess that Alder Lake only supports max one chiplet each, so the alternative is only having the 8 big cores enabled.

I suppose it all depends on how fast the Gracemont cores in Alder Lake actually are.

EDIT: The cores will add performance in Multi-threaded workloads, even if they are slower. Take Zen 2 per-CCX overclocking, for example.

 

[igor_kavinski]

From where did you get 1 year? It could come early 2021....or never.

I'm just guessing sometime around June next year would be "later in life" for Tiger Lake. Despite DDR5's higher cost, some manufacturers could decide to include it in premium laptop designs to differentiate their offerings.