Discussion Intel current and future Lakes & Rapids thread

[mooreslawisnotdead]

I am of the belief the Jim Keller is not a demigod, and that with the limited time he had at Intel there was not much influence.

This. The project is still in pathfinding and Jim Keller left Intel last year. MLID trying to clickbait. Glenn Hinton is the one working on it. The so called "exciting high performance CPU project" he mentioned in his LinkedIn post.

 

[Hulk]

I'm still fascinated by the the Intel quoted Gracemont performance numbers. You see my main rig is a 4770K running stock, meaning a Gracemont cluster should outperform it while using a fraction of the power and die area. Pretty amazing if true.

Considering Gracemont performance I'm thinking price/performance-wise the 6+8 part might be the sweet spot. Mobile battery life should be astounding with Gracemont as well.

 

[eek2121]

The same can be said about Gracemont. Intel presented us with a very nice and marketing driven graph that makes it seem like Gracemont and Skylake will operate in the same performance range, quite similar clocks actually. Final Skylake design was 5+Ghz, Gracemont is expected to stay around ~4Ghz. That's a 25%+ delta.

Intel claim may very well be true, as long as we properly apply it within a clock range that still allows Gracemont to raise clocks over Skylake at ISO power. The same should be applied to Abwx's claim, in the sense that we would have to consider a clock range that allows "Skyalke Shrink" to clock higher at ISO power.

I imagine if Intel wanted they could push the clocks up higher at the cost of efficiency.

Notice also that the bench is not Spec_int (the one used by AT for INT IPC comparisons) but Spec_rate wich take account of RAM speed and I/O improvement.

Which could possibly be skewed by DDR5.

I find it hard to be excited about Skylake level IPC CPU that is clocked 4Ghz. It starts its life with 25% clock deficit versus 2015 era Skylake and even on conservative estimates it is beaten by at least 40% by Apple 3Ghz M1 cpu core?
Even supposed area efficiency is quite questionable and should be compared to ARM X2 and not Intel's fat cores that are way overblown.

To this day i have no clue what desktop user is supposed to do with those small cores and what are the tasks that cannot be completed by 8 big cores. Unless of course the people who are trying to beat neighbor with 5950x in Cinebench (while ignoring the one with 3990X ) are the target audience?

My plan remains the same - getting Alder Lake, disabling small cores and enjoying proper CPU with ton of cache ( btw Alder Lake will be first Intel's desktop CPU that will have more L2+L3 core available for cores than AMD since ZEN2 came out).

If Gracemont is really as fast as (or slightly faster than) Skylake, I can find plenty of reasons to be excited about it, even in the 3-4 ghz range. It is a small, fast, power efficient core. Skylake might be "old", but it is no slouch when it comes to getting things done. I'd love to have 16 Gracemont cores in a laptop, for example. It looks like that is where Raptor Lake will shine.

 

[eek2121]

I'm still fascinated by the the Intel quoted Gracemont performance numbers. You see my main rig is a 4770K running stock, meaning a Gracemont cluster should outperform it while using a fraction of the power and die area. Pretty amazing if true.

Considering Gracemont performance I'm thinking price/performance-wise the 6+8 part might be the sweet spot. Mobile battery life should be astounding with Gracemont as well.

A node shrink and lack of hyperthreading will do that.

 

[Shivansps]

I find it hard to be excited about Skylake level IPC CPU that is clocked 4Ghz. It starts its life with 25% clock deficit versus 2015 era Skylake and even on conservative estimates it is beaten by at least 40% by Apple 3Ghz M1 cpu core?
Even supposed area efficiency is quite questionable and should be compared to ARM X2 and not Intel's fat cores that are way overblown.

To this day i have no clue what desktop user is supposed to do with those small cores and what are the tasks that cannot be completed by 8 big cores. Unless of course the people who are trying to beat neighbor with 5950x in Cinebench (while ignoring the one with 3990X ) are the target audience?

My plan remains the same - getting Alder Lake, disabling small cores and enjoying proper CPU with ton of cache ( btw Alder Lake will be first Intel's desktop CPU that will have more L2+L3 core available for cores than AMD since ZEN2 came out).

Well if we could tell Windows to only use the small cores for background tasks and specific process (like browsers, AV, discord, other brackground apps), in so, not wasting any of the big cores cache for mundane stuff, and all else run on the big core i could definately see some good use there. Not im not sure if Windows 11 will allow us to select and save those preferences, it would be great if so trough.

 

[dullard]

To this day i have no clue what desktop user is supposed to do with those small cores and what are the tasks that cannot be completed by 8 big cores. Unless of course the people who are trying to beat neighbor with 5950x in Cinebench (while ignoring the one with 3990X ) are the target audience?

The small cores are for highly multi-threaded applications. Desktop users do use those applications. The big cores are for fast single-threaded, poorly-threaded, and user-interface applications. Desktop users use that too. So, desktop users are the ideal case for hybrid.

Intel seems all-in on a small handful of big cores for fast user interface and fast single-threaded applications. Then you'll see more and more and more of the smaller cores (think dozens in the next few years) for applications that are multi-threaded.

 

[eek2121]

The small cores are for highly multi-threaded applications. Desktop users do use those applications. The big cores are for fast single-threaded, poorly-threaded, and user-interface applications. Desktop users use that too. So, desktop users are the ideal case for hybrid.

Intel seems all-in on a small handful of big cores for fast user interface and fast single-threaded applications. Then you'll see more and more and more of the smaller cores (think dozens in the next few years) for applications that are multi-threaded.

To be fair, many of us speculate that Atom will one day replace core, so as atom cores get faster, we’ll see fewer large cores and more small cores.

 

[dmens]

Lmao, you were the one claiming it was impossible for Atom to come anywhere close to Core.

Yep, and standing by it. I thought you lot were always blabbering about "ABSOLUTE PERFORMANCE". These slides are missing the all important qualifier, 40% more performance at what power, or 40% less power at what performance. For example, all they have to do to make that first claim is downvolt the skylake to the lowest possible power where it is crawling along at 800mhz, then run the atom at that normalized power where it can easily clock higher. Marketing magic.

And obviously atom will beat the big cores in efficiency. The issue is what performance it can achieve at its higher efficiency. inb4 "4ghz ATOM" like you have been spewing... with a 3 cycle L1? Yeah right.

As always, get your gullibility meters checked.

 

[jpiniero]

And obviously atom will beat the big cores in efficiency. The issue is what performance it can achieve at its higher efficiency. inb4 "4ghz ATOM" like you have been spewing... with a 3 cycle L1? Yeah right.

Leak did say the i9 would have a turbo boost of 3.9.

 

[dmens]

Leak did say the i9 would have a turbo boost of 3.9.

I don't look at leaks. I actually do this for a living.

 

[jpiniero]

I don't look at leaks. I actually do this for a living.

Maybe the real final specs will leak soon if this is really launching in October.

 

[dullard]

we’ll see fewer large cores and more small cores.

That is what I said. We are going to a system of a few large cores (2 to 8 depending on use case) and as many small cores as Intel can fit on the chip.

 

[Thala]

Alternatively, they are explicitely talking about Skylake, and it was nowhere near 5GHz. The conclusion will be the same - Gracemont has higher performance/clock and still use half the power.

Sure, they most likely even took the original Skylake as reference, which was not even at the latest 14++++nm node, which skews the comparison even more in favor of Gracemont. In fact they could have easily presented an ISO-process comparison, but for apparent reasons from marketing perspective they did not.

 

[dullard]

The same can be said about Gracemont. Intel presented us with a very nice and marketing driven graph that makes it seem like Gracemont and Skylake will operate in the same performance range, quite similar clocks actually. Final Skylake design was 5+Ghz, Gracemont is expected to stay around ~4Ghz. That's a 25%+ delta.

Intel's claims are detailed here:
Architecture Day 2021 - 1 - ID:615781 | Performance Index (intel.com)
They are talking about equal performance (not equal clocks) for 40% less power. Meaning the 25% clock speed delta is already included in the graph. But of course, this is comparing to Skylake, not to a more modern core.

 

[dullard]

More Thread Director Examples: Intel Thread Director Demo by Rajshree Chabukswar - YouTube

 

[dmens]

Maybe the real final specs will leak soon if this is really launching in October.

How about actual benchmarks, which is all I care about. Specs mean nothing. Go look at the fine print for that atom perf/power graph and you see that they used an “architectural simulation”. Rather odd for a chip that has been running in labs for months and likely in final qualification right now if it is going to be released this year, so it ought to be trivial to get a real silicon measurement instead of making pretty slides using the most abstract model possible.

 

[jpiniero]

How about actual benchmarks, which is all I care about. Specs mean nothing. Go look at the fine print for that atom perf/power graph and you see that they used an “architectural simulation”. Rather odd for a chip that has been running in labs for months and likely in final qualification right now if it is going to be released this year, so it ought to be trivial to get a real silicon measurement instead of making pretty slides using the most abstract model possible.

That is strange. The comparison with Rocket Lake they did use a real system.

 

[dmens]

That is strange. The comparison with Rocket Lake they did use a real system.

Notice the comparison against Rocketlake is iso-frequency. That means the new core can't clock as high, otherwise they wouldn't have normalized frequencies for a marketing slide. Which is to be expected if they blew out the decoder and OOO resource width, but it is always amusing to spot the marketing spin.

 

[Doug S]

Here's a quick ramble from me regarding Alderlake

https://twitter.com/x/status/1428652293440917507

Diminishing returns apply for anything that increases size or power. If making a cache 2x bigger increases performance by 'y' then another doubling does not mean you are now getting '2y' more performance. Same for increases in structures like ROB, BTB, register file, fetch/execute/retirement/load/store width and so on. This applies even moreso for increasing the power budget, since power increases by the square of voltage, so raising the voltage to clock higher ramps power dramatically.

So I'm not really sure why you think that getting "only 33%" more IPC for 4x the area is a bad thing. Given that IPC is automatically increased as clock rate is decreased (and moreso when a design targets that lower clock rate) a 33% lower IPC for the small core means it will likely be something like half the performance. Just as an example pulled from my ass: a small core IPC of 1.5 at 3 GHz vs a big core IPC of 2 at 5 GHz.

That's a smaller gap between big and little cores than Apple's (and even bigger difference to ARM licensed cores but their small core design is ancient) but who says Apple's 3:1 performance split between big and little cores is the right one? The power split between them is more important, but until we see benchmarks we won't know how Intel compares on that front. And again, who says Apple's power split (10:1 I think from memory?) between big and little cores is the right one? The area split is pretty much irrelevant, you devote enough area to the little core to meet your power and/or performance split goals.

Given how much Intel seems to have been reacting rather than planning over the past half decade with all the process delays and AMD becoming competitive, it is quite possible (IMHO likely) that these cores did not begin the design process with the intention they would occupy the same chip together, and would thus look unbalanced when compared to something like Apple's big and little cores. If so, that will resolve itself when the first designs of cores that were designed from day one to be on the same chip reach production.

 

[eek2121]

I don't look at leaks. I actually do this for a living.

You argue on forums for a living?

Also, 3.7-3.9ghz is indeed the final clock for Gracemont.

 

[coercitiv]

They are talking about equal performance (not equal clocks) for 40% less power. Meaning the 25% clock speed delta is already included in the graph.

It's not included in the graph, unless you think Gracemont has a ~35%+ PPC advantage over Skyalke. (that would be almost Golden Cove PPC)

 

[dmens]

You argue on forums for a living?

Also, 3.7-3.9ghz is indeed the final clock for Gracemont.

Nah, I mock rumor and leak dabblers for free.

 

[Exist50]

I don't look at leaks. I actually do this for a living.

You explicitly claimed that Atom would reach nowhere near 4GHz, even overclocked. Increasingly looks like we're getting 3.9GHz out of the box. Same applies for the IPC uplift.

It's well past time to start walking back your ridiculous claims, but if you want to dig yourself yet deeper even after official numbers that directly contradict your predictions, then by all means go ahead.

 

[dmens]

You explicitly claimed that Atom would reach nowhere near 4GHz, even overclocked. Increasingly looks like we're getting 3.9GHz out of the box. It's probably time to start walking back those ridiculous claims, but if you want to dig yourself yet deeper even after official numbers that directly contradict your predictions, then by all means go ahead.

What official numbers?

Also I never said overclocked, you are making stuff up as always. Anyone can throw insane voltage at a part and make it go at some ridiculous frequency.

 

[insertcarehere]

It's not included in the graph, unless you think Gracemont has a ~35%+ PPC advantage over Skyalke. (that would be almost Golden Cove PPC)

Why would that be impossible again?

ARM has shown repeatedly that cores with lower clock targets and less complex features can have pretty high PPC despite being small and power efficient. Current X1 implementations already have a 30%+ PPC advantage over the latest Skylake cores.

It's fair to doubt whether Intel of all companies can replicate this with their track record, but its not exactly new ground they're breaking....