Intel Cannonlake, Ice Lake, Tiger Lake & Sapphire rapid thread

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Hitman928

Platinum Member
Apr 15, 2012
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Thanks!
But what does marketshare have to do with profit?

I said that taking in under 2% of the net income in the x86 market, was not enough to have a competitive AMD long-term.
AMD is paying off debt and reinvesting back into the company to grow and become more competitive. Intel is in a very different spot, they haven't had large debts (comparatively) to pay down and aren't exactly a growth company in their core business. If you look at revenue, AMD is sitting closer to 10% of Intel's total revenue. But, they obviously don't compete in a lot of markets. AMD lumps graphics cards and CPUs into the same category and semi-custom gets lumped in with enterprise so it's tough to know what the revenues are where they compete with Intel.

However, in 1Q, AMD said that semi-custom revenue was negligible and that enterprise GPU was in a lull, so if we take the 1Q AMD enterprise vs Intel DC numbers, AMD had closer to 5% revenue share. Servers is also AMD's most lagging category in terms of adoption so desktop, HEDT, and laptops should all be significantly higher revenue share. AMD's and Intel's GM are also starting to get closer than I think Intel should be comfortable with considering the massive amounts they have to spend on R&D for their fabs.

Long story short, AMD is built to run lean and is experiencing significant revenue growth which it is steadily using to pay off debt and reinvest into itself. Intel will feel a lot of pain as AMD continues to not only take market share, but also force Intel to sell chips for lower GM than they've gotten used to over the last 10 - 15 years. Considering Intel's process problems now extend to 7 nm, it's going to be at least 3 years before they can stop the bleeding, if even by then. This is going to force Intel to have a major shakeup sooner or later, if they don't, it's going to be a slow painful death. IF they can get 7 nm out by early 2023 and in high volume with good yields, it probably won't be all that painful, but given their recent track record, that's a big if.

Luckily for Intel, there has been an unexpected surge in home PC and server demand due to COVID and AMD's inability to ramp quickly to meet demand due to TSMC being booked. AMD will be ramping soon with Apple and others moving to 5 nm and TSMC continuing to expand capacity so this won't be a saving grace for Intel much longer and who knows what will happen to all this demand once we start to move into a post COVID world, whenever that happens. One thing's for sure, after years of boring Intel dominance in all non-mobile CPUs, things have gotten a lot more interesting the last couple of years.
 

uzzi38

Senior member
Oct 16, 2019
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This won't be happening any time soon as the tooling between 5nm and 7nm is mostly the same.
Wafer capacity is no longer an issue.

Not that it changes anything. AMD's slowness to ramp is them being conservative.
 
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Ajay

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Jan 8, 2001
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Wafer capacity is no longer an issue.

Not that it changes anything. AMD's slowness to ramp is them being conservative.
From what I've read, the issue is AMD's ability to satisfy OEMs end to end integration and co-design capabilities (something Intel still excels at).

That changed as soon as it was decided Huawei was no longer a factor.
Still not enough volume to turn the tables by any significant amount. AMD will be ramping it's volume for some years to come.

This won't be happening any time soon as the tooling between 5nm and 7nm is mostly the same.
IIRC, TSMC is/has built a very large Fab for 5nm silicon, as it is expected to be a long node.
 

uzzi38

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Oct 16, 2019
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From what I've read, the issue is AMD's ability to satisfy OEMs end to end integration and co-design capabilities (something Intel still excels at).



Still not enough volume to turn the tables by any significant amount. AMD will be ramping it's volume for some years to come.


IIRC, TSMC is/has built a very large Fab for 5nm silicon, as it is expected to be a long node.
First point is correct but applies primarily for mobile. In other markets this is less of an issue - the only other market where that applies would be HPC (sort of, HPC doods like end-to-end solutions as much as possible), but as you've seen recently, AMD's doing just fine there.

Agreed on the second point. AMD won't be turning the tides any time soon. Just know that TSMC are very positive on AMD's prospects, as well, the partnership between the two is a lot more than you'd expect from a company of AMD's size (relatively speaking of course).

For point three, yes, and they have another huge fab being built for N3 as well. It's not particularily about N5 being a long lasting node, the demand is certainly there for N3 and beyond too.
 
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Ajay

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Agreed on the second point. AMD won't be turning the tides any time soon. Just know that TSMC are very positive on AMD's prospects, as well, the partnership between the two is a lot more than you'd expect from a company of AMD's size (relatively speaking of course).
The chiplet strategy across multiple segments that AMD has used help greatly here, IMHO. Isn't AMD getting close to Apple's wafer consumption, or have they beaten them already? Of course, Apple has tons of money to dump into risk production - very much enamoring them to TSMC.
 

uzzi38

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Oct 16, 2019
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The chiplet strategy across multiple segments that AMD has used help greatly here, IMHO. Isn't AMD getting close to Apple's wafer consumption, or have they beaten them already? Of course, Apple has tons of money to dump into risk production - very much enamoring them to TSMC.
I think we're starting to veer a little off topic again and this should really continue over in the Zen 3 thread, but one last post here for now:

They're a long ways away from Apple yet, but they're no slouch as they come up to 20K in the near future.

Before everything happened with Huawei we were looking at ~30K for N5 (maybe N5P, after all Navi was the first N7P product to hit the market, AMD could do the same with N5), not sure how the news there alongside the potential affects of Intel's 7nm slipping will have on wafer orders for N7+ and N5 (because there's a possibility demand could see a noticable uptick).
 

IntelUser2000

Elite Member
Oct 14, 2003
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Interesting. Why would rocket lake have lower ipc than mobile ice lake?
If true, it would be because its a backport. Sunny Cove would be optimized for a 10nm process, so moving that to a 14nm would mean engineers need to make concessions on die size and power consumption for the logic functions.

Though he did say its 10%+, not 10%. Whether that's 11% or 15-16% we don't know. Sunny Cove is 15-20% so a few % behind.
 

DrMrLordX

Lifer
Apr 27, 2000
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It also explains the QC TIger Lake-H rumor (since that die would be smaller than the U I think due to having 32 EUs).
4c/8t Tiger Lake-H is a non-starter. 8c or bust. Why even launch that chip?

The CCG margins are getting completely wrecked but I guess they are at the point where they don't have much of a choice versus Renior.
Won't that come out in their Q3 earnings reports?

As it stands, there's also no way they can realistically fab Ice Lake-SP in any kind of volume.
They should be less-worried about Ice Lake-SP and more worried about Sapphire Rapids.
 

uzzi38

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4c/8t Tiger Lake-H is a non-starter. 8c or bust. Why even launch that chip?



...



They should be less-worried about Ice Lake-SP and more worried about Sapphire Rapids.
4c TGL-H is just to tide them over until actual TGL-H launches. Also justifies the use to pump per-C power even higher.

It doesn't really change anything at all in terms of final products because I can bet that if an OEM really wanted to, they'd have just configured TGL-U to 35W PL1 and Intel wouldn't have stopped them. This way Intel can try and show off as large of a 1T performance gap as possible.

SPR isn't monolithic, and while the way it's chiplet doesn't mean yields are instantly fine, at the very least they shouldn't be worse than Ice Lake-SP. At the very least.

The bigger concern is definitely that SPR has to compete vs Genoa, launching in Q4 21 with Genoa 1-2 quarters later is very rough.
 

IntelUser2000

Elite Member
Oct 14, 2003
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SPR isn't monolithic, and while the way it's chiplet doesn't mean yields are instantly fine, at the very least they shouldn't be worse than Ice Lake-SP. At the very least.
We're not 100% sure of that. Surely we'll see -AP variants but for regular chips? That's up in the air.
 

jpiniero

Diamond Member
Oct 1, 2010
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SPR isn't monolithic, and while the way it's chiplet doesn't mean yields are instantly fine, at the very least they shouldn't be worse than Ice Lake-SP. At the very least.
That's what I mean - Ice Lake-SP is too big. It's gonna be a paper product.
 

mikk

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May 15, 2012
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4c/8t Tiger Lake-H is a non-starter. 8c or bust. Why even launch that chip?
There is some advantage compared to 4C TGL-H: Higher battery runtime and better graphics - if they don't downgrade its GT2. Tigerlake-H only gets GT1 and it's still a 2 chip solution most likely, hence worse battery runtimes than ULV Tigerlake. At 35W they can clock it really high.
 

jpiniero

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Oct 1, 2010
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It doesn't really change anything at all in terms of final products because I can bet that if an OEM really wanted to, they'd have just configured TGL-U to 35W PL1 and Intel wouldn't have stopped them.
Right, the OEMs can easily set Tiger-U to 35 W PL1. It's about the yield.
 

mikk

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Right, the OEMs can easily set Tiger-U to 35 W PL1. It's about the yield.
Same can can be said for Renoir U-->H. I'm not sure if OEMs can easily set the PL1 higher than 28W but what they can't do is upping the clock speeds over Intels specification because base and turbo speeds are locked.
 

LightningZ71

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Mar 10, 2017
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Isn't the 14nm Sunny Cove backport also somewhat reduced in cache sizes? Reducing the caches internal to the CPU would certainly reduce it's IPC as compared to a higher cache version on the smaller node that it was targeted at.
 

LightningZ71

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Mar 10, 2017
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I wonder if Optane will show more relevance and performance being directly attached to the CPU instead of having to cross the chipset data link along with everything else? The access latency should be a bit quicker. It'll likely be PCIe 4.0 for the CPU link, so, if Intel bothers to update the PCIe controller on their Optane modules to support that speed, it'll have a higher transfer rate. We've got a pretty hefty amount of optane's in production at my job and they're almost completely seemless and do make a big difference for the machines that have them.
 

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