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Discussion Intel current and future Lakes & Rapids thread

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jpiniero

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Oct 1, 2010
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Alder Lake S and P potential options revealed?

S options:
8 big + 0/2/4/6/8 Small plus GT1 graphics
6 big + 0/2/4/6/8 Small plus GT1
4 big + 0 Small
2 big + 0 Small
 
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mikk

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As for ADL-P there are lots of options with 2 big cores while for ADL-S almost all have 6 or 8 big cores. I wonder if this is a theoretical list of potential configurations or if there is more behind it.
 

DrMrLordX

Lifer
Apr 27, 2000
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Wait why is there an 8+8 config for Alder Lake that won't be represented as Alder Lake-P? Like, what's even the point of having the 8 Gracemont cores at all if it's going to be desktop-only?
 

mikk

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Both desktop and mobile get 8 Gracemont cores but ADL-P maxes out at 6 Golden Cove cores.
 

jpiniero

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Wait why is there an 8+8 config for Alder Lake that won't be represented as Alder Lake-P? Like, what's even the point of having the 8 Gracemont cores at all if it's going to be desktop-only?
P options are:

6 Big + 4/8 Small
4 Big + 8 Small
2 Big + 0/4/8 Small
 

TheGiant

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Jun 12, 2017
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ADL looks like and interesting opportunity
the big cores could get rid of the legacy x86 stuff
there was a time like 3 years before when Intel made press release that I think Icelake=the last typical x86 upgrade and then they will drop it
but they can't when all cores are the same
now they won't be
gracemont looks like ~skylake IPC level so its enough to hold the legacy compatibility there
not that it is a bug chunk of die size, but it is imo slowing the development/testing phase

look what apple did and where they are
 

Thunder 57

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Aug 19, 2007
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ADL looks like and interesting opportunity
the big cores could get rid of the legacy x86 stuff
there was a time like 3 years before when Intel made press release that I think Icelake=the last typical x86 upgrade and then they will drop it
but they can't when all cores are the same
now they won't be
gracemont looks like ~skylake IPC level so its enough to hold the legacy compatibility there
not that it is a bug chunk of die size, but it is imo slowing the development/testing phase

look what apple did and where they are
Didn't the remove AVX-512 (and others) from Lakefield because the two cores needed the same instruction set(s)? Look near the bottom, "Whats Missing in Lakefield?"
 

TheGiant

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Jun 12, 2017
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Didn't the remove AVX-512 (and others) from Lakefield because the two cores needed the same instruction set(s)? Look near the bottom, "Whats Missing in Lakefield?"
that pretty new
I am thinking about x86 real, 16bit/ 32bit old, MMX, SSE (maybe, games dont agree)
maybe it doesn't take that much space, but it is slowing down
when you have skylake IPC gracemont on board, then you can (hello windows scheduler) reschedule the load to the gracemont core
it is not like old atom, which was good for a hand calculator
and the new big fat kill ocean cove can deliver
if you look at the ARM ecosystem, they can freely deliver without bothering much about being backwards compatible imo mainly because its accepted by the mobile market
my Ipad 4 has old version of iOS, my daughter's phone (my old one experiment) honor 7 has android 6, but Intel/amd x86 needs to run my mother's 20years old microscope software
the older codes are single threaded+compatibility based
this is a big opportunity unseen in the x86 history
 
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DrMrLordX

Lifer
Apr 27, 2000
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P options are:

6 Big + 4/8 Small
4 Big + 8 Small
2 Big + 0/4/8 Small
What I'm saying is, why put Gracemont on Alder Lake-S if there's die differentiation between -S and -P? Top-end Alder Lake-S should be something like 6+6 Golden Cove/Golden Cove. Those Gracemont cores have no real purpose except in devices married to a battery (or a very low thermal envelope, like a NUC/industrial PC). I've been reminded repeatedly that Gracemont would wind up in Alder Lake-S since -S and -P will share identical die layouts like previous generations of Intel CPUs. In this case it looks like -P gets a different Golden Cove die entirely. Unless it's an 8c die with two cores disabled.

Didn't the remove AVX-512 (and others) from Lakefield because the two cores needed the same instruction set(s)? Look near the bottom, "Whats Missing in Lakefield?"
Yes.
 

mikk

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May 15, 2012
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Top-end Alder Lake-S should be something like 6+6 Golden Cove/Golden Cove. Those Gracemont cores have no real purpose except in devices married to a battery (or a very low thermal envelope, like a NUC/industrial PC).
Are you sure 6+6 big+big is a faster solution than 8+8 big+litte? And are you sure 12 Golden Cove cores are doable on 10nm with proper clocks speeds while not using more than 125W?
 
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beginner99

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Are you sure 6+6 big+big is a faster solution than 8+8 big+litte? And are you sure 12 Golden Cove cores are doable on 10nm with proper clocks speeds while not using more than 125W?
Agree. With 8+8 big+litte you get 8 big cores on the same die and for anything gaming or interactive that should more than good enough. If you want to also do heavy multi-threading you get 8 more slower cores that use a lot less power. True, doesn't make sense for a gaming machine and 8+0 would fare just as well but that way marketing can't claim 16-cores, like AMD has. ;)
 
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mikk

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Agree. With 8+8 big+litte you get 8 big cores on the same die and for anything gaming or interactive that should more than good enough. If you want to also do heavy multi-threading you get 8 more slower cores that use a lot less power. True, doesn't make sense for a gaming machine and 8+0 would fare just as well but that way marketing can't claim 16-cores, like AMD has. ;)
Yes and it depends on the clock speeds, usually these Atom cores clock rather low between 2-3 Ghz. If they can crank it up to 4 Ghz or more this is certainly a very good multithread boost.
 

DrMrLordX

Lifer
Apr 27, 2000
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Are you sure 6+6 big+big is a faster solution than 8+8 big+litte? And are you sure 12 Golden Cove cores are doable on 10nm with proper clocks speeds while not using more than 125W?
Golden should be at least 30% faster IPC than Gracemont and hit higher clocks. There's really no way that taking away 4c Golden and replacing them with 8c Gracemont makes any sense on the desktop. No clue on power, but Intel needs something that can chip away at AMD's 16c desktop parts. Major advantage to 8c Gracemont is that the die should be small. Package size for Alder Lake may be an issue. LGA1700 is already going to have to be pretty big.
 

mikk

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Golden should be at least 30% faster IPC than Gracemont and hit higher clocks. There's really no way that taking away 4c Golden and replacing them with 8c Gracemont makes any sense on the desktop.
Even if you assume Golden Cove being 50% faster per core, Gracemont should be faster with twice the amount of cores.
 

ondma

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Mar 18, 2018
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Golden should be at least 30% faster IPC than Gracemont and hit higher clocks. There's really no way that taking away 4c Golden and replacing them with 8c Gracemont makes any sense on the desktop. No clue on power, but Intel needs something that can chip away at AMD's 16c desktop parts. Major advantage to 8c Gracemont is that the die should be small. Package size for Alder Lake may be an issue. LGA1700 is already going to have to be pretty big.
That was my thought as well. However if Gracemont has 70% of the IPC of GC, and if it can reach 60% of the clockspeed of GC 8 cores would be competitive with 4 GC cores. (rough estimate 8*.7*.6 = "equivalent" to 3.4 cores.) Just a back of the napkin type guess. Thinking about it this way, the bigger problem may be the proper integration of the big/little cores, and whether the software uses them all efficiently. Also depends on price of course.

Edit: 8+8 probably would run cooler than 12 big cores, possibly allowing the big cores to maintain higher turbo in heavy workloads. Also, Intel definitely needs to compete against 12 core zen on the desktop. 16 cores is still pretty niche though.
 
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lobz

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Feb 10, 2017
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Even if you assume Golden Cove being 50% faster per core, Gracemont should be faster with twice the amount of cores.
That was my thought as well. However if Gracemont has 70% of the IPC of GC, and if it can reach 60% of the clockspeed of GC 8 cores would be competitive with 4 GC cores. (rough estimate 8*.7*.6 = "equivalent" to 3.4 cores.) Just a back of the napkin type guess. Thinking about it this way, the bigger problem may be the proper integration of the big/little cores, and whether the software uses them all efficiently. Also depends on price of course.

Edit: 8+8 probably would run cooler than 12 big cores, possibly allowing the big cores to maintain higher turbo in heavy workloads. Also, Intel definitely needs to compete against 12 core zen on the desktop. 16 cores is still pretty niche though.
You both forget what a scheduling mess that could end up to be. These different cores can look as building blocks on slides, yes. They certainly don't look like building blocks to desktop operating systems though.
 

Ajay

Diamond Member
Jan 8, 2001
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You both forget what a scheduling mess that could end up to be. These different cores can look as building blocks on slides, yes. They certainly don't look like building blocks to desktop operating systems though.
IDK. Has MS Windows run on any Big.Little arm configs?
 

coercitiv

Diamond Member
Jan 24, 2014
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Are you sure 6+6 big+big is a faster solution than 8+8 big+litte? And are you sure 12 Golden Cove cores are doable on 10nm with proper clocks speeds while not using more than 125W?
Agree. With 8+8 big+litte you get 8 big cores on the same die and for anything gaming or interactive that should more than good enough. If you want to also do heavy multi-threading you get 8 more slower cores that use a lot less power. True, doesn't make sense for a gaming machine and 8+0 would fare just as well but that way marketing can't claim 16-cores, like AMD has. ;)
I posted this a while ago in this very thread, maybe it's time to look at the numbers again.

If we assume GC = 1.5x Skylake IPC and Gracemont = 1x Skylake IPC, SMT yields at 20%, let's compare throughput potential for 8+8 big.little, 10 big and 12 big:
Code:
8 big + 8 small (1x area)
8 x 1.5 x 1.2 = 14.4
8 x 1 = 8
Throughput @ 24T = 22.4
Throughput @ 16T = 20
Throughput @ 12T = 16

10 big (1x area)
10 x 1.5 x 1.2 = 18
Throughput @ 24T ~ 18
Throughput @ 16T = 16.8
Throughput @ 12T = 15.6

12 big (1.2X area)
12 x 1.5 x 1.2 = 21.6
Throughput @ 24T = 21.6
Throughput @ 16T = 19.2
Throughput @ 12T = 18
Based on the numbers above, these were my conclusions, with some highlights added this time:
  • 12T workloads would work just as well on 10 big as on 8+8
  • 8+8 will likely use only the big cores in gaming, pure 8 big core chips will be smaller and just as fast
  • 12 big can match 8+8 in throughput, incidentally this may look a lot like Alder Lake vs. Zen 4
On the topic of power savings and doing more within 125W:
  • Intel is currently pushing 150-200W through MCE enabled 14nm CPUs, why do we suddenly care about stringently adhering 125W TDP?
  • we currently don't know how small cores scale past 3Ghz, both in terms of fmax and power. If they can't efficiently clock past 4Ghz for example, that takes a lot of pressure off the pure big core chip.
 
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jpiniero

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Oct 1, 2010
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From the Leak comes the Tiger Lake SKU list.

U parts:
i7 1185G7
i7 1165G7
i5 1145G7
i5 1135G7
i3 1115G4
Pentium 7305
Celeron 6305
Celeron 6205

"U Parts" (renamed Y? Is the TDP on these higher?)

i7 1180G7
i7 1160G7
i5 1140G7
i5 1130G7
i3 1110G4
 
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eek2121

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Aug 2, 2005
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I posted this a while ago in this very thread, maybe it's time to look at the numbers again.

If we assume GC = 1.5x Skylake IPC and Gracemont = 1x Skylake IPC, SMT yields at 20%, let's compare throughput potential for 8+8 big.little, 10 big and 12 big:
Code:
8 big + 8 small (1x area)
8 x 1.5 x 1.2 = 14.4
8 x 1 = 8
Throughput @ 24T = 22.4
Throughput @ 16T = 20
Throughput @ 12T = 16

10 big (1x area)
10 x 1.5 x 1.2 = 18
Throughput @ 24T ~ 18
Throughput @ 16T = 16.8
Throughput @ 12T = 15.6

12 big (1.2X area)
12 x 1.5 x 1.2 = 21.6
Throughput @ 24T = 21.6
Throughput @ 16T = 19.2
Throughput @ 12T = 18
Based on the numbers above, these were my conclusions, with some highlights added this time:
  • 12T workloads would work just as well on 10 big as on 8+8
  • 8+8 will likely use only the big cores in gaming, pure 8 big core chips will be smaller and just as fast
  • 12 big can match 8+8 in throughput, incidentally this may look a lot like Alder Lake vs. Zen 4
On the topic of power savings and doing more within 125W:
  • Intel is currently pushing 150-200W through MCE enabled 14nm CPUs, why do we suddenly care about stringently adhering 125W TDP?
  • we currently don't know how small cores scale past 3Ghz, both in terms of fmax and power. If they can't efficiently clock past 4Ghz for example, that takes a lot of pressure off the pure big core chip.
Regarding TDP, we care because Intel is running in place while AMD is moving forward. The laws of physics dictate that IPC increases on 14nm will come at the cost of higher thermals as well as power consumption. Right now my PC with a Ryzen 3900X is sitting on my desk with a game open. Not a single fan in the system is running. I have a 280mm AIO, but the fans will only turn on at 50C. The CPU is averaging 44C and the GPU is in power saver mode (2D game). The PSU fan only turns on when the PSU gets warm, but it’s rated for 1200W. The fan never turns on.

I have been looking foreword to Intel’s 10nm for a long time. Unlike many people here and elsewhere, I believe that they have the capability to deliver intriguing new products, but they are currently being murdered from within. I have a wide variety of workloads so I have to buy the best CPU for those workloads. At the moment that CPU is an AMD one. The fact my machine is silent is just a bonus.
 
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