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Discussion Intel current and future Lakes & Rapids thread

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uzzi38 said:
Given the naming scheme (-PS) this is just gonna be a socketed version of MTL 6+8 I'd bet.
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It does seem like that is going to be true. Pretty much meshes with all the other rumors along the years. Not full desktop, but not laptop only either. Just put the laptop chip onto a socket for SFF desktops.
 
CPU-Z incorrectly reads L3 capacity, core and thread counts.

GraniteRapids(Intel 3)

Each compute tile has physically 42(40 active) RedwoodCove cores/84 threads with L2 84MB (2 MB per core) + L3 168 MB (4 MB per core). L2+L3 252MB.

GraniteRapids-SP with 2 active compute tiles (LGA4677)
Physically 84(80 active, L2 160MB + 330MB(?)) RedwoodCove cores/168 threads with L2 168MB + L3 336MB. L2+L3 504MB

GraniteRapids-AP with 3 active compute tiles (LGA7529)
Physically 126(120 active, L2 240MB + L3 480MB) RedwoodCove cores/252 threads with L2 252MB + L3 504MB. L2+L3 756MB.
 
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SiliconFly said:
Looks like a mindless joke from a silly website. Sheldon -> Cooper? Douglas -> Adams?
Click to expand...
It came from phoronix article that references some submissions to Linux. That said its possible someone did it as a placeholder joke.

Intel "Family 6" CPU Era Coming To An End Soon: Code Suggests Cooper Forest & Adams Lake - Phoronix

www.phoronix.com www.phoronix.com


Beyond the comments of this happening "soon-ish", in cleaning up the Intel CPU ID Linux code, there are some examples that cite new CPUs in other families may be Douglas Cove / Adams Lake and Intel Sheldonmont / Cooper Forest.

The Douglas Cove and Sheldonmont core names are new disclosures unless random placeholders as are Adams Lake and Cooper Forest though they jive with Intel naming conventions. After Arrow Lake and Lunar Lake is Panther Lake, so the possibility of Adams Lake would be at least 2026 if that's indeed a real codename and would be succeeding Panther Lake. Meanwhile after the Xeon E Sierra Forest is Clearwater Forest, so Cooper Forest could potentially be the successor to Clearwater Forest. Meanwhile, based on earlier Intel Linux kernel patches, it's already known Clearwater Forest will be Family 6 Model 221 and Lunar Lake will be Family 6 Model 189. So at least through those generations Family 6 is keeping up.
Click to expand...
 
DrMrLordX said:
Is it going to be another situation like Cascade Lake-AP?
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It should be much more common(though that's not saying much) as the -SP is using the same basic tile setup, just less of it compared to -AP. Whereas Cascadelake was a totally different thing and not even socketable.
 
DavidC1 said:
Whereas Cascadelake was a totally different thing and not even socketable.
Click to expand...
That's why I was asking. CascadeLake-AP was a messy solution. If Granite Rapids-AP is just -SP with one more tile then it shouldn't present the same problems. Kind of makes me wonder why they're even bothering with the -AP designation for that product instead of allowing -SP to scale up to 120c.
 
DrMrLordX said:
That's why I was asking. CascadeLake-AP was a messy solution. If Granite Rapids-AP is just -SP with one more tile then it shouldn't present the same problems. Kind of makes me wonder why they're even bothering with the -AP designation for that product instead of allowing -SP to scale up to 120c.
Click to expand...
They're not the same socket though. The -AP socket is much larger at 7K pins while -SP is similar at 4k pins. The whole package is much larger and the -AP goes up to 500W while -SP stops at 360W.
 
DrMrLordX said:
That's why I was asking. CascadeLake-AP was a messy solution. If Granite Rapids-AP is just -SP with one more tile then it shouldn't present the same problems. Kind of makes me wonder why they're even bothering with the -AP designation for that product instead of allowing -SP to scale up to 120c.
Click to expand...

DavidC1 said:
They're not the same socket though. The -AP socket is much larger at 7K pins while -SP is similar at 4k pins. The whole package is much larger and the -AP goes up to 500W while -SP stops at 360W.
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Additionally, the Birch Stream (BS) SP socket supports 8 memory channels, while the AP supports 12. Intel sees the need for two different sockets for market segmentation reasons. BS supports both Granite Rapids (GR) and Sierra Forest (SF).

Each of the GR compute chiplet has 4 memory channels. The GR-SP contains two such chiplets, while the AP has three. Each GR compute chiplet supports up to 40 P cores.

Each of the SF compute chiplet has 8 memory channels. The SF-SP will have up to 144 E cores max using one compute chiplet, while the AP version will have up to 288 using two of these. Four memory channels on SF-AP compute chiplets are unused.

GR-AP, GR-SP, and SF-SP shown below (from HotChips ‘23):

IMG_2404.jpeg
 
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ashFTW said:
Additionally, the Birch Stream (BS) SP socket supports 8 memory channels, while the AP supports 12. Intel sees the need for two different sockets for market segmentation reasons. BS supports both Granite Rapids (GR) and Sierra Forest (SF).
Click to expand...
Good point overall.

But I'd like to point out that because -SP already establishes the Tile setup, and -AP is merely an expansion of that, it's different from Cascade Lake - AP where it was a knee-jerk reaction to being severely behind the competition and ended up being a wholly different product altogether.

The AP version of Cascadelake also had more memory channels as well. 6 channels each for a total of 12. The TDP nearly doubled going from 205W on -SP to -400W on -AP, so it was just two cores on an MCM. On top of that it was BGA, so no upgradability. 400W, $10,000 chip, with no prospect of upgrading. It was an attractive product with MANY customers for sure!

If you need the extra cores, then the -AP will work better than -SP as the communication between cores happen through a much faster and lower latency EMIB interconnect versus UPI between two sockets.

This also reminds me of the Extreme Edition client chips which were Xeon MPs in the client socketed form factor and didn't last.
 
DavidC1 said:
If you need the extra cores, then the -AP will work better than -SP as the communication between cores happen through a much faster and lower latency EMIB interconnect versus UPI between two sockets.
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That was perhaps the worst part about Cascade Lake-AP. Though I did not notice that Granite Rapids-AP used a larger socket and different platform. Interesting.
 
This is actually quite impressive:

www.servethehome.com

We Found Something Testing the 5th Gen Intel Xeon Scalable 1P CPUs

We tested the new top-end single-socket 5th Gen Intel Xeon part and found surprisingly massive performance and power gains
www.servethehome.com www.servethehome.com

4th-Gen-and-5th-Gen-Intel-Xeon-Power-Comparison-copy-800x450.jpg
 
Trolling is not permitted. Please read and adhere to the forum rules.
tamz_msc said:
This is actually quite impressive:

www.servethehome.com

We Found Something Testing the 5th Gen Intel Xeon Scalable 1P CPUs

We tested the new top-end single-socket 5th Gen Intel Xeon part and found surprisingly massive performance and power gains
www.servethehome.com www.servethehome.com

4th-Gen-and-5th-Gen-Intel-Xeon-Power-Comparison-copy-800x450.jpg
Click to expand...

We must disclose that it is, therefore, being sponsored by Intel, but they did not see the article or video before publication.
Click to expand...

For the record, these are not the highest-performance parts you can put in single-socket servers. We know that Intel has faster SKUs. SPEC CPU2017 will show the AMD EPYC Bergamo parts with 128 cores being faster. The goal was really looking at a generational comparison.
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Sounds legit. AMD will provide you 128 cores with less TDP. Impressive? This is where Intel is failing the hardest.
 
Why does anything having to do with Intel get polluted by comparisons to AMD?

The post had nothing to do with AMD, just posting it because I thought that the fact that going from 4 tiles to 2 gives you improved power consumption, and higher perf/watt despite having more cores, more L3$ and lesser TDP on the same node is quite the feat.
 
This is an Intel specific thread, not a vs. thread. Consequently, trolling/flame bait towards Intel users with vs posts is not permitted.

Mod DAPUNISHER

EDIT: The forum rules sticky has been updated to remove any ambiguity concerning the policy. If you think there are other forum policies that require further clarification, PM a CPU forum mod and we will update the sticky as needed.
 
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SiliconFly said:
Even witeken tends to talk too much about GNR!

But honestly, GNR is based on RWC (not LNC). So, it's gonna inherit all the power hungry issues that SPR & EMR had. Intel's will have it's big break with Diamond Rapids (with LNC) and not before imho. I'm not a big fan of server parts and don't read too much into them, but from what I gather, GNR may just DOA (like SPR & EMR) cos in servers TDP matters a lot. Don't understand why some believe it's going to be a great product.
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Agreed. But how can Diamond Rapids be the "big breakthrough" then? It has the exact same problem that you pointed out for GNR. LNC cores are okay against Turin. But they will NOT be okay against Venice. So in my opinion Diamond Rapids is dead already if it has LNC cores.
 
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