GLOBALFOUNDRIES Introduces New 12nm FinFET Technology for High-Performance Applications

[Arachnotronic]

Well, wasn't there a slide saying 2H18 - so I guess that's it. It's ready when it's ready. Don't know why I was so inclined to be optimistic, guess I want things to go well for AMD.

Slide says risk production in 1H 2018; 2H 2018 is an extrapolation from that slide.

 

[Phynaz]

TSMC's definition of risk production is when a technology reaches a certain level of reliability and small quantity production begins. There is usually a pretty significant amount of time, anywhere from 6 months to more than a year, between when a company begins risk production and when you start seeing products rolling off the lines and sold to customers.

I would be willing to bet that we don't see 12LP products in the market until 2H 2018.

TSMC only runs SRAM for process certification to get to risk production (besides unit testing). Not something like all the logic and metal in a 200mm SOC.

"The SRAM vehicle is what we run through evaluation, high-temperature life testing, and the rest of the qualification tests," Sun said. "It certifies that the process is now reliable enough to try running full customer designs." But Sun emphasized that those first design runs—the risk production runs—are done with the full process, not with a subset of the full specs or with an extra-restrictive rule set.

Work will continue after the SRAM runs. Sun said that early customer designs usually have some features that lie outside the design rules, and hence require discussion and perhaps process tweaks. And once customer risk-production wafers are finished, they in their turn will go into the qualification process to be studied and measured. But the SRAM is the major signal that it’s time to start the move to tape-out for the first few designs, send them in, and see what happens.

I don't think AMD is in a position to "see what happens".

Edit: TSMC spent roughly 1.5 years in risk production at 28nm and 16nm. Let's not even talk about the disaster that was 20nm.

 

[Ajay]

Edit: TSMC spent roughly 1.5 years in risk production at 28nm and 16nm. Let's not even talk about the disaster that was 20nm.

How long was 12FFC in risk production? That's more equivalent to the change that GloFo is making.

 

[AtenRa]

Edit: TSMC spent roughly 1.5 years in risk production at 28nm and 16nm. Let's not even talk about the disaster that was 20nm.

28nm and 16nm were full nodes, 12nm LP is half node of 14nm much like TSMCs 12nm is half node over 16nm

 

[Ajay]

28nm and 16nm were full nodes, 12nm LP is half node of 14nm much like TSMCs 12nm is half node over 16nm

12LP is more like a quarter node!

 

[raghu78]

12LP is more like a quarter node!

The term half node is an industry nomenclature for nodes which are based on optimizations of mature full nodes like 16FF+ or 14LPP. There is no correlation between the node number and key metrics like CPP or MMP. 16FF+ and 12FF both have same Contacted poly pitch (CPP) and Minimum Metal Pitch (MMP) as does 14LPP and 12LP. The difference is availability of lower track library counts at 12FF vs 16FF+ and 12LP vs 14LPP which brings area reduction (due to the denser library).

 

[ao_ika_red]

IBM foundry acquisition brings a new breath of life in GloFo. They even manage to launch another 14 nm process.

https://www.anandtech.com/show/1186...and-soi-in-14hp-process-tech-for-ibm-z14-cpus

 

[Phynaz]

How long was 12FFC in risk production? That's more equivalent to the change that GloFo is making.

12FFC just entered risk production this summer. There has been one customer design that has validated the process. Ten customer tapeouts are expected by the end of the year. Realistically it will be at least a year before you see products in the marketplace.

 

[Ajay]

12FFC just entered risk production this summer. There has been one customer design that has validated the process. Ten customer tapeouts are expected by the end of the year. Realistically it will be at least a year before you see products in the marketplace.

Thanks. I thought the Nvidia process was basically 12FFC - apparently I have the wrong info.

 

[Phynaz]

Thanks. I thought the Nvidia process was basically 12FFC - apparently I have the wrong info.

Nvidia claims the 12nm process being used for Volta is exclusive to them. It could very well be a high performance "tweaked" version of 12FFC. Or it could be a prior version, TSMC could have been aiming for a power optimized process and ended up with something that was testing out to actually be higher performance than expected. TSMC could have said something like "Hey, Nvidia, check this out, could you use this?".

Or, it could be Volta is the test chip for 12FFC. That could explain the very low volume and data center (expensive) focus of V100. Nvidia can afford to be the lead customer on a new process node. AMD, not so much.

 

[krumme]

IBM foundry acquisition brings a new breath of life in GloFo. They even manage to launch another 14 nm process.

https://www.anandtech.com/show/1186...and-soi-in-14hp-process-tech-for-ibm-z14-cpus

That is a partnership from heaven.

Ibm absolutely needs to offload their fabbing due to extreme low volume. And they are a good deal apart for performance profile. Slim suit.

And for gf tapping into the gigantic basic research and competences of Ibm is just not only nessesary but a damn goldmine. Having acces to that kind of deep knowledge must be Godsent.

 

[raghu78]

Nvidia claims the 12nm process being used for Volta is exclusive to them. It could very well be a high performance "tweaked" version of 12FFC. Or it could be a prior version, TSMC could have been aiming for a power optimized process and ended up with something that was testing out to actually be higher performance than expected. TSMC could have said something like "Hey, Nvidia, check this out, could you use this?".

Or, it could be Volta is the test chip for 12FFC. That could explain the very low volume and data center (expensive) focus of V100. Nvidia can afford to be the lead customer on a new process node. AMD, not so much.

https://devblogs.nvidia.com/parallelforall/inside-volta/

The GV100 GPU includes 21.1 billion transistors with a die size of 815 mm2. It is fabricated on a new TSMC 12 nm FFN high performance manufacturing process customized for NVIDIA.

Nvidia is using a custom high performance node called 12FFN for Volta. AMD is the lead customer for GF 12LP and GF 7LP. AMD can definitely afford to be the lead customer. In fact the opinion among the industry insiders is that GF 7LP is basically designed for the very high performance needs of AMD's roadmap. AMD and GF need each other for succeeding in their respective businesses. AMD needs high performance nodes for their CPUs in a competitive timeframe against Intel so as to be able to develop and ship competitive products. GF needs the volumes which AMD brings at the leading edge. The more GF can help AMD win against Intel the better it is for their revenue and profits. Its a win-win business like TSMC-Apple and TSMC-Nvidia.

That is a partnership from heaven.

Ibm absolutely needs to offload their fabbing due to extreme low volume. And they are a good deal apart for performance profile. Slim suit.

And for gf tapping into the gigantic basic research and competences of Ibm is just not only nessesary but a damn goldmine. Having acces to that kind of deep knowledge must be Godsent.

I agree. IBM's significant R&D talent and expertise with RF and high performance is helping GF bring very impressive processes like 22FDX and GF 7LP to market in a competitive timeframe. This has happened at the right time when AMD has kick started their return to high performance computing with Zen. The next few years are going to be very interesting as AMD and GF fight it out with Intel. For the first time since the original Athlon K7 AMD will have a very competitive process in GF 7LP to compete against Intel 10nm products like Icelake. We might be at the start of a golden era for the PC and server industry.

 

[ao_ika_red]

That is a partnership from heaven.

Heaven indeed. Having an access to such a broad IPs and experienced employees and also being paid to do so really tell what heaven is.

 

[NostaSeronx]

Yes, I'm sure you know better than the hundreds engineers with decades of experience at AMD, Qualcomm, NVidia, Apple and Mediatek.

You can definitely count on me being better than most if not all engineers at those companies.

 

[tamz_msc]

This 12nm being risk production for Q1 2018 was an error in the slides, it's volume production for Q1. Risk production in H1 2018 is for 7nm.
https://www.forum-3dcenter.org/vbulletin/showpost.php?p=11497342&postcount=185

No, the normal production for 12nm LP (as 14nm LPP + spare) starts in the Q1 2018 and the risk production starts for 7nm in the H1 2018. As I said, I think Pinnacle Ridge comes with 12nm LP in the Q1 2018 (I'm waiting).

 

[ao_ika_red]

This 12nm being risk production for Q1 2018 was an error in the slides, it's volume production for Q1. Risk production in H1 2018 is for 7nm.
https://www.forum-3dcenter.org/vbulletin/showpost.php?p=11497342&postcount=185

That should be more like it. I just can't imagine Ryzen 2xxx at the end of 2018. It will be too close with 7nm Ryzen.

 

[Lodix]

This 12nm being risk production for Q1 2018 was an error in the slides, it's volume production for Q1. Risk production in H1 2018 is for 7nm.
https://www.forum-3dcenter.org/vbulletin/showpost.php?p=11497342&postcount=185

Yeah they specified risk production for 7nm and just production for 12nm. To me it didn't make sense to start risk production of 12nm in 2018 at the same time as 7nm. Thanks for the slide, do you know where can I check all the slides or a video of the conference?

 

[rainy]

This 12nm being risk production for Q1 2018 was an error in the slides, it's volume production for Q1. Risk production in H1 2018 is for 7nm.

This is what I personally expected: March/April 2018 Zen+ and about 12 months later second generation of Zen in 7nm.

Btw, it's hillarious to observe that two members of IDF started beating drums that we will not see refreshed Zen earlier than second half of next year.

 

[DrMrLordX]

You can definitely count on me being better than most if not all engineers at those companies.

Arrogant.

 

[tamz_msc]

Yeah they specified risk production for 7nm and just production for 12nm. To me it didn't make sense to start risk production of 12nm in 2018 at the same time as 7nm. Thanks for the slide, do you know where can I check all the slides or a video of the conference?

It seems they're scattered all over various forums, don't know whether they were made available to any press, or if it's under NDA etc.

 

[Lodix]

It seems they're scattered all over various forums, don't know whether they were made available to any press, or if it's under NDA etc.

Normally foundries doesn't allow to take pics in their conferences which is a shame

 

[raghu78]

Yeah they specified risk production for 7nm and just production for 12nm. To me it didn't make sense to start risk production of 12nm in 2018 at the same time as 7nm. Thanks for the slide, do you know where can I check all the slides or a video of the conference?

https://mobile.twitter.com/TekStrategist/status/910543461027213313/photo/1

GF 12LP will start risk production in Q1 2018 but you can expect a quick ramp to volume production as its based on the mature 14LPP node. So Zen on 12LP could arrive by Q3 2018. 7LP is expected to start risk production in Q2 2018. Since its a brand new process volume production will start after a year in Q2 2019 and we can expect Zen 2 on 7LP to arrive by Q3 2019.

Sent from my SM-G935V using Tapatalk

 

[rainy]

GF 12LP will start risk production in Q1 2018 but you can expect a quick ramp to volume production as its based on the mature 14LPP node. So Zen on 12LP could arrive by Q3 2018.

As it was already mentioned above Q1 2018 is a volume not risk production for 12nm, which means that Zen+ should arrived on spring next year.

 

[Arachnotronic]

As it was already mentioned above Q1 2018 is a volume not risk production for 12nm, which means that Zen+ should arrived on spring next year.

No, it's not. I included a slide in this thread straight from AMD/GloFo that shows that 12nm risk production is targeted for "1H 2018."

That other slide shown (which seems like a summary slide) just says "production start," but that is technically true if it's "risk production."

 

[CatMerc]

Here's a thought.

The top overclocks on Zeppelin reach 4.2GHz (Threadripper reserved dies). Assuming that 10% boost increases Fmax and not just F at ISO power, that would mean the top dies would do 4.6GHz. Now we can't know what variation would look like on 12nm, but it is POSSIBLE those top dies would become more common, allowing them to be put into a Ryzen SKU like 2800X.

So on a best case scenario making plenty of assumptions, we're talking 4.6GHz XFR for a 2800X type SKU.

Main problematic assumptions with what I said:
- Fmax increases by 10%, and not just F at ISO power
- 12nm variation smaller than 14nm, and the curve trends towards the higher end rather than lower end
+ AMD made no tweaks over Zeppelin to lift frequency ever so slightly