Sorry guys to bring that here but didnt want to start a new BD thread.
I was thinking about BDs die size and that 320mm wasn't looking ok for me.
AMD wanted to minimize die size with the CMT design and if BD is 320mm then it is bigger than Quad Core Phenom I (450M transistors @ 285mm, 65nm process) and from Quad Core Phenom II (758M transistors @ 258mm, 45nm process).
With 32nm process they would be able to double the transistor count of 45nm and maintain the same Die size, so if BD is at 1.5B transistors then it should be at 250-260mm and because of the CMT design even smaller 240mm ??
If the 320mm is correct, then how the CMT design helped in the Die Size ?? unless BD has more than 1.5B transistors i dont believe that the Die size will be bigger than Quad Core Phenom II.
Could it be that 320mm is in fact 220-230mm ??
Remember, transistors have two dimensions that are critical in arriving at total drive current - which is critical in determining clockspeed.
GloFo went gate-first integration, an integration process that inherently results in lower I-drives (voltage and width normalized) than a gate-last integration.
AMD has two design choices if they want higher clocks, make the transistors wider in the layout or increase the operating voltage (or a combo of both).
This is why the xtor layout on llano can be so dense for the slower clocked GPU part versus the less dense areas of the higher clocked logic cores. (this is also why the slower L3$ is also a more dense sram cell)
Bulldozer needs to clock even higher than Llano, the xtor density must be reduced to accommodate the necessity of wider transistors.
The trade-offs are made knowingly, which is to say GloFo knew what the upsides and downsides were ahead of committing themselves to them, as were their customers.
Bulldozer being a bigger die than one might expect is actually to be expected once you account for the integration choices and microarchitecture design targets.
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