Both the ICs and SI are silicon, meaning similar coefficients of thermal expansion.Oke, but how is it with the total cost and reliability. I have been reading that silicon interposers are fragile for temperature changes and effects like warping must be fully controlled or the microbumps between the asics and interposer or substrate and interposer might come loose. Underfill seems to alleviate that but mounting for example a heatsink is a difficult task. And everything that needs to be done precise and with strict tolerance becomes more expensive.
I understand a silicon interposer itself is cheap, but the whole production process towards the end product may be more expensive. At least that is my understanding of it.
As a sidenote the silicon die bridges in EMIB may not be so bad when thinking of pass through when a designer uses standardized modular technology to connect it all together.
And that is what AMD has done with IF. And when looking at the picture , one only sees 2 chips, but i wonder if there is no limitation to connect 4 dies at once with one square silicon bridge.
Then it may not be that bad as you might think. I do have to note, i do not know the maximum size a silicon bridge in EMIB technology can be.
EDIT
The silicon bridge die could perhaps also be a hexagon or octagon if the cpu dies are small and rectangular enough. That would allow for 6 or 8 chips to connect to one silicon bridge die. All at once.
Would be like spokes on a wheel. How many cores does one want ?
Once you go beyond a certain # of interconnects you will have the need for microbumps. HBM2 stack =1024 bit at present. EMIB or full SI will not matter. Alignment will be to same tolerances.
IF won't allow changes to signal pathways without new masks. IF is scalable but not after fact.
Although there are ways to slice non-square die from a wafer, I doubt this will happen for most cases, reason is costs.
Remember, almost anything can be built, but does it make any sense.
I have never found the costs savings in absolute terms to be that critical to justify the reduced flexibility of EMIB designs. Percentage wise you might get reasonable savings, but if its only a couple $ on a $75-100 design, then not worth it IMO considering the negatives.
AMD's priority is to get interposer assembly volumes fully worked-up by making the tech cheaper thus allowing lower-end higher volume designs. HBM2 has to be more widely used for this to happen. Chicken & egg.