CPU Moderator, VC&G Moderator, Elite Member
- May 16, 2002
I'm not sure I understand this sentence.This is dead. Probably why recent Macbooks are so subpar. Make the previous generation subpar, and the next generation looks even better.
Yeah, I've found it here:Multi-threaded Turbo is 1.8GHz for the L16G7.
I normally wouldn't answer this but you are being polite.Any link to prove those 18W PL2? thanks in advance.
They waited this long to use Icelake when they could have used it few months earlier. And I'm aware Apple tends to be late. They are extra late.I'm not sure I understand this sentence.
Recent MacBooks Air (those with Ice Lake U) are probably the best ones ever. Very good stuff.
I hope all 5 cores can work together. Otherwise it'll look pretty bad in MT benchmarks.Those 4 Tremont cores only need around 2W, so everything else goes to the big core.
I guess Intel implemented some balancing, i.e. small cores will be held back during Sunny Cove boosts.
I'm a computer enthusiast, i like new stuff, specially things that take the industry forward.So you felt the urge to jump on an Intel product in yet another thread...
And all the celeron and pentiums. Why limit this in 2020? How can software evolve?Like on all Atom-based CPUs.
Yes and we will be, specially once the products can be tested and compared to existing ones.No. But we've been over this.
This is to maintain the same ISA between both cores. Generation that uses Gracemont should enable AVX.I'm a computer enthusiast, i like new stuff, specially things that take the
And all the celeron and pentiums. Why limit this in 2020? How can software evolve?
It may be able to. They are saying enabling Sunny Cove results in 33% increase in WebXPRT 3 performance. That benchmark is somewhat multi-threaded(I'm trying to find out to what degree).Together I have a doubt, at least on Windows. It's probally more like a process can be one or the other but not both.
Both yes. If you start a benchmark (like say 7zip benchmark), it allocates 8 threads - one on each core. CPU load rises immediatly too 100% on each core. The 8 cores are also exposed to Linux (WSL) - so when i run Blender under WSL/Ubuntu it will distribute the load to all 8 cores.And you are sure it works in 100% of the working applications and(the most important part) benefit from it?
Like can we see Cinebench scores improve? x264?
But does it perform like one? That's the real important question. I know in Geekbench the small cores add ~15%, similar to HT in Intel chips.Both yes. If you start a benchmark (like say 7zip benchmark), it allocates 8 threads - one on each core. CPU load rises immediatly too 100% on each core.
Of course a small core is performing like a small core - so it is slower than the bigger cores. So by going from 4 to 8 cores you will not see double performance when we are assuming a big.LITTLE archtecture.But does it perform like one? That's the real important question. I know in Geekbench the small cores add ~15%, similar to HT in Intel chips.
Seriously, how long will we see this argument...To be honest, the only thing that doesn't sound completely underwhelming to me here is the package size. An 865 might lose a bit in ST but will spank this in MT while consuming less power.
Yeah, the choice of 7W Zen mobile APUs that idle on a fraction of a Watt is just enormous. Especially those fitting in a similar form factor.On the other end of the spectrum, Renoir spanks across all performance metrics and might even have better perf/watt.
But you don't like this product...I'm a computer enthusiast, i like new stuff, specially things that take the industry forward.
Intel decided to differentiate their product lineup that way. Nothing wrong with that.And all the celeron and pentiums. Why limit this in 2020?
Not sure what you mean by "evolve"...How can software evolve?
AVX is an extension to x86 ISA. It doesn't have to be supported by the CPU and software should not require it.It's not even a single vs multi thread performance or ipc comparisons, it's the missing key features.
How can apps take fully advantage of avx if some x86 parts miss it?
And they will all work in Lakefield. Intel stated during development that all big and small cores will be available at the same time (this is called heterogeneous multi-processing / HMP).Why not? On SQ1/8CX CPUs all 8 cores work together as well on Windows, at max frequency by the way...
I know they can get in the ballpark. They have with the Tablet Atoms. I have an 8-inch Venue 8 Pro with Bay Trail Atom. 15WHr and you get 6-8 hours of battery life.Seriously, how long will we see this argument...
It's x86, not ARM. That's the advantage. ARM will be more efficient.
x86 almost certainly isn't an advantage when power efficiency takes precedence over full Windows program compatability. Luckily Samsung has done us a favor by putting both Lakefield and Qualcomm 8cx in the exact same form factor, so it won't be long before we get a good sense of the former's performance against (somewhat outdated) ARM.Seriously, how long will we see this argument...
It's x86, not ARM. That's the advantage. ARM will be more efficient.
The scheduler will start assigning the larger task to the bigger core even if the initial assignment is not optimal, because it would observe, that the small core is at 100% load while the big core is not with this assignment.Let's say you have a program that runs 2 threads on 2 identical "big" cores:
- A - big job - takes 1s
- B - small job - takes a lot less, like 0.1s
After each round they have to "talk" and then another rounds starts.
In this case cores can be assigned randomly - it doesn't matter.
Now you replace one "big" core with 4 "small" ones. Let's say the total throughput is the same, i.e. one "small" core is 4 times slower.
What we're after is optimal assigning:
- A -> big
- B -> small
because then the whole round still takes 1s.
If task A goes to a small core, performance drops 4 times.
Which means that assigning randomly on a 1+4 architecture, it'll be optimal in just 20% rounds.
So, on average, each round will take 3.4s. And we just lost 2/3 of performance.
Refer back to my comment above. That wouldn't be true if it was due to the process.You talk about times, when Intel had a big process advantage (e.g. FinFet vs Planar). That time is over - today we are talking more or less iso-process.
No. After each "round" the CPU is empty - nothing is running. That's why I used that example specifically.The scheduler will start assigning the larger task to the bigger core even if the initial assignment is not optimal, because it would observe, that the small core is at 100% load while the big core is not with this assignment.
But it doesn't have to take precedence. That's the point.x86 almost certainly isn't an advantage when power efficiency takes precedence over full Windows program compatability.
The lack of HT further complicates a 2xSNC vs 1xSNC + 4xTNT comparison. Original performance charts claimed 1 SNC core offered ~50% throughput at ~60% power versus 4 TNT cores, but these numbers were tailored for Lakefield, so in hindsight they might have lacked SMT for the SNC core.Also no HT on the big core.