Discussion Apple Silicon SoC thread

[Eug]

M1
5 nm
Unified memory architecture - LP-DDR4
16 billion transistors

8-core CPU

4 high-performance cores
192 KB instruction cache
128 KB data cache
Shared 12 MB L2 cache

4 high-efficiency cores
128 KB instruction cache
64 KB data cache
Shared 4 MB L2 cache
(Apple claims the 4 high-effiency cores alone perform like a dual-core Intel MacBook Air)

8-core iGPU (but there is a 7-core variant, likely with one inactive core)
128 execution units
Up to 24576 concurrent threads
2.6 Teraflops
82 Gigatexels/s
41 gigapixels/s

16-core neural engine
Secure Enclave
USB 4

Products:
$999 ($899 edu) 13" MacBook Air (fanless) - 18 hour video playback battery life
$699 Mac mini (with fan)
$1299 ($1199 edu) 13" MacBook Pro (with fan) - 20 hour video playback battery life

Memory options 8 GB and 16 GB. No 32 GB option (unless you go Intel).

It should be noted that the M1 chip in these three Macs is the same (aside from GPU core number). Basically, Apple is taking the same approach which these chips as they do the iPhones and iPads. Just one SKU (excluding the X variants), which is the same across all iDevices (aside from maybe slight clock speed differences occasionally).

EDIT:



M1 Pro 8-core CPU (6+2), 14-core GPU
M1 Pro 10-core CPU (8+2), 14-core GPU
M1 Pro 10-core CPU (8+2), 16-core GPU
M1 Max 10-core CPU (8+2), 24-core GPU
M1 Max 10-core CPU (8+2), 32-core GPU

M1 Pro and M1 Max discussion here:

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M1 Ultra discussion here:

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M2 discussion here:

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Second Generation 5 nm
Unified memory architecture - LPDDR5, up to 24 GB and 100 GB/s
20 billion transistors

8-core CPU

4 high-performance cores
192 KB instruction cache
128 KB data cache
Shared 16 MB L2 cache

4 high-efficiency cores
128 KB instruction cache
64 KB data cache
Shared 4 MB L2 cache

10-core iGPU (but there is an 8-core variant)
3.6 Teraflops

16-core neural engine
Secure Enclave
USB 4

Hardware acceleration for 8K h.264, h.264, ProRes

M3 Family discussion here:

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M4 Family discussion here:

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M5 Family discussion here:

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[jpiniero]

Apple's not going to add any kind of desktop mode to iOS as long as the Google Search money is more than like a F50 company.

 

[jdubs03]

The "its for the Studio" would make sense, especially if Gurman was right that the Macbook Pro comes in March.

Or maybe the M5 Max Macbook Pro comes out now and the M5 Pro follows a month later. If Apple is capacity constrained like Cook said, it makes sense to release the higher profit Max SKUs first, and lag the Pro.

Though if the new chiplet/packaging stuff gives you more configuration freedom, maybe there is no "Pro" any longer (the "Macbook Pro with M5 Pro" was always an unwieldy name anyway) If you go for the lowest end/default setup maybe that's comparable to what was a Pro but if you beef it up much it is more like Max or maybe even beyond it (i.e. if you wanted to take the minimum/default GPU core count and max out your CPU core count it may be close to Ultra in CPU capability)

We'll have to see how much choice there is for Macbook Pro configuration. I think it might have just two levels each for CPU and GPU but who knows.

As long as they offer at least the same amount of options in CPU and GPU cores as before, fine by me. Across all SKUs.

 

[name99]

If you have the option of making one giant die at 85% yield, or 2 smaller dies at 90-95% yield, at a lower cost per die or combined, why would you not.

Because
1. advanced packaging is not free.
2. advanced packaging has its own yield losses
3. energy concerns. Crossing a die boundary is always more expensive than staying within a single die
4. as a general point, yield in the old-fashioned sense is vastly less important than claimed. Almost any modern design is designed for yield (eg redundancy in SRAMs, and multiple cores that can operate independently even if one of them is forced inactive.
Far more important to modern designs is parametric yield (ie does the design function at the targeted speed). But parametric yield doesn't magically go up just by splitting a mid-sized chip into two smaller chips.

Obviously there are optionality wins to using multiple dies.
But optionality wins are different from the claims in the article.

 

[Doug S]

Because
1. advanced packaging is not free.
2. advanced packaging has its own yield losses
3. energy concerns. Crossing a die boundary is always more expensive than staying within a single die
4. as a general point, yield in the old-fashioned sense is vastly less important than claimed. Almost any modern design is designed for yield (eg redundancy in SRAMs, and multiple cores that can operate independently even if one of them is forced inactive.
Far more important to modern designs is parametric yield (ie does the design function at the targeted speed). But parametric yield doesn't magically go up just by splitting a mid-sized chip into two smaller chips.

Obviously there are optionality wins to using multiple dies.
But optionality wins are different from the claims in the article.

Apple was ALREADY using advanced packaging even with monolithic dies for the LPDDR integration, and SoIC being used for M5 P/M/U is supposedly both cheaper and better for package yield than CoWoS they've used on previous Apple Silicon generations.

 

[fkoehler]

I know this is the Apple thread, but you're on AT still.
AMD has proven tile and related packaging is more economical in Server/Desktop, which is why Intel finally threw in the towel as they were getting destroyed with monolithic.

This has been discussed for 7-8+ years now.

Aside the fact tiling allows for greater yield, I wonder if they're actually able to increase that further by not running as much redundancy as monolithic requires, yielding more good dies, and bad ones are just binned.

 

[UNCjigga]

Just picked up a new M4 MacBook Air 15" at work to replace my aging Intel MacBook Pro. Wowza--this thing is just so damn efficient and the battery lasts foreverrrr.