AMD Ryzen (Summit Ridge) Benchmarks Thread (use new thread)

[sirmo]

They did say suicide runs @ 4.3 don't get too carried away. Does bode well for a ~4Ghz stable OC though. and lines up pretty well with the idea of a mid to high 3Ghz Turbo

He said 4.3 was max stable clock with a bit higher on suicide runs.. I swear it's just on the previous page: https://forums.anandtech.com/thread...zen-benchmarks.2482739/page-101#post-38623740

edit: well 2 pages ago since my post is on a page break.

 

[bjt2]

I'm under the impression fo4 isn't as useful a metric these days. Just using the estimated process time per fo4(<10ps) you get an fo4 delay of 40+ for modern Intel architectures, whereas 20~25 seems like a more reasonable estimate. I think this is due to the increasing (about half now?) contributions of wire RC delay to the total clock interval.



What is your basis for Zen having similar fo4 to Exv? As many people have pointed out, you are neglecting target IPC. Just based on the number of execution units, we might say Zen's integer core has a "width" of 6 vs. 4 for Exv; we might expect delay, as a crude approximation, to vary as the base 2 logarithm of width. Given the same number of pipe stages, this would mean an fo4 at least ~30% higher than Exv. Total delay might be worse, as wire delay is likely more linear than logarithmic. Simplified integer schedulers aren't going to vanquish such a difference.

First, official AMD statement is that int pipeline depth is 19 stages, versus 15-20 of XV, so we are in the same ballpark.
Second, issue width for in is 6 vs 4, but on XV is one four way scheduler, while on Zen they are 6 one way schedulers... A one way scheduler is way ( ) simpler than a 4 way scheduler and have way lower FO4...

 

[bjt2]

They did say suicide runs @ 4.3 don't get too carried away. Does bode well for a ~4Ghz stable OC though. and lines up pretty well with the idea of a mid to high 3Ghz Turbo

He said that was not a suicide run... Short term memory problem? Maybe is an INTEL chip?

 

[KTE]

First, official AMD statement is that int pipeline depth is 19 stages, versus 15-20 of XV, so we are in the same ballpark.
Second, issue width for in is 6 vs 4, but on XV is one four way scheduler, while on Zen they are 6 one way schedulers... A one way scheduler is way ( ) simpler than a 4 way scheduler and have way lower FO4...

Sorry to ask again but where's the int stages statement btw?

Not that it means anything except aimed clockspeeds.

1w vs 4w int sched means way lower FO4... Evidence?

Who is telling you all this, seriosly.

Sent from HTC 10
(Opinions are own)

 

[bjt2]

Sorry to ask again but where's the int stages statement btw?

Not that it means anything except aimed clockspeeds.

1w vs 4w int sched means way lower FO4... Evidence?

Who is telling you all this, seriosly.

Sent from HTC 10
(Opinions are own)

Have you read Hot chips slides? It's all there... maybe not the 19 stages statement, but this was said some days after...

Seriously, have you any idea of what a 4 way scheduler must do? Pick up up to four instructions from a bunch in the unified queue, controlling if the registers and the requested units are ready, taking also care of unit capabilities and conflicts... Many, many combinations. Means many transistors and deep logic...
An one way scheduler must only pick one ready instruction from one queue... Way simpler... Less combinations and less logic...

 

[cytg111]

Hell yeaa. If true 4.3 oc is possible this early we are back in business big time. The best thing that have happened for enthusiast since sb.

*high five* .. now lets see how that IPC stacks up in the real world, could still fall flat on its face..

 

[Arachnotronic]

It might have been disappointing for someone already in possesion of Haswell-E, but for the rest of us, its just fine. My 6850k at 4,2GHz is pretty much equal to 5930k at 4,5~4,6GHz, i would not call that negligible IPC gain. Not to mention SKL-X is not going to be magically 50 percent faster than BW-E.

I think SKL-X will deliver a bigger IPC gain than Broadwell did gen-on-gen (Skylake core + beefed up L2$, the latter should be helpful for games) and I think it will, thanks to 14nm+, return to Haswell-E frequencies at a minimum.

 

[frozentundra123456]

*high five* .. now lets see how that IPC stacks up in the real world, could still fall flat on its face..

Yea, and lets see real world clockspeeds too.

 

[Timmah!]

I think SKL-X will deliver a bigger IPC gain than Broadwell did gen-on-gen (Skylake core + beefed up L2$, the latter should be helpful for games) and I think it will, thanks to 14nm+, return to Haswell-E frequencies at a minimum.

Agreed about frequency thing, i expect the same. IPC difference however, based on current Skylake, is lesser between Skylake and BW-E, than it is between BW-E and HW-E. Taking all that into account, even if SKL-X is somewhat faster compared to BW-E, than BW-E is compared to HW-E, i fail to see how you can look forward to it, if you consider BW-E disappointing, as it just will be more of the same, unless Zen turns out superb and somehow forces the prices to go down.

 

[cytg111]

nvm

 

[frozentundra123456]

Agreed about frequency thing, i expect the same. IPC difference however, based on current Skylake, is lesser between Skylake and BW-E, than it is between BW-E and HW-E. Taking all that into account, even if SKL-X is somewhat faster compared to BW-E, than BW-E is compared to HW-E, i fail to see how you can look forward to it, if you consider BW-E disappointing, as it just will be more of the same, unless Zen turns out superb and somehow forces the prices to go down.

Your post does not add up at all. Broadwell E brought about a 5% max IPC gain vs Haswell and a lower overclock, resulting in basically a no gain or perhaps a slight regression in final performance. HEDT Skylake, compared to Broadwell E should bring 5 to 10 percent additional IPC (at least as much as HW to BW and possibly a bit more) *as well as* bringing back overclocks to at least Haswell levels , and possibly a bit faster. So instead of a small ipc gain being negated by a lower overclock (BW-E) you will have still a relatively small IPC gain with additional gains most likely from bringing back better overclocking. One could consider that "disappointing" I suppose compared to what we used to see with new architectures, but it is hardly analogous to the "disappointment" that BW-E brought.

 

[jpiniero]

Agreed about frequency thing, i expect the same. IPC difference however, based on current Skylake, is lesser between Skylake and BW-E, than it is between BW-E and HW-E.

You have to remember that Skylake-X/EP isn't completely based upon the same Skylake core that the mainstream line ended up getting, so the difference should be bigger than Broadwell-Skylake. That being said, we don't really know what Intel prioritized with Skylake Server. Obviously anything that uses AVX-512 would be a lot faster.

Skylake Server is a big problem for AMD's Zen Server hopes, but we just don't know how much just yet.

 

[Timmah!]

Your post does not add up at all. Broadwell E brought about a 5% max IPC gain vs Haswell and a lower overclock, resulting in basically a no gain or perhaps a slight regression in final performance. HEDT Skylake, compared to Broadwell E should bring 5 to 10 percent additional IPC (at least as much as HW to BW and possibly a bit more) *as well as* bringing back overclocks to at least Haswell levels , and possibly a bit faster. So instead of a small ipc gain being negated by a lower overclock (BW-E) you will have still a relatively small IPC gain with additional gains most likely from bringing back better overclocking. One could consider that "disappointing" I suppose compared to what we used to see with new architectures, but it is hardly analogous to the "disappointment" that BW-E brought.

This is from Anandtech article on Skylake IPC>

Sandy Bridge to Ivy Bridge: Average ~5.8% Up
Ivy Bridge to Haswell: Average ~11.2% Up
Haswell to Broadwell: Average ~3.3% Up
Broadwell to Skylake (DDR3): Average ~2.4% Up
Broadwell to Skylake (DDR4): Average ~2.7% Up

Oh dear. Typically with an architecture update we see a bigger increase in performance than 2.7% IPC. Looking at matters purely from this perspective, Skylake does not come out well. These results suggest that Skylake is merely another minor upgrade in the performance metrics, and that a clock for clock result compared to Broadwell is not favorable. However, consider that very few people actually invested in Broadwell. If anything, Haswell was the last major mainstream processor generation that people actually purchased, which means that:

Haswell to Skylake (DDR3): Average ~5.7% Up.

http://www.anandtech.com/show/9483/intel-skylake-review-6700k-6600k-ddr4-ddr3-ipc-6th-generation/9

Bottom line, i believe my post adds up. The IPC differences are miniscule and based on Skylake i have no reason to believe its going to be different with SKL-X....the average top clocks difference between SKL and BW-E is what, 200 MHz? I doubt this will change either... admittedly even slight improvement is better than no improvement at all, but really...you wont be able to tell the difference, so its all the same.

 

[mikk]

Broadwell comparison is meaningless in context to Server, because it's edram vs non edram. The question is also how big is the bottleneck from a dualchannel memory system for the CPU. Skylake is often bottlenecked from 2xDDR4-2133. SKL-E comes with quad or hexa channel memory support.

 

[itsmydamnation]

I think people are putting a lot of hope in the new cache system for sky-X. The new cache system is for allowing to scale core count, In low core count systems ( 8-10 is still lowish) the intel L3 ring bus design is still very very fast and high bandwidth.

 

[sirmo]

snip

Thanks, I was questioning my sanity there for a bit. Intel hasn't had a double digit IPC gain since Haswell.

 

[krumme]

This is from Anandtech article on Skylake IPC>

Sandy Bridge to Ivy Bridge: Average ~5.8% Up
Ivy Bridge to Haswell: Average ~11.2% Up
Haswell to Broadwell: Average ~3.3% Up
Broadwell to Skylake (DDR3): Average ~2.4% Up
Broadwell to Skylake (DDR4): Average ~2.7% Up

Oh dear. Typically with an architecture update we see a bigger increase in performance than 2.7% IPC. Looking at matters purely from this perspective, Skylake does not come out well. These results suggest that Skylake is merely another minor upgrade in the performance metrics, and that a clock for clock result compared to Broadwell is not favorable. However, consider that very few people actually invested in Broadwell. If anything, Haswell was the last major mainstream processor generation that people actually purchased, which means that:

Haswell to Skylake (DDR3): Average ~5.7% Up.

http://www.anandtech.com/show/9483/intel-skylake-review-6700k-6600k-ddr4-ddr3-ipc-6th-generation/9

Bottom line, i believe my post adds up. The IPC differences are miniscule and based on Skylake i have no reason to believe its going to be different with SKL-X....the average top clocks difference between SKL and BW-E is what, 200 MHz? I doubt this will change either... admittedly even slight improvement is better than no improvement at all, but really...you wont be able to tell the difference, so its all the same.

People eyes hurt when they read AT ipc test because it doesnt fit the dominating discourse. But it should be mandatory reading even if its kind of sad.

The reality is IPC have hit the wall with haswell and i am pretty sure nearly all design choices now centers around better efficiency.

Edit: and if someone wonders what the 6% ipc uplift from hsw to skl did for discrete card gaming AT also did test that:
http://www.anandtech.com/show/9483/intel-skylake-review-6700k-6600k-ddr4-ddr3-ipc-6th-generation/10
"There is no easy way to write this...decreases"

 

[Dresdenboy]

Current Max stable clocks(suicide runs can be a teeny bit higher) for A0 ES Zen chips is around 4.3Ghz on ambient cooling. Take that as you will.

Nice. I wonder, how later steppings would do, since they are running already, like "1D3201A2M88F3_35/32_N" (A0 usually had "E4" as Naples or Summit Ridge 8C/4C ES). (See here)

 

[dark zero]

I am very confident.

Sent from my Nexus 5X using Tapatalk

So, the max clock speed is on Phenom II levels?
I can live with that.

 

[Arachnotronic]

Broadwell comparison is meaningless in context to Server, because it's edram vs non edram. The question is also how big is the bottleneck from a dualchannel memory system for the CPU. Skylake is often bottlenecked from 2xDDR4-2133. SKL-E comes with quad or hexa channel memory support.

Skylake is *definitely* bottlenecked by DDR4-2133. I think it was RS who posted some review showing huge gains in moving even to DDR4-4000(!).

 

[StinkyPinky]

So this CPU is out in a couple of days? That's sooner than I expected. I hope beyond all hope that it is competitive because we need competition. Exciting!

 

[Exist50]

So this CPU is out in a couple of days? That's sooner than I expected. I hope beyond all hope that it is competitive because we need competition. Exciting!

There's a big event on Tuesday, but it is not expected to be an actual release. We might get a release date, however.

 

[Doom2pro]

So this CPU is out in a couple of days? That's sooner than I expected. I hope beyond all hope that it is competitive because we need competition. Exciting!

The event on the 13th is mainly a "Public display of putting Zen through it's paces" supposedly giving the public access to it in some form or another. I suspect the real reason for the event is to reveal the SKUs and to wet the appetite of those looking to acquire some Intel hardware during the holidays and to convince them to wait just a bit longer and go AMD instead.

 

[StinkyPinky]

Ah ok. A pity but not surprising.

 

[dark zero]

If 4.3Ghz is true for a stable OC, than that would be better than I'd hoped. For an 8c fabbed at GloFo that's mighty impressive.

That is definately not GloFo. It has Samsung imprinted everywhere.