AMD Ryzen (Summit Ridge) Benchmarks Thread (use new thread)

[KTE]

At this point, sources outside AMD typically only have a handful if not just single chip to test, so there's no way for them to know. AMD might have hand-picked the highest-clocking ones (for example, if they expect actual production chips to have higher clocks on average, and so want MB makers to test those), or they might have just sent the next 4 off the end of the line.

4.3GHz A0 OC would be very good for this uarch, 8 core, much higher IPC, new process, on the first iteration.

Still FAR lower than some crazy 4/4.5GHz 95W hype (bjt).

But I highly doubt AMD will seed cherry samples after all the slack they got for it the last few times.

Now, let's see 4.3GHz, at what power...

Sent from HTC 10
(Opinions are own)

 

[bjt2]

He's the source.

I heard this very same figure (4.3GHz) some weeks ago, so i was asking...
Anyway it's an early ES. Things can be improved now...

 

[witeken]

https://twitter.com/TMFChipFool/status/807508414733709312
How come 32 core at 3GHz?!?!?

Will it have also low IPC?

It won't have anything because it's canceled.

BTW, what does FO4 mean?

 

[bjt2]

4.3GHz A0 OC would be very good for this uarch, 8 core, much higher IPC, new process, on the first iteration.

Still FAR lower than some crazy 4/4.5GHz 95W hype (bjt).

But I highly doubt AMD will seed cherry samples after all the slack they got for it the last few times.

Now, let's see 4.3GHz, at what power...

Sent from HTC 10
(Opinions are own)

4 base/4.5 turbo is not crazy if this rumor is true. It's an A0 and 4.3 benchable I suppose with all cores... 4 base and 4.5 turbo is doable after 6 months... It's doable even on the best sample of his ES batch...
He said 4.3 on air, not liquid nor nitrogen...

 

[bjt2]

It won't have anything because it's canceled.

BTW, what does FO4 mean?

It was explained many pages ago... If you don't know what Fo4 is, then how can you be so sure that Zen will not go over 3.2GHz?

 

[witeken]

It was explained many pages ago... If you don't know what Fo4 is, then how can you be so sure that Zen will not go over 3.2GHz?

Google Search doesn't help me, so what are you talking about?

I never said Zen won't go over 3.2GHz.

 

[KTE]

https://twitter.com/TMFChipFool/status/807508414733709312

How come 32 core at 3GHz?!?!?

3GHz is fine. With 2010 IPC.

Your 5GHz isn't.

Will it have also low IPC? Only bench will tell... Because low FO4 does not imply low IPC...

No body said it does.

But it definitely does not equate to high IPC like you keep saying either.

Also stick to x86 markets for these comparisons.

You're still unable to name anything our market has had gaining +40% IPC, doubling features/cores, yet losing 30W, at higher frequencies.

Oh, and SNB wasn't even close to this hype.

Not even P4->Conroe or Penryns magic HKMG can beat this science!!

Sent from HTC 10
(Opinions are own)

 

[bjt2]

Google Search doesn't help me, so what are you talking about?

I never said Zen won't go over 3.2GHz.

https://en.wikipedia.org/wiki/FO4

 

[KTE]

4 base/4.5 turbo is not crazy if this rumor is true. It's an A0 and 4.3 benchable I suppose with all cores... 4 base and 4.5 turbo is doable after 6 months... It's doable even on the best sample of his ES batch...
He said 4.3 on air, not liquid nor nitrogen...

You are talking about a launch mass production chip?

Phenom ES was 3GHz OCing a year before launch...

Sent from HTC 10
(Opinions are own)

 

[bjt2]

3GHz is fine. With 2010 IPC.

Your 5GHz isn't.


No body said it does.

But it definitely does not equate to high IPC like you keep saying either.

Also stick to x86 markets for these comparisons.

You're still unable to name anything our market has had gaining +40% IPC, doubling features/cores, yet losing 30W, at higher frequencies.

Oh, and SNB wasn't even close to this hype.

Not even P4->Conroe or Penryns magic HKMG can beat this science!!

Sent from HTC 10
(Opinions are own)

5GHz only on turbo. I said 4GHz base. And we are talking of 8 cores, not 32.

600mm2 means 150mm2 for 8 cores, so a Vulcan core is comparable to a Zen core. I already said that IPC and FO4 are not strictly linked. POWER 6 had 13 FO4 and had an higher IPC than pentium 4 that had 16.3 FO4 (see my wikipedia link before), so Yes, you can! (do an high IPC low FO4 design)

The argument "no one did it before, so neither AMD can" is flawed.

I shown you many reasons that tells that is possible, including official AMD statement and not only my personal rants... I will not repeat them anoter time...

 

[bjt2]

You are talking about a launch mass production chip?

Phenom ES was 3GHz OCing a year before launch...

Sent from HTC 10
(Opinions are own)

Phenom was not an high departure form previous architectures. Zen is a departure AND on a new process. Too many unknown. And the very first ES, the A0 reaches suddenly the max clock supported by the architecture?

 

[bjt2]

You are talking about a launch mass production chip?

Phenom ES was 3GHz OCing a year before launch...

Sent from HTC 10
(Opinions are own)

I think that 4.3 GHz stable benchable OC it's not unbelievable, given the pipeline lenght and the excavator clocks... Even at the A0 ES stage.
I want to remember that we are talking of at most AUGUST ES. In 6 months nothing improved? I don't buy it.

I don't want to recall my calculations, but i want to remember that excavator on the 28nm bulk manages 4GHz base 4.2 turbo for 4 core + gpu at 65W total. And usually in the AMD APU the power balance is at most 50% CPU and 50% GPU.

 

[UncleCrusty]

I'm under the impression fo4 isn't as useful a metric these days. Just using the estimated process time per fo4(<10ps) you get an fo4 delay of 40+ for modern Intel architectures, whereas 20~25 seems like a more reasonable estimate. I think this is due to the increasing (about half now?) contributions of wire RC delay to the total clock interval.

Zen should have similar fo4

What is your basis for Zen having similar fo4 to Exv? As many people have pointed out, you are neglecting target IPC. Just based on the number of execution units, we might say Zen's integer core has a "width" of 6 vs. 4 for Exv; we might expect delay, as a crude approximation, to vary as the base 2 logarithm of width. Given the same number of pipe stages, this would mean an fo4 at least ~30% higher than Exv. Total delay might be worse, as wire delay is likely more linear than logarithmic. Simplified integer schedulers aren't going to vanquish such a difference.

 

[sirmo]

If 4.3Ghz is true for a stable OC, than that would be better than I'd hoped. For an 8c fabbed at GloFo that's mighty impressive.

 

[sirmo]

* There is a trade-off between IPC and frequency. The most extreme example of this is Apple A10, which has until A8 been on very low frequencies. Generally, a longer pipeline means lower IPC but higher frequency, and vice versa. (Source.)

I don't know how good of a reference A10 chips are given they are clocked and volted for maximum efficiency. Also CPU is only a fraction of the chip.. with a lot of uncore.

 

[Tuna-Fish]

But I highly doubt AMD will seed cherry samples after all the slack they got for it the last few times.

Leaks coming out right now are not from review samples, they are from the samples sent to motherboard manufacturers to bugtest their boards. There is no expectation that the performance of those chips would necessarily match the real thing. Sending them hand-picked samples would not be cheating in any way, it would just be something they do if they want to have the boards tested at higher clocks.

I doubt they would do that, btw, but anyway.

 

[sirmo]

Leaks coming out right now are not from review samples, they are from the samples sent to motherboard manufacturers to bugtest their boards. There is no expectation that the performance of those chips would necessarily match the real thing. Sending them hand-picked samples would not be cheating in any way, it would just be something they do if they want to have the boards tested at higher clocks.

I doubt they would do that, btw, but anyway.

Generally speaking early eng. samples are from small batches.. it's not exactly like there is a lot to cherry pick from. Yields and process tends to get better later on anyways.

 

[blublub]

Ok, but you are basing your statement on a first batch of early (step A0) ES, on a new process, with a new architecture. You think that retail will not be much better. I gave you "some" reason to think like me, you use the ES argument. Remember that BD ES were 2.6-2.8GHz and first retail CPU was 3.6GHz...
Only time will tell who is right...

We might know Tuesday because I doubt they won't show the finished silicon because for availability in Q1 there isn't enough time for another fab spin, validation, binning and packing

 

[cytg111]

Generally speaking early eng. samples are from small batches.. it's not exactly like there is a lot to cherry pick from. Yields and process tends to get better later on anyways.

Haswell was the other way around, ES clocked much better than final silicon.
What I wanna know is, is it fabbad at tsmc or glofo.

 

[inf64]

Zen is fabbed at GloFo.

 

[cytg111]

Zen is fabbed at GloFo.

Thats great then isnt it? Calls for the 4.3 number to be conservative given time to mature.

 

[KTE]

Thats great then isnt it? Calls for the 4.3 number to be conservative given time to mature.

Altho better than the crappy initial clocks scare, that still has no bearing on what is sellable within 95W.

Just one factor can throw such unconfirmed reports off; high leakage chips can do these clocks for nearly a decade.

Sent from HTC 10
(Opinions are own)

 

[Timmah!]

Agree, Broadwell is frankly the worst architecture that Intel has fielded in YEARS from an enthusiast perspective. Negligible IPC gain from Haswell, clock regression. The 6950X was interesting because it gave us 10 cores, but the underlying core was a disappointment.

It might have been disappointing for someone already in possesion of Haswell-E, but for the rest of us, its just fine. My 6850k at 4,2GHz is pretty much equal to 5930k at 4,5~4,6GHz, i would not call that negligible IPC gain. Not to mention SKL-X is not going to be magically 50 percent faster than BW-E.

 

[krumme]

Thats great then isnt it? Calls for the 4.3 number to be conservative given time to mature.

Hell yeaa. If true 4.3 oc is possible this early we are back in business big time. The best thing that have happened for enthusiast since sb.

 

[majord]

They did say suicide runs @ 4.3 don't get too carried away. Does bode well for a ~4Ghz stable OC though. and lines up pretty well with the idea of a mid to high 3Ghz Turbo