AMD Ryzen (Summit Ridge) Benchmarks Thread (use new thread)

[deasd]

Geekbench has plenty of memory test that affect overall score and tons of bugs. Not understand why you all deal seriously with that...... It is even much unreliable than superpi and cinebench.
Geekbench advantage is multiple-platform support but nothing else.

 

[TheELF]

And AMD also said at Hot chips that those 40% are without SMT,

That's exactly what I said,40% is without SMT so each SMT core is 140% divided by 2.

And the blender test was without them telling us the settings or releasing the render file so you can't run the benchmark yourself so it's not telling us anything.

 

[Exist50]

That's exactly what I said,40% is without SMT so each SMT core is 140% divided by 2.

And the blender test was without them telling us the settings or releasing the render file so you can't run the benchmark yourself so it's not telling us anything.

What are you trying to say? That Zen will have significantly lower IPC than Excavator? Saying "SMT core" in the context of your post doesn't make any sense at all.

 

[coercitiv]

so each SMT core is 140% divided by 2

Can you please clarify this statement? You seem to completely ignore SMT gains altogether.

 

[TheELF]

What are you trying to say? That Zen will have significantly lower IPC than Excavator? Saying "SMT core" in the context of your post doesn't make any sense at all.

Can you please clarify this statement? You seem to completely ignore SMT gains altogether.

There is no definition of what constitutes a core in the eye of the law,also SMT does not automatically mean hyperthreading which is an intel patented method of SMT,HT gives some smt gains but that does not mean that any version of smt gives you gains. (other then being able to run 2 threads at once)

I mean it's not beneath AMD to sell "12 core" laptops
http://www.cnet.com/news/amds-newest-a-series-notebooks-will-have-up-to-12-cores/
basically they can call anything they want a core,we just don't know, a ZEN core could be nothing else then a module of 2 smt threads.

 

[NostaSeronx]

I mean it's not beneath AMD to sell "12 core" laptops

Technically, if the operating system was built in HSAIL there is twelve cores to use.

 

[Abwx]

That's exactly what I said,40% is without SMT so each SMT core is 140% divided by 2.

And the blender test was without them telling us the settings or releasing the render file so you can't run the benchmark yourself so it's not telling us anything.

You are saying that a Zen core in ST is 70% of a EXV core, wich is plain ridiculous..

In ST a Zen core is 140% of an EXV core and in multithread it is 140% + gain of SMT, for instance in Blender a Zen core + SMT = 200% of an XV core.

In Blender the test was obvioulsly made with 8C/16T and the result is the same as a theorical 8 module XV that would have no CMT penalty, and of course it s telling, it s just that the result does not suit you.

,also SMT does not automatically mean hyperthreading which is an intel patented method of SMT

Patended yes, but not by Intel who just licenced the thing.

Hyper-Threading Technology is a form of simultaneous multithreading technology introduced by Intel, while the concept behind the technology has been patented by Sun Microsystems.

https://en.wikipedia.org/wiki/Hyper-threading

 

[DrMrLordX]

Technically, if the operating system was built in HSAIL there is twelve cores to use.

. . . oh, if only. If only.

 

[LTC8K6]

Hyper-threading (officially called Hyper-Threading Technology or HT Technology, and abbreviated as HTT or HT) is Intel's proprietary simultaneous multithreading (SMT) implementation used to improve parallelization of computations (doing multiple tasks at once) performed on x86 microprocessors.

Intel's proprietary SMT implementation...

From Abwx's wiki link.

 

[NostaSeronx]

. . . oh, if only. If only.

I have really bad memory in regards to things that I just simply glance over. Where was the total rebuild guide for Unix operating systems for OpenCL-HSA or HSA-Compiler instead of C/C++?

 

[deasd]

That's exactly what I said,40% is without SMT so each SMT core is 140% divided by 2.

What an absurd assumption, you absolutely misunderstand multi-threading architecture, there's no method that can handle another thread with 100% ultilization in a physical core, even Bulldozer-Excavator can't do.
LOL. I think this is as absurd as 'reverse hyperthreading' rumor before K10 born. Anyone with good memory should remember that.

 

[itsmydamnation]

MAYBE PEOPLE SHOULD GO LOOK AT THE SCORE OF A P2 22 CORE(44 total) XEON AND THEN COMPARE CLOCK FOR CLOCK you know with the Zen being 2P 32core(64 total).

like this:
https://browser.primatelabs.com/v4/cpu/88332
3000/3600x1440 = 1200

1141/1200 = 0.95
1200/1141= 1.05

how about people compare apples to apples, with many core multi socket systems your memory latency increases.

And this is the best E5v4 on geekbench4 for multicore score.........


the agenda's of people here are plain to see.........

 

[lolfail9001]

MAYBE PEOPLE SHOULD GO LOOK AT THE SCORE OF A P2 22 CORE(44 total) XEON AND THEN COMPARE CLOCK FOR CLOCK you know with the Zen being 2P 32core(64 total).

like this:
https://browser.primatelabs.com/v4/cpu/88332
3000/3600x1440 = 1200

1141/1200 = 0.95
1200/1141= 1.05

how about people compare apples to apples, with many core multi socket systems your memory latency increases.

And this is the best E5v4 on geekbench4 for multicore score.........


the agenda's of people here are plain to see.........

Alternate math with a chip we certainly know clockspeed of. Dual socket too!
https://browser.primatelabs.com/v4/cpu/118239

1800/1600*1440 = 1620; 1620/1141=1.41

Your objections now?

Though admittedly if results of this 2699 pair can be replicated reliably then yeah, GB4 sucks.

 

[itsmydamnation]

That is a much smaller chip, 12 cores. remember the memory latency is from the need for cache coherency, the more cores, the more L1's,L2's,L3 slices that need to be checked, the longer it takes.


https://browser.primatelabs.com/v4/cpu/search?dir=desc&q=Xeon+E5&sort=multicore_score
look at all the 44 core e5's all ~3000.

 

[lolfail9001]

That is a much smaller chip, 12 cores. remember the memory latency is from the need for cache coherency, the more cores, the more L1's,L2's,L3 slices that need to be checked, the longer it takes.

Well, memory latency on Zen sample is ridiculously bad indeed, that may indeed deflate overall score, as it does on 2699. So, i'll give you that. But well, does AMD have time to properly fix that?

 

[itsmydamnation]

I dont think its an actual issue, its just the cost of the increased latency of bigger chips. Thats why you will have anywhere from 4 to 32 core Zen based chips. What we have to wait and see is if the GB4 scaling factor on Xeon is the same for Zen.


we have 3 data points so far.

1. GB4 32C 2P ST score, per clock around the same perf as 22 core E5v4
2. GB4 32C 2P MT score, something is wrong, if i had to guess i would say memory config, for 128gb across 16 memory controllers would be 8gb dimms, no one buys 8gb dimms. OR Zen could jsut suck
3. AMD "canned" demo of 8 core Zen matching Broadwell-E clock for clock in blender.

Its not a lot to go on, but compare that relative to the first bulldozer benchmarks.................

 

[Abwx]

...

Alternate math with a chip we certainly know clockspeed of. Dual socket too!
https://browser.primatelabs.com/v4/cpu/118239

1800/1600*1440 = 1620; 1620/1141=1.41

Your objections now?

Though admittedly if results of this 2699 pair can be replicated reliably then yeah, GB4 sucks.

The ST subscore are not scaled according to a difference of frequency of 125%, just this should ring a bell, for instance in SFFT the gigaflops increase by 66.6% while frequency is supposed to increase by 125% between your exemple and the one provided by IMD..

 

[lolfail9001]

...


The ST subscore are not scaled according to a difference of frequency of 125%, just this should ring a bell, for instance in SFFT the gigaflops increase by 66.6% while frequency is supposed to increase by 125% between your exemple and the one provided by IMD..

On another hand Dijkstra result almost doubles [ST], as does Rigid body and Speech recognition (i had tables set up the day this leak first popped).

I dont think its an actual issue, its just the cost of the increased latency of bigger chips. Thats why you will have anywhere from 4 to 32 core Zen based chips. What we have to wait and see is if the GB4 scaling factor on Xeon is the same for Zen.


we have 3 data points so far.

1. GB4 32C 2P ST score, per clock around the same perf as 22 core E5v4
2. GB4 32C 2P MT score, something is wrong, if i had to guess i would say memory config, for 128gb across 16 memory controllers would be 8gb dimms, no one buys 8gb dimms. OR Zen could jsut suck
3. AMD "canned" demo of 8 core Zen matching Broadwell-E clock for clock in blender.

Its not a lot to go on, but compare that relative to the first bulldozer benchmarks.................

Well, were not there "leaks" of BD beating Sandy or something as well? As for MT scaling... Don't forget, that whether it is Snowy Owl or Naples, it's still most likely an MCM. And hell, 4P Magny Cours MT scaling was about as bad.

 

[krumme]

Well, were not there "leaks" of BD beating Sandy or something as well? As for MT scaling... Don't forget, that whether it is Snowy Owl or Naples, it's still most likely an MCM. And hell, 4P Magny Cours MT scaling was about as bad.

Well amd matched a sb 2600 in 3d mark....with a 6670 gfx added to the bd system. Lol.
There was a lot of paper hype but all the benches just pointed to the failure.
Nothing remotely remisent of this canned blender stuff.

 

[lolfail9001]

Well amd matched a sb 2600 in 3d mark....with a 6670 gfx added to the bd system. Lol.
There was a lot of paper hype but all the benches just pointed to the failure.
Nothing remotely remisent of this canned blender stuff.

Well, AMD apparently had that slide that had fx-8150 compete with 2600 in some cases like 7zip MIPS (rofl). So while short of live demo, they did have canned blender alike, or something.

 

[krumme]

What is worth remembering about bd was not only was it slow and i many cases even slower than thuban. It was also crazy inefficient as the main feature. A huge die as a bonus. And as icing on the cake it cost as a 2500k making it the worst value ever.

It simply didnt make any sense. The crazy stuff was that even if leaks cb showed it slower than thuban in st and people reacted to it amd still decided to launch their misfoster at a stupid high price.

It left us as consumers with practically 4 gens of 4 core sandy bridge.

 

[krumme]

Well, AMD apparently had that slide that had fx-8150 compete with 2600 in some cases like 7zip MIPS (rofl). So while short of live demo, they did have canned blender alike, or something.

Yep but that and winrar was a 8 core vs 4 core. Even at that time showed it was a mess. Not 8c vs 8c as we see today.
It would excactly be like amd comparing a 8c zen in blender to a 4c core.

Bd was 315 mm2 !!! Good grief.

Zen is probably more like 180mm2. It will never ever get close to bd failure. Its not possible.

 

[lolfail9001]

Yep but that and winrar was a 8 core vs 4 core. Even at that time showed it was a mess. Not 8c vs 8c as we see today.
It would excactly be like amd comparing a 8c zen in blender to a 4c core.

Bd was 315 mm2 !!! Good grief.

Zen is probably more like 180mm2. It will never ever get close to bd failure. Its not possible.

Calling original 8150 an eight core is about as fair as calling A12-9800P a 12-core.

But yeah, messing up Zen as hard as they did with BD is mostly impossible. The problem is that it needs to be more than an improvement over mostly irrelevant Con core CPUs.

 

[The Stilt]

Bd was 315 mm2 !!! Good grief..

< 297mm² nominal for all Orochi dies.

 

[krumme]

Calling original 8150 an eight core is about as fair as calling A12-9800P a 12-core.

But yeah, messing up Zen as hard as they did with BD is mostly impossible. The problem is that it needs to be more than an improvement over mostly irrelevant Con core CPUs.

It was a 315mm2 cpu and from the viewpoint of winzip at least it was very much a 8 core chip. The same way this blender test exposes all the best of the fpu in zen.

But we know its not going to use a gazilion watts and be 315mm2. On the contrary we have a 32c 180w underway.

The point is the situaion is in no way comparable to then. But ofcource those hoping for a skylake desktop competitor on st is ofcource looking the wrong way.