Question AMD Rembrandt/Zen 3+ APU Speculation and Discussion

[izaic3]

Alright, so we've had some leaks so far. I don't know if any of it's been confirmed yet, as it's pretty early, but here is what I've surmised so far (massive grain of salt of course):

• Zen 3 "enhanced"
• DDR5 and LPDDR5 support
• PCIE4
• 6nm
• CVML
• Navi 2/RDNA/RDNA 2
• 12 CU
• Socket FP7/AM5
• Possible USB4
• 2021(unlikely) -2022 (more likely) release date

If if turns out to have RDNA 2 and 12 CU, I could see iGPU performance potentially almost doubling over Cezanne.

If I've made any mistakes or gotten anything wrong, please let me know. I'd also love to hear more knowledgeable people weigh in on their expectations.

 

[eek2121]

If they want to release more cores than 8, then they can't skip chiplets, unless they will keep the current 12-16 core lineup and just rename It until Zen4.
In mobile I think we won't see more than 8 cores.

It is entirely possible for them to skip 12 and 16 cores for one generation. However, bumping the clocks of 12 and 16 core Zen 3 and renaming would be acceptable in my eyes. They could also do a limited release of Zen 4 for the higher end chips later on next year.

To continue this fun little exercise:

1. Unified die should improve memory latency and lower power consumption.
2. DDR5 would significantly increase memory bandwidth. This would provide a general performance uplift for many different types of applications, including games.
3. They could bump up the L3 cache to full size, and possibly even add more cache for the iGPU. 12 CUs with 64 or 128mb cache would be interesting.
4. With an expanded package power of 142W, and lower power consumption thanks to a rework, I bet the top of the line SKU could have an all core boost clocks should be significantly higher, and single core boost should hit 5.0 or even possibly 5.1ghz.

The advantage for AMD is that they would have a single die to cover nearly their entire consumer line. Such a scenario would significantly increase the number of chips they are able to pump out.

The advantage for the end user is the chip would actually be quite a bit faster than normal Zen 3. The addition of a GPU means that everyone who buys one and can't get a GPU will have an entry level one on board.

EDIT: Oh and I suspect the chip would be slightly cheaper to produce as well, since it will be on EUV, and the packaging will be simplified. They will also be able to pump them out faster.

EDIT: To add even more fuel to this fire, a 5980HX with a 54W TDP has a base/boost of 3.3-4.8 GHz. Compared with the 5800X, the base clock is 500 MHz slower, but the boost clock is 100 MHz higher. That is with half the TDP of a 5800X. I'm really curious how a Cezanne chip with a 105W TDP would perform.

 

[Shivansps]

We are still talking about an IGP here, and you would be disappointed If It wasn't faster than a GTX 1650, which has GDDR6 and no CPU to share memory and TDP with? Why should It outperform GTX 1650 and by how much in your opinion?
It's enough If It's performing similarly or close enough, and It will depend mainly on available bandwidth and clockspeed.
In desktop I can imagine that It could perform very well against GTX 1650, thanks to high clocks(~2.3-2.5GHz) and TDP(95 or 125W), while GTX 1650 has fewer Cuda than the mobile version(896 vs 1024).
In mobile I expect It will be slower.

i think it is very important for the 12CU model to outperform the GTX1650 because im thinking about the segmentation, the top SKU having 12CU means we are going to have 10, 8 and 6 CU skus as well.

Im always talking about desktop, in mobile performance is affected by TDP and OEM settings. The thing is, we are already near RX560/GTX1050 performance with fast rams (+4000) and OC over to 2.4 on Vega 8. If Renoir/Cezanne had Vega 11 it is likely that we would be already there, Vega 8 is not memory limited at 4200/4400. RMB is a massive upgrade, not only we are going to have memory speeds over 5000mhz, it is going to have 12 RDNA CUs, that is bigger, more memory efficient and have better IPC than Vega, plus better CPU cores. I think something has to go very wrong somewhere in order not to outperform the GTX1650.

And i dont think the GTX1650 takes much advantage of GDDR6, it will be like the 3400G with DDR4-3200 outperforming the RX550 that has 128 bit GDDR5, that happens A LOT and in some games by a large margin.

 

[andermans]

It is entirely possible for them to skip 12 and 16 cores for one generation. However, bumping the clocks of 12 and 16 core Zen 3 and renaming would be acceptable in my eyes. They could also do a limited release of Zen 4 for the higher end chips later on next year.

To continue this fun little exercise:

1. Unified die should improve memory latency and lower power consumption.
2. DDR5 would significantly increase memory bandwidth. This would provide a general performance uplift for many different types of applications, including games.
3. They could bump up the L3 cache to full size, and possibly even add more cache for the iGPU. 12 CUs with 64 or 128mb cache would be interesting.
4. With an expanded package power of 142W, and lower power consumption thanks to a rework, I bet the top of the line SKU could have an all core boost clocks should be significantly higher, and single core boost should hit 5.0 or even possibly 5.1ghz.

The advantage for AMD is that they would have a single die to cover nearly their entire consumer line. Such a scenario would significantly increase the number of chips they are able to pump out.

The advantage for the end user is the chip would actually be quite a bit faster than normal Zen 3. The addition of a GPU means that everyone who buys one and can't get a GPU will have an entry level one on board.

EDIT: Oh and I suspect the chip would be slightly cheaper to produce as well, since it will be on EUV, and the packaging will be simplified. They will also be able to pump them out faster.

EDIT: To add even more fuel to this fire, a 5980HX with a 54W TDP has a base/boost of 3.3-4.8 GHz. Compared with the 5800X, the base clock is 500 MHz slower, but the boost clock is 100 MHz higher. That is with half the TDP of a 5800X. I'm really curious how a Cezanne chip with a 105W TDP would perform.

AFAIK the zen3+ in Rembrandt is mostly a clock bump anway, and the reduction of L3 cache significantly hurts in some workloads.
I'd consider it more likely that they just bump the frequency on the chiplets in something like an XT variant.

 

[uzzi38]

Are you comparing desktop to desktop or laptops?
At the desktop power draws I'm also expecting around 2x performance for the most part,
Mobile parts are always a mess with power limits, so I think a mobile rembrant could be more than 2-2.4x performance of a mobile cezanne with the additional process and rdna efficiency imrovements and lpddr5 if nothing is hamstrung by useless laptop design.

By 28W Cezanne scores about the same in synthetics as it does at 65W, so I mean, my estimation applies to both really.

 

[IntelUser2000]

Wait, I'm going off the top of my head here, but desktop Cezanne is like 1.2k pts in TS, right? If so, them yeah, 2.5x.

In Time Spy sure. The 4750G review from AT shows in games it's 3.5x or more.

 

[uzzi38]

In Time Spy sure. The 4750G review from AT shows in games it's 3.5x or more.

Except it doesn't even cover the 1650?

Integrated Graphics - Testing The World’s Best APUs: Desktop AMD Ryzen 4750G, 4650G and 4350G (anandtech.com)

Genuinely confused on what you're referring to, but in TS the 4750G performs about on par with the GT1030, so it doesn't seem like a particularly bad benchmark to me. The only issue I have with TS is how reliant the scoring is on memory bandwidth thanks to Graphics Test 2, which by all means should put the APUs in a worse light.

 

[Shivansps]

Except it doesn't even cover the 1650?

Integrated Graphics - Testing The World’s Best APUs: Desktop AMD Ryzen 4750G, 4650G and 4350G (anandtech.com)

Genuinely confused on what you're referring to, but in TS the 4750G performs about on par with the GT1030, so it doesn't seem like a particularly bad benchmark to me. The only issue I have with TS is how reliant the scoring is on memory bandwidth thanks to Graphics Test 2, which by all means should put the APUs in a worse light.

Remember that is with DDR4-3200, stock Vega 8 tend to scale up to DDR4-4000/4200.

 

[TESKATLIPOKA]

i think it is very important for the 12CU model to outperform the GTX1650 because im thinking about the segmentation, the top SKU having 12CU means we are going to have 10, 8 and 6 CU skus as well.

Im always talking about desktop, in mobile performance is affected by TDP and OEM settings. The thing is, we are already near RX560/GTX1050 performance with fast rams (+4000) and OC over to 2.4 on Vega 8. If Renoir/Cezanne had Vega 11 it is likely that we would be already there, Vega 8 is not memory limited at 4200/4400. RMB is a massive upgrade, not only we are going to have memory speeds over 5000mhz, it is going to have 12 RDNA CUs, that is bigger, more memory efficient and have better IPC than Vega, plus better CPU cores. I think something has to go very wrong somewhere in order not to outperform the GTX1650.

And i dont think the GTX1650 takes much advantage of GDDR6, it will be like the 3400G with DDR4-3200 outperforming the RX550 that has 128 bit GDDR5, that happens A LOT and in some games by a large margin.

Ok, I compared them based on TFLOPs and assuming they have similar IPC. In desktop Rembrandt's 12CU IGP should have similar performance If bandwidth isn't a bottleneck and clockspeed is ~2225Mhz, anything over It should make It faster than GTX 1650.

 

[uzzi38]

https://twitter.com/x/status/1395434495923343364

Here's the actual roadmap. HSP is an IPU I believe.

 

[jpiniero]

https://twitter.com/x/status/1395434495923343364

Here's the actual roadmap. HSP is an IPU I believe.

OEMs must really love that. Also it looks like they are adding Thunderbolt... er.. USB4. That and the RDNA2 GPU are going to eat up any density gains from shrinking to 6 nm. Kind of makes you wonder if there's really going to be any core improvement going to Zen 3+.

 

[yuri69]

DDR5 forces a new memory controller and maybe a few IF tweaks for "Zen 3+".

The long needed Vega replacement is finally coming but the CPU upgrade will have to wait for the 2023 APU release cycle.

 

[uzzi38]

DDR5 forces a new memory controller and maybe a few IF tweaks for "Zen 3+".

The long needed Vega replacement is finally coming but the CPU upgrade will have to wait for the 2023 APU release cycle.

Stay tuned for a bit more info on the CPU side. Don't make any assumptions just yet.

 

[moinmoin]

Stay tuned for a bit more info on the CPU side. Don't make any assumptions just yet.

Isn't making assumptions the only thing we can do anyway? *cries in van Gogh*

 

[DisEnchantment]

Stay tuned for a bit more info on the CPU side. Don't make any assumptions just yet.

Isn't it a lost opportunity to do a halo 5nm very energy efficient SKU for the refresh from OEMs and then rest being 6nm SKUs using Zen3. Free PR for the whole year.
New roadmaps popping out everyday from random sources, AMD is really tightening the screws everywhere.
Impressive but sad at the same time.

 

[uzzi38]

Isn't it a lost opportunity to do a halo 5nm very energy efficient SKU for the refresh from OEMs and then rest being 6nm SKUs using Zen3. Free PR for the whole year.
New roadmaps popping out everyday from random sources, AMD is really tightening the screws everywhere.
Impressive but sad at the same time.

That's what I'm expecting to take place with RDNA3 if nothing else. Less so with Zen 4/Zen 3+, I think RMB is N6 purely because of a lack of N5 wafers for too many products to release end of this year/beginning of next.

(Also this roadmap is pretty old, which is actually the biggest sign of screws being tightened. Over half a year old at least)

 

[NostaSeronx]

HSP is an IPU I believe.

HSP is likely related to Pluton.

AMD to Integrate Microsoft Pluton Security Processor to Future Ryzen Products

Remote working was already on pace to become the new norm, however recent events across the globe have certainly accelerated that transition. Whether it is employees working from home, students engaging in distance learning, or family and friends catching up using web and video conferencing...

community.amd.com

https://images.anandtech.com/doci/15994/202008180206261.jpg

https://images.anandtech.com/doci/15994/202008180212441.jpg

HSP => Highly Secure Processor
"Besides network level protection, researchers from the industry have also tried to develop highly secure processor/SoC architectures for IoT protection. ARM Trust-Zone is an industry landmark in providing a basis of trust for various applications such as secure payment, digital rights management (DRM), enterprise and web-based services. TrustZone technology provides infrastructure foundations that allow a SoC designer to choose from a range of components that can perform specific functions within the security environment."

Also, => Hardware Security Processor
"The Hardware Security Processor (HSP) enables root of trust as well as all cryptographic functions, such as secure hardware crypto keys. The HSP is also part of Microsoft’s Pluton architecture, which we will see come to modern CPUs that use Windows over the next couple of years."

 

[scineram]

I think RMB is N6 purely because of a lack of N5 wafers for too many products to release end of this year/beginning of next.

Instead it would literally make no sense.

 

[Gideon]

Gosh, why can't leakers just admit that they might have had bad info.

https://www.reddit.com/r/Amd/comments/nj4xjy

So they expect us to believe that AMD cancelled the entire Zen3+ for desktop project in April, then decided to continue with it in May and all just progresses as if nothing happened? Things don't work like that in the real world. A product launch is a ton of work and once you call it quits you can't just resume it in a flash a month down the line without massive schedule hits.

IMO what Gamers Nexus hinted, is much more plausible, that codename "Warhol" wasn't what people belived it to be (Zen3+ desktop refresh) and the refresh itself was never canned.

Either way, good to see that Zen3+ on AM4 is still very likely happening (as the only people that said otherwise were the same leakers that now are saying it isn't happening).

 

[DrMrLordX]

Either way, good to see that Zen3+ on AM4 is still very likely happening (as the only people that said otherwise were the same leakers that now are saying it isn't happening).

Maybe? If it pushes out Zen4 launch then that could be both good and bad.

 

[moinmoin]

Maybe? If it pushes out Zen4 launch then that could be both good and bad.

It's very likely the other way, Zen 4 is too far away so there needs to be a filler.

The big question always was whether that's going to be on AM4 or AM5, with DDR4 and DDR5 respectively. Looks like it only recently became clear it's still too early for DDR5 as mainstream.

 

[izaic3]

It's very likely the other way, Zen 4 is too far away so there needs to be a filler.

The big question always was whether that's going to be on AM4 or AM5, with DDR4 and DDR5 respectively. Looks like it only recently became clear it's still too early for DDR5 as mainstream.

With the Zen 4 pinout just being leaked, when do you guys think Zen 4 will be released? Do you think that will affect Rembrandt's release or do you think it will still follow the yearly cadence?

 

[eek2121]

It's very likely the other way, Zen 4 is too far away so there needs to be a filler.

The big question always was whether that's going to be on AM4 or AM5, with DDR4 and DDR5 respectively. Looks like it only recently became clear it's still too early for DDR5 as mainstream.

Or it could be a simultaneous release if both parts are targeting different parts of the market.

 

[uzzi38]

With the Zen 4 pinout just being leaked, when do you guys think Zen 4 will be released? Do you think that will affect Rembrandt's release or do you think it will still follow the yearly cadence?

I still lean towards H2 2022 for Raphael. However, I hope that AMD have at least evaluated the option of bringing Rembrandt to the desktop earlier than I'm assuming would be originally planned thanks to the current state of the dGPU market.

I still expect Rembrandt to perform on the level of a desktop 1650, so coupled alongside 8 Zen 3 cores I can see it being very popular for DIY given how the last year has been horrible for dGPU supply.

EDIT: Don't get me wrong, 208mm^2 is certainly not a small amount of silicon. But AMD should be able to charge more for it than the similarly sized (but larger) Navi23 die - 8 Zen 3 cores combined with solid iGPU on a platform with 3-4 years of support ahead of it? There's a really strong value proposition here for consumers that I don't think can be easily ignored.

 

[moinmoin]

8 Zen 3 cores combined with solid iGPU on a platform with 3-4 years of support ahead of it? There's a really strong value proposition here for consumers that I don't think can be easily ignored.

So Rembrandt being to AM5 like Bristol Ridge was the entry product jump starting AM4? Makes sense to me, and indeed has potential to be plenty popular.

 

[uzzi38]

So Rembrandt being to AM5 like Bristol Ridge was the entry product jump starting AM4? Makes sense to me, and indeed has potential to be plenty popular.

I hope so at the least. Can't say I know that it absolutely is the chip that launches first on AM5, but I think if they were to do it at CES next year, it would actually be a compelling alternative to ADL i7s IMO for those that lack a dGPU or want to wait for RDNA3/Lovelace/Hopper before making a purchase (as this upcoming generation does appear to be a rather big leap)