We're talking in circles here then. You're arguing AMD needs to provide value with an APU vs CPU/DGPU setup while I am arguing that AMD would probably be better off selling more CPUs/dGPUs at the pricing where such APU would provide value, classic catch-22.
Remember that a significant portion of APU demand comes from laptop OEMs, and Dell/Lenovo/Asus et al aren't gonna pay higher prices for processors in XPS 13s/Thinkpads/Zenbooks just because there's a bunch more GPU in the die, given said GPU can't be utilized due to inherent form factor limitations, and that even they did, the end consumer may not pay a premium for such extra capability anyways.
Doesn't matter here, AFAIK, wafer costs for both processes are similar and AMD doesn't order N4/N5 separately. Rembrandt being N6 did not prevent supply being utterly terrible initially, presumably because AMD wanted the wafers in N7 form for their other products.
I didn't say this big APU would be for everyone, or that It should have been made instead of the current Phoenix. This was meant as an extra design.
I originally started this talk about big IGP with Strix Point in mind, which I expected as a chiplet design and where IGP could be on a separate chiplet.
Zen4 24CU monolith was a by-product when I calculated cost for Phoenix with different IGP sizes.
I thought It could be profitable to make and there would be demand for this.
You had a different opinion and started looking at "possible" profit loss compared to 16C Raphael.
It looks like your issue is not with this big APU per se, but with AMD not reserving enough wafers.
I automatically calculated with AMD buying(reserving) extra wafers for this APU, so It won't affect other products.
So the question is If there are enough wafers or not.
P.S. Why do you think AMD is reserving capacity for N4/N5 or N6/N7 together?
It should be a different production line, so this doesn't make any sense to me.
TSMC doesn't have an unlimited production capacity for each process, and there are other customers who also buy wafers depending on what they need.
Nvidia for example uses only N4 and no N5 for their consumer GPUs.
If AMD doesn't reserve a specific amount of wafers for each node, then TSMC wouldn't know how much of the unused capacity for either N5 or N4 can be sold to someone else.