Question AMD Phoenix/Zen 4 APU Speculation and Discussion

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maddie

Diamond Member
Jul 18, 2010
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Do we know whether AMD plans to do SOIC packaging on its own like it does with substrate packaging? If not I expect it to cost more in any case just for the reason AMD can't move it in-house and directly profit of economy of scale. I haven't seen any news indicating the TF AMD packaging plant in Malaysia, the current or the upcoming one in next year, is capable of SOIC or not.
ASFAIK the SOIC bonding process takes place at TSMC, just like producing the chiplets. I can't see them allowing off site anytime soon. Critical tech for competing against other fabs.

If anything, as more TSMC customers begin using SOIC, the volumes will be greater than AMD alone can generate.
 

moinmoin

Diamond Member
Jun 1, 2017
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ASFAIK the SOIC bonding process takes place at TSMC, just like producing the chiplets. I can't see them allowing off site anytime soon. Critical tech for competing against other fabs.

If anything, as more TSMC customers begin using SOIC, the volumes will be greater than AMD alone can generate.
My point is when TSMC does it it will likely be a fixed fee, with economy of scale likely not being used to reduce the fee for the customers like AMD. Unlike with packaging done in-house where AMD directly profits from improvements and economy of scale.
 

maddie

Diamond Member
Jul 18, 2010
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My point is when TSMC does it it will likely be a fixed fee, with economy of scale likely not being used to reduce the fee for the customers like AMD. Unlike with packaging done in-house where AMD directly profits from improvements and economy of scale.
Don't you think TSMC passes some of the scaling benefit savings to their customers? It's a fee, but it can also change +/- depending on costs.
 

tomatosummit

Member
Mar 21, 2019
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Don't you think TSMC passes some of the scaling benefit savings to their customers? It's a fee, but it can also change +/- depending on costs.
It has potential to be a monopoly today. We know tsmc has been expanding their packaging facilities and 3d integration is likely a part of that. I doubt we'll find out how it's costed to customers today for a while. It might even be partially subsidised by the increased wafer costs of n7/n5 so customers stick with tsmc and are more inclined to stick with their new packaging technology.
This is probably why there's an industry push towards open chiplet interconnects so third parties can be involved in more packaging again and reintroduce some competition.
 

moinmoin

Diamond Member
Jun 1, 2017
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Don't you think TSMC passes some of the scaling benefit savings to their customers? It's a fee, but it can also change +/- depending on costs.
We were talking about whether SOIC could be cheaper than bog standard substrate packaging. Maybe it could, if AMD does SOIC itself as well. As is AMD does substrate packaging itself whereas SOIC is a service bought from TSMC. Even if the latter is the cheaper work of the two, as an external service it's very likely more expensive. As any company TSMC will want to have some profit margin there.
 

MadRat

Lifer
Oct 14, 1999
11,910
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With chiplets they only need TSMC for the finest, highest granular parts. At a certain point a third party should be able to build the substrate and add on the modular parts. Its on the designer to build flexibility into that further development, not TSMC.
 

DrMrLordX

Lifer
Apr 27, 2000
21,634
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It can be inferred that Zen4 is, in general, very efficient at isoperf. That's about all that you can really get from the presentation that may relate to Phoenix Point. I don't think we'll get more info specific to AMD's mobile offerings until later in the year. Unless I missed part of the presentation (which I probably did).
 

moinmoin

Diamond Member
Jun 1, 2017
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I expect more info on Dragon Range and Phoenix Point in January at CES. AMD has other products to push before that point, like RDNA3 and potentially X3D versions of Ryzen 7000.
 

izaic3

Member
Nov 19, 2019
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Many of you have probably seen this, but just in case you haven't, it's a new naming scheme for future AMD products.

Basically it's 4 digits followed by a number. In order it's: Model Year, Market Segment, Architecture, Feature Isolation, and Form Factor/TDP.
 

desrever

Member
Nov 6, 2021
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Meh... 7710U should be faster than a 7540U... right? Wrong... <sigh>
Why would the slower CPU be tier 7 vs 5 in the same year? More likely the first one would be named 7210U if the second one is 7540U. AMD does get to name their products based on how they position on the stack at the end of the day.
 

RnR_au

Golden Member
Jun 6, 2021
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Why would the slower CPU be tier 7 vs 5 in the same year? More likely the first one would be named 7210U if the second one is 7540U. AMD does get to name their products based on how they position on the stack at the end of the day.
Does this mean that a sku that was in tier 7 in one year, could become tier 5 the next year? So 7740U and then 8540U could infact be the same sku in the end?
 

desrever

Member
Nov 6, 2021
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Does this mean that a sku that was in tier 7 in one year, could become tier 5 the next year? So 7740U and then 8540U could infact be the same sku in the end?
Probably how it will be for some refresh chips.Tho I think it doesn't matter too much if they are the same, for the average person, they just need to know that the CPU is the current mid range chip for this year and expect that amount of performance. Anyone who does care can decode the full string of numbers to see what it is.
 

gdansk

Platinum Member
Feb 8, 2011
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Does this mean that a sku that was in tier 7 in one year, could become tier 5 the next year? So 7740U and then 8540U could infact be the same sku in the end?
Cezanne-R-R and Rembrandt-R could be too close if they don't. :rolleyes:
Phoenix Point, probably 7840U. Or maybe 7940U.
Then 6800U refresh ends up as 7835U.
And so the 5800U's refresh refresh ends up as a 7730U.
They won't let it end up as 7840U, 7835U, 7830U will they? Jeeze
 

LightningZ71

Golden Member
Mar 10, 2017
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They seem to have no problems with having the Ryzen 5 be both 4 cores (1400(x), 2400u, 3400u, 3350u, Mendocino from the above naming graph (only one 4 core CCX) as well as 6 core (almost every other Ryzen 5). What's holding them back from releasing 8 core Ryzen 5 products too? They could easily bump the refresh of the 5700u down to Ryzen 5 and hilariously have Ryzen 5 be 4, 6 AND 8 cores with this naming scheme...
 
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izaic3

Member
Nov 19, 2019
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Rekluse

Junior Member
Sep 16, 2022
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I'd like to ask. What's the feasibility of the AIE being used for image processing or an engine agnostic upscaler by tapping into the graphics pipeline/memory to help the iGPU punch above it's weight + save power ?

Sort of a forced FSR

I mean, it does say image processing on the tin

Apologies if this is a stupid question (complete layman here).
 

Kaluan

Senior member
Jan 4, 2022
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Meh... 7710U should be faster than a 7540U... right? Wrong... <sigh>
Well... I think the fact that the 7540U laptop will cost nearly $1000 and the 7710U one will be around $400 should tell people enough about which is faster...

BTW, there won't be any 7x10 chips next year (or later for that matter), Zen/Zen+ uArch (for mobile at least) seems dead to AMD. Only 7x20 (Zen2) will be a thing, in the form of ultra-low power/budget Mendocino SKUs, which clearly won't be competing with Phoneix Point in the same class of mobile devices.

The only real confusion may come in the form of Zen3 v Zen3+ v Zen4 in mobile 7000 chips. Since some of the SKUs may be availale in simiarly priced models.
 
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