Its not only the supply, the cost of producing CPUs with chiplets is higher vs monolithic in the sub 200$ segment. So they prefer to use the chiplet dies for higher-end SKUs.
But they cannot compete in the sub $200 by using older dies, we can see this even today with Ryzen 5500 and Ryzen 4000 in desktop which all of them come from the mobile monolithic parts and not the Chiplets.
A monolithic ZEN4 8C 16T + RDNA3 iGPU APU at 5nm will be very small, close to 130-140mm2. In comparison Ryzen 6000 ZEN3+ (8C 16T) with RDNA2 iGPU is close to 210mm2 and the chiplet ZEN 3 8C 16T with IO die is 80mm2 + 125mm2 + interposer.
If im not mistaken, Core i3 12100 die is 165mm2.
So you can see that AMD with a small monolithic 8C 16T APU at 5nm could be able to have both a competitor to core i3 and to Core i5 13600K at a way smaller die (higher volume) and way higher iGPU performance. They cannot do that with chiplets or a single big 200mm2 APU they have today.
Also to note they need that small die for both Desktop and Mobile.
edit: So to sum up my speculation, I believe AMD will only use chiplets in Server this time and not in desktop.
You seem to be thinking 2 dimensionally. These are 2023 products when different stacking tech will be going mainstream (2.5D and 3D). The rumors on the gpu side seem to say that there will be an infinity cache base die with a compute die stacked on top; they may be 128 MB each. It looks like two of those (at least) might be connected with EFB. It is unclear how they scale to more (more EFB or IFOP style IF?). If the infinity cache die is a modular thing used all over the place, then it is plausible that they would make a device with two base die connected by EFB, one with a gpu chiplet and the other with cpu chiplet(s). Given the wording, it seems like it will be at least 16 cores. If the base die can hold 2 cpu chiplets, it may be plausible to do one high clock 8 core and one low power 16 core die. This may be wild speculation though.
AMD will almost certainly be using more APUs in the desktop space, but I think they will have a chiplet based product available. They will be making massive numbers of chiplets for Genoa, so using them in some high end desktop parts is very likely. They might only be in the Ryzen 9 series though. I have wondered if they will do something even stranger and design the desktop IO die to be connected together with a second die via an EFB link. This would allow them to make very cheap Threadripper and workstation parts with double the core count, memory channels, and IO vs AM5. That would preferably be in a new intermediate socket between AM5 and SP5. They wouldn’t have to use massive SP5 IO die on much cheaper products.
It may also be possible to connect two APUs with an EFB link. That is what the Apply M1 Ultra seems to be. If they have a big APU with 16 cores and a good sized gpu, then the high end version could just be 2 of them hooked together for ridiculous core counts never seen before in a mobile processor. Apple has 20 cores in the M1 ultra, right? That isn’t really a mobile chip yet. Although, If they have some kind of modular, stacked infinity cache based solution coming later, then such an in between product may not make sense.
If you start taking 3 dimensions into account, then you can come up with some really crazy speculation, but people don’t seem to realize that some of this has already been done (Apple M1 Ultra). It doesn’t seem that unlikely that AMD would do something similar.