Question AMD Phoenix/Zen 4 APU Speculation and Discussion

[uzzi38]

I can finally make this thread.

https://twitter.com/i/web/status/1519669375283957760

Phoenix is indeed RDNA3. My advice to everyone: treat the old APU rumours as being out of date.

 

[adroc_thurston]

AMD does not really have the volumes at which creating new dies with all their associated costs is a rounding error.

They do, besides those past 3-4Q's where they've been aggressively undershipping to prevent margin contraction.

Also, the thread of messages touched above on APUs that could encroach on the territory of notebooks with a separate dGPU die.

Well that's like, the whole idea of Strix-halo yes.

 

[Joe NYC]

I think the ultimate goal would be similar to this graphic that (somewhat ironically) Intel showed some years back. Not just CCD level granularity, but core level granularity.

View attachment 82883

Of course, practically speaking, there are a whole host of challenges to such an idea, and it's for many of the same reasons that you don't see 100% reuse of dies even today. There're always going to be tradeoffs that make sense for one market but not another.

Yeah, that's a really good stab at what a future CPU MCM might look like.

In theory, if a 2x2 square on the picture is a separate die, it would indeed be the ultimate in modularity.

Like, you call the monolithic APU dies a waste, but clearly Dragon Range shows there are challenges with just reusing their existing compute dies. Mobile is certainly high enough volume to justify the extra design/manufacturing effort. Maybe future packaging breakthroughs can help close the gap.

The low end APUs will remain monolithic. But mid to high end? Looks like Intel has clearly decided to go in chiplet direction with MTL and ARL.

The part where, I think, Intel is not being ambitious enough is that the CPU is always one die, and Intel is planning up to 5 CPU dies in different configurations for Arrow Lake (according to MLID). As opposed to having, say 8 big core chiplet, 8 little or 16 little core chiplet.

The packaging technologies are falling in place. I think MTL with (active) silicon interposer will leapfrog AMD Dragon Range approach.

Following this, I think AMD will leapfrog Intel with similar approach, but replacing interposer with N6 base die, replacing micro-bumps with hybrid bond 3D stacking.

 

[adroc_thurston]

with (active) silicon interposer

It's not active, just a passive 2.5D slab with eMiM's.
TSMC offers the same thing for CoWoS-S.

Following this, I think AMD will leapfrog Intel with similar approach, but replacing interposer with N6 base die, replacing micro-bumps with hybrid bond 3D stacking.

Yeaaa about that, hybrid bonding is absolutely unsuitable for mobile volumes.

 

[gdansk]

Yeaaa about that, hybrid bonding is absolutely unsuitable for mobile volumes.

lol AMD mobile volumes. that's a good one

 

[adroc_thurston]

lol AMD mobile volumes. that's a good one

Yea they are (or well, were) pretty real before AMD decided to shut the tap off.

 

[Joe NYC]

In my opinion the main thing about modularization is the tradeoff between die size and overhead, i.e. area needed for additional I/O necessary to connect the broken up dies. AMD stated that with Zeppelin the overhead was ~10% that could have been saved going monolith. With SPR with its abundant use of EMIB the overhead is around ~21%.

So the smaller the pieces, the more pieces, and/or the faster the interconnect the bigger the overhead likely is to be.

APUs for mobile are ideally small in area for mass production, power efficiency and cost. Whether there truly ever is a chiplet strategy that works well within those limits remains to be seen. Personally I expect monolithic dies to remain relevant at the lowest end. The product range split between Phoenix and Dragon Range already shows where that line may be drawn even in the future.

With 3D stacking, hybrid bond, the die size overhead for connectivity is likely very low single digit, could be as low as 1%. So, this technology can bring modularity to another level.

For example, V-Cache is ~ 35 mm2 die size and it is a viable die, viable modularity.

Mainstream APU die sizes on a competitive process node are ~200 mm2 for Rembrandt and ~175 mm2 for big Phoenix. In order to get a desktop performance level somewhere between x50 and x60 class would be +100mm2. To go from 8 big cores to 16 big cores would be +75mm2. Extra LLC / L3 would also be useful here.

Next couple of generations will be interesting to watch...

 

[gdansk]

Yea they are (or well, were) pretty real before AMD decided to shut the tap off.

Yeah I guess they have to design for the possibility they'll actually make the part in quantity. Just hasn't been happening lately

 

[adroc_thurston]

Just hasn't been happening lately

Margins, margins are the key.

With 3D stacking, hybrid bond, the die size overhead for connectivity is likely very low single digit, could be as low as 1%. So, this technology can bring modularity to another level.

Yea but HB is kinda a slow and expensive process (for now) to be applied in mainstream mobile (or mobile in general).
uBump 3D like SoIC-P is more suitable.

 

[Joe NYC]

It's not active, just a passive 2.5D slab with eMiM's.
TSMC offers the same thing for CoWoS-S.

Where is the memory then? According to some leaks, there is supposed to be some memory on it, perhaps eDRAM?

Yeaaa about that, hybrid bonding is absolutely unsuitable for mobile volumes.

This would be 1-2 years from now (1-2 years of TSMC ramping up production capacity), upper half of the market, and for AMD only. So about 10% of the mobile market. Which should not be a problem.

 

[adroc_thurston]

Where is the memory then?

There is none.

perhaps eDRAM?

Literally not an option on newer nodes.

This would be 1-2 years from now (1-2 years of TSMC ramping up production capacity)

Still way too slow.

So about 10% of the mobile market

AMD mss in mobile is a lot, lot higher than 10% whenever they actually ship.

 

[Joe NYC]

MLD claimed 2.5 months ago that STX-Halo has 16 Zen5 cores + 40CU IGP(GPU) + 32MB cache + 256bit LPDDR5x, don't know what is true and what is not.
If It really has LPDDR5(x) then we can forget about expanding memory and there is still the question about price of this product.

You can forget about expanding your dGPU memory on every graphics card as well. And they sell quite well. You just get a graphics card that has the amount of memory you want.

I think Apple is using 8 GB chips. So, if AMD were to use them as well, it would be up to 32 GB, which covers a lot of ground.

 

[Joe NYC]

There is none.
Literally not an option on newer nodes.

So, the rumors some sort of memory on the interposer were completely false?

While it would have been surprising, it would partially explain the additional cost of interposer (adding some benefit) that Intel will incur starting MTL...

Still way too slow.
AMD mss in mobile is a lot, lot higher than 10% whenever they actually ship.

I said upper half of AMD volume, which could be 20% total, half of which would be 10%. So, in a very broad range of 10m to 30m per year.

Does not seem that far fetched to me.

 

[adroc_thurston]

So, the rumors some sort of memory on the interposer were completely false?

No.
It's not for MTL, though.

I said upper half of AMD volume, which could be 20% total, half of which would be 10%. So, in a very broad range of 10m to 30m per year.

Yea that's still wayyyy too much for the current and near-future state of SoIC-X.

 

[TESKATLIPOKA]

You can forget about expanding your dGPU memory on every graphics card as well. And they sell quite well. You just get a graphics card that has the amount of memory you want.

I think Apple is using 8 GB chips. So, if AMD were to use them as well, it would be up to 32 GB, which covers a lot of ground.

I am talking about system memory, and 32GB is not a lot If you also have to allocate a portion of It to the IGP. If this really will have 32-40CU then you will certainly want to allocate at least 8GB. I can imagine that there will be also a 64GB option, but that price won't be cheap for certain.

edit:
@adroc_thurston: 48GB looks like an interesting compromise to me.

 

[adroc_thurston]

I can imagine that there will be also a 64GB option, but that price won't be cheap for certain

24Gbit L5X exists so 24/48GiB configs will be a thing, too.

 

[Joe NYC]

I am talking about system memory, and 32GB is not a lot If you also have to allocate a portion of It to the IGP. If this really will have 32-40CU then you will certainly want to allocate at least 8GB. I can imagine that there will be also a 64GB option, but that price won't be cheap for certain.

Which brings up a question why Windows does not support Unified Memory access (which Apple does support), which allows for better utilization of existing memory (no need to pre-allocate memory for GPU) and also reduces duplication of items being in both main memory and graphics memory.

 

[TESKATLIPOKA]

Which brings up a question why Windows does not support Unified Memory access (which Apple does support), which allows for better utilization of existing memory (no need to pre-allocate memory for GPU) and also reduces duplication of items being in both main memory and graphics memory.

I know the answer!
Because It's Windows.

 

[adroc_thurston]

which allows for better utilization of existing memory (no need to pre-allocate memory for GPU)

Apple still does this, don't be silly.
A framebuffer is a framebuffer.

 

[moinmoin]

It's nothing like Dragon/Fire/whatever Range.

It's obvious that the chips are nothing alike. I'm always talking about the cost to produce them and their positioning on the market. So you mean STX-Halo is lower or higher budget/margin than Dragon/Fire/whatever Range? Sounds like higher so far.

Two monolithic dies (one smaller one bigger) would serve 90% of PC buyers. The modular solutions really only make sense for those in the niches

We agree. I can't really see monolithic dies going away for the same reason. At best the premium section at the top end of the mobile market will be expanded with non-monolithic products, like currently Dragon Range, and likely the STX-Halo androc refers to.

AMD does not really have the volumes at which creating new dies with all their associated costs is a rounding error.

Today's AMD should easily be able to shoulder the cost. At this point it's very likely more about increasing margins and simply doing sensible business planing than just about saving every possible penny.

Yea they are (or well, were) pretty real before AMD decided to shut the tap off.

Should start up again in H2 (at which point AMD expects the warehouses to be finally cleared going by their statements in their Q2 earnings call), shouldn't it?

Margins, margins are the key.

Or not?

AMD mss in mobile is a lot, lot higher than 10% whenever they actually ship.

What does mss stand for?

 

[adroc_thurston]

Sounds like higher so far.

Of course it's higher, being the ultra-premium APU (halo is literally in the name).

Should start up again in H2 (at which point AMD expects the warehouses to be finally cleared going by their statements in their Q2 earnings call), shouldn't it?

They're hoping for PC market being stronger H2 but they're bets mostly lie in data center.

Or not?

Yes Lisa's been saying literally that on ER calls for a few quarters already.

What does mss stand for?

Marketshare.

 

[moinmoin]

They're hoping for PC market being stronger H2 but they're bets mostly lie in data center.

Where they obviously should be. I don't see AMD moving away from "server first" anytime soon.

 

[adroc_thurston]

I don't see AMD moving away from "server first" anytime soon.

Yea it's a way easier market for them since Intel are hapless toddlers in data center plus a lot more leeway for margin plays.
Client is still very cutthroat ever since Intel started flooding the channel in Q3 last year.

 

[gdansk]

Server should be their focus but it won't be the money printing machine for AMD that it was for Intel. There is serious non-Intel competition now. So they can't get too crazy in their margins. Or can they? Who knows. Maybe Zen 5 is the second AMD messiah (K8, Z5?)

7840U laptops are few and not worth buying. And that's what concerns me now.

 

[adroc_thurston]

but it won't be the money printing machine for AMD that it was for Intel

But is will be.

There is serious non-Intel competition now

whomst.
Neoverse roadmap is low-key a joke and was funded with Masabuxx and ARM will inevitably jack licensing costs up to 11 once they IPO.
Ampere is lol.
Nuvia server product got killed by Qualcomm.
who else left?

Maybe Zen 5 is the second AMD messiah

It's just a really-really solid core in the age of no one else making really solid cores.

 

[gdansk]

whomst

Ampere is not great but selling. Must be cheap? Graviton is popular because of AWS's pricing. Possibly Grace for certain niches. Some random Chinese retailers even have their own CPUs. Okay that last one is a joke.

It's just a really-really solid core in the age of no one else making really solid cores.

Well I'll buy some if so. We are slightly off topic so I'll end this here.