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Discussion in 'CPUs and Overclocking' started by monstercameron, Oct 31, 2014.
took me all night but here is the dump at 1.4Ghz locked frequency
Excavator supports 256-bit AVX2 instructions, but it needs to split them up into 2 micro instructions. So any 256-bit AVX2 instruction will look worse or be a wash compared to 128-bit AVX/SSE.
Thank you. Works better now.
AVX2 as AVX is less flexible to decode and handle than XOP. The latter has the advantage of 3 operand encoding over SSE.
Nice catch. I've come across posts by the stilt a lot he does good work.
Shame to see the avx/avx2 score poorly, but the xop speed makes up for it I guess.
On another note the linux software raid is said to utilize avx2 for large speedups.
If you're into coding and instruction latencies on different CPUs interest you http://www.agner.org/optimize/ agner has some nice code, his data has been used for the instruction choosing in gcc.
A SW RAID with AVX2? Ok, maybe for faster mem copying and some data processing. But anything 128b wide should be enough. as this would already max out the mem subsystem at some xy GB/s, enough for a bunch of parallel hard drives or SSDs.
On boot it benchmarks the various supported types, sse, sse2, avx, avx2, etc. and chooses the fastest.
wiki says "required AVX2, AVX is not sufficient" just why I mentioned this.
that's the avx2 commit dunno how it'd fare on carrizo if we had a desktop version to test.
Output from a recent intel:
[ 0.165172] raid6: sse2x1 5136 MB/s
[ 0.182199] raid6: sse2x2 6378 MB/s
[ 0.199230] raid6: sse2x4 7460 MB/s
[ 0.216267] raid6: avx2x1 9906 MB/s
[ 0.233299] raid6: avx2x2 11382 MB/s
[ 0.250332] raid6: avx2x4 13363 MB/s
[ 0.250333] raid6: using algorithm avx2x4 (13363 MB/s)
[ 0.250335] raid6: using avx2x2 recovery algorithm
Sorry for the distraction, Just a random detour of the thread I guess.
Right. I've heard of that before. Theoretically, I think someone coding with an AVX/AVX2 target could compensate for the Construction Core requirement that 256-bit SIMD instructions be split without specifically resorting to xOP, but I'm not experienced enough to know more about that. Something coded specifically with AVX/AVX2-capable Intel processors in mind will not offer such compensation, forcing XV to split the instructions in hardware.
Yes, he does. He was rather gracious in providing data on those few FP benchmarks that I requested of him (at static clockspeeds no less). XV actually shows quite a bit of improvement over SR in anything that (apparently) relies upon some of the more-recent x86 ISA extensions.
I have heard of Agner's. I'm too much of a neophyte to make effective use of that right now.
Some clockspeed numbers (from Stilt) in Prime95 Large FFT using the FX-8800P:
20W cTDP= 1990 Mhz
42W cTDP= 3050 MHz
Extrapoltaing from the chart below, two modules @ 10W cTDP would have come out to be ~1540 Mhz.
So XV has ~78% of the clockspeed at 5W module compared to 10W module.
Furthermore, XV is greater than 20% faster than Kaveri @ 5W module and slightly less than 10% faster than Kaveri @ 10W module. At 4W module, it looks like the XV clockspeed (probably around 1375 Mhz) increases to ~30% faster than Kaveri.
So the strength of the XV design (as we have read many times before) is at low power consumption. However, If that marketing graph holds up in real life the gains are most pronounced at 5W module and particularly 4W module.
So at 4W per module, I wonder how these XV micro cores compare to cat cores at the same power consumption?
Pass Mark when the machine is drawing from battery (not AC power)?
P.S. Here are some existing results, but we don't what TDP the majority were run at:
In the contrast to the 28W Haswell 13" Mac Book Pro and 47W 15" Haswell 15" Mac Book Pro (both shown above) we have the 4.5W Broadwell 12" Mac Book Retina (shown below):
Since the chip is so low power it doesn't need a fan and notice the small size of the system board PCB (Core M located on the far left outlined in red, below):
And the small heatsink for the Core M processor:
So what is a good balance of TDP between the graphics and CPU cores for general gaming? Seems like 800 MHz on the graphics is pointless if the CPU cores can't reach 1 GHz because of such a low cTDP in all of the available Carrizo notebooks I've seen available to the US.
Just had a look at the code. They use a lot of AVX2 logical and add operations. With these instructions Skylake has 2x to 4x the throughput of Carrizo.
Dead End Enigmatic carrizo
it seems oems, consumers and even AMD don't care about carrizo. The crazies like me can't sustain it.
Carrizo would be a pretty good budget media chip if it was allowed to use higher TDP and paired with better screens and chasis. So far, I've only seen it in the Toshiba Radius and that one HP Envy model with freakin' 1366 x 768 monitors, HDDs, and locked to 15W TDP. It's being treated like a budget chip even though it seems to be giving i3s and i5s a run for their money.
Funny enough, I went to HPs website to build an AMD Envy 15z laptop, and the A10-8800p could not be paired with a full HD screen, only the 8700p. Also, the 8 GB option is only 1 DIMM, (6 GB is 2 + 4 GB Dimms) and there is no SSD or even hybrid drive option. I'm starting to think there is deliberate sabotage going on via contracts with Intel.
Occam's Razor. The interesting bit is that there are some more configuration options available to European buyers for these chips than there are for North American folks. It was the same way with mobile Kaveri, more-or-less.
Occam's Razor is that people are stupid. That's usually the correct reason.
No doubt AMD need to pull a Chromebook Pixel if they're ever going to get their best reviewed and loved. Design a premium product in house, not for the profit, but to redesign public perception and challenge OEMs.
*waits for purile arguments from anti-AMD-superfriends*
Enough already !! us AMDhopeians should apply for a job at AMD for sure now
No, Occam's Razor states that:
"Among competing hypotheses, the one with the fewest assumptions should be selected."
We have no direct evidence that anyone involved in selecting Carrizo laptop configurations is fundamentally stupid (and plenty of evidence points to the contrary), so that conclusion requires (potentially erroneous) assumptions on our part. If you will observe the above complaints about Carrizo configurations, the logical conclusions are that OEMs are being cheap/lazy or that they're being "encouraged" to deliberately misconfigure Carrizo. The former argument holds less water since OEMs are raising BoM needlessly with dGPUs, and since the difference in 15w and 35w cooling configurations often amounts to little more than a few fans (read: not a significant increase in BoM).
In other words, it would have been easy for OEMs to permit 35w configurations on Carrizo chips by simply cutting the dGPUs and adding the required fans, which presumably would have reduced BoM overall and would have significantly improved end-user experience. The remaining margin could have gone to changing 1x8GB RAM configurations to 2x4GB configurations, again improving user experience.
I don't think they're hiring, unless you're willing to work at maybe half the industry standard and happen to be among the best in your field.
You look at Intel configurations, and they come by default with 1 8MB DIMM, with a 12GB dual channel option, and then you see a Carrizo configuration, and it's not that different. So instead of thinking "hey, they're just doing something similar to what they do with Intel" you think "Intel must be doing something behind the scenes to sabotage AMD" and then claim that you need fewer assumptions for that.
Perhaps "people are stupid" wasn't the right way to say it (it's just the underlying truth, and perhaps 'ignorant' is a better word). HP (as an example) is selling the configurations it thinks will sell best and earn it the most. Most people have no clue about dual channel, and have no clue what AMD is. From HP's point of view AMD is simply a way to provide reasonable power CPU's for a low price to non-discerning customers. Battery life is a bigger selling point than "CPU/GPU power", and 1 DIMM is cheaper than 2 DIMMs. The assumption that Intel gets in the way requires the assumption that it makes financial sense for HP to sell more powerful AMD laptops in the first place.
You speak as though DIMM configurations are the only problems inherent to these Carrizo laptops.
Well, mostly. The main other complaint I see is that they're only 15W and not 35W, but AMD has been pushing the chips as low power chips, that's what they mainly talk about in their presentations. So why would you need Intel to explain that OEM's are using this configuration? And again, battery life is a bigger selling point than computing power and the Intel configurations of these laptops also have 15W versions.
Really, I haven't seen anything that can't be explained by actual logic (i.e., OEM's making choices based on their understanding of the market), and though I did call this 'stupidity', that simply because what sells well (or OEM's think sells well) isn't necessarily what takes full advantage of the technology. (Although if AMD is to be believed, running the chips at low power is precisely what takes full advantage of the work it's done.)
I'm sorry but if you think a secret conspiracy between Intel and OEM is in line with Occam's razer, you're completely misapplying it.
If we accept Occam's Razer, that the simplier answer is the better answer, we can conclude that OEMs don't prioritize AMD laptops because consumers don't prioritize AMD laptops.
Your explanation introduced a third party, Intel, needlessly.