amd6502
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- Apr 21, 2017
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Nah, the patent refers to "low power", so that rules out Bulldozer.
On <7nm PD would be low power. But I suppose high frequencies wouldn't be needed, so something like Jaguar would fit well.
Nah, the patent refers to "low power", so that rules out Bulldozer.
AMD will probably wait for 12FDX with Tsoi=5nm and Tbox=15nm(~7nm FDSOI ref. target) and denser Cx/Lg option. (~2021-2024 timeframe)
I doubt anything related to Zen4 will use GlobalFoundries. It will be all N7-related IOD and N5-related CCD.Or they will probably continue to use TSMC FinFET and GAAFET...
Zen2 onwards are all mini-cores w/ high frequency optimization. The only solution AMD has is different physical implementations. With hi-perf core being second most dense track lib and low-power being most dense track lib. They would probably also cut off YMM/ZMM registers off to only support 128-bit length.However, if it's Zen, what mini core would they tightly integrate within a Zen cluster? I guess something Jaguar-like is most plausible.
The only one that competes/succeeds Stoney is https://www.amd.com/en/products/apu/amd-3015eAt 6W and that pricing, this will throw Atoms and Stoney Ridge APU where they're belong. In the bins. Forever.
Zen2 onwards are all mini-cores w/ high frequency optimization. The only solution AMD has is different physical implementations. With hi-perf core being second most dense track lib and low-power being most dense track lib. They would probably also cut off YMM/ZMM registers off to only support 128-bit length.
Different track height
Different native SIMD length.
They don't need a from-scratch architecture to do pure low-power on leading edge FinFET/GAAFET.
The only one that competes/succeeds Stoney is https://www.amd.com/en/products/apu/amd-3015e
FT5 from FT4
Up to DDR4-1600 from up to DDR4-1866
1.2/2.3/0.6 GHz from 1.8/2.7/0.72 GHz
150 mm2 from 125 mm2
$219 for 1366x768 and $299 for 42 Wh battery from $299 for 1080p and 57 Wh battery
22FDX w/ optimization => ~100 mm2 (Stoney-shrink) [Capable of 7nm FinFET perf]
12FDX w/ optimization => ~53 mm2 (Stoney-shrink) and ~116 mm2 (Raven2-shrink) [Capable of 5nm/3nm FinFET perf]
Also, Lenevo isn't selling in the peoples interest anyway;
^== $299 in webLenovo 14w | School Laptop for Teachers
The Lenovo 14w Windows is designed for students and teachers. Able to run all day, this fast 14-inch rugged laptop gives you access to thousands of educational apps at the Microsoft Store - making it a great choice for students, teachers, and school administrators.www.lenovo.com
^== $319 in webNew Lenovo Chromebook 300e | Classroom-ready 2 in 1
The New 300e Chromebook offers endless possibilities for learning. Classroom-ready with a 360-degree 2 in 1 design, HD touchscreen, & AMD processors. FREE SHIPPING.www.lenovo.com
^== $214 in web (only one remotely sane for the price, but heck I'm going on a limb that it should be $149.99 or lower)New Lenovo Chromebook 100e | Classroom Chromebook
Built for the rigors of classrooms, the new 100e Chromebook is a learning tool with AMD® processors, rubber bumpers & reinforced ports & hinges. FREE SHIPPING.www.lenovo.com
All cases it is the full part for 28nm. However, it is a salvaged part for 14nm. Either get no SMT or no dual channel, even then I wouldn't trust Lenevo to actually do dual channel. With what SMT is actually meant to do probably means the FT5 model will be better.
Whacky issues at Malta as it goes for more mature nodes. Or, go for stable Dresden as it gets 12FDX up.
lpddr5 gf 22fdx IP core / Semiconductor IP / Silicon IP
D&R provides a directory of lpddr5 gf 22fdxwww.design-reuse.comApparently, there is LPDDR5 there.芯动科技 - 芯动,您的芯片定制专家
芯动科技,业内率先推出14nm高速混合电路IP和IC产品。业务涵盖各种混合高速电路IP设计,还涉及高清ISP芯片、移动多媒体、加密电子货币、高安全物联网、高性能计算等,支持SMIC、TSMC和GF从180nm到14nm的全部制程。www.innosilicon.com.cn
And, there is with Synposis;
LPDDR4 multiPHY V2 - GF 22FDX
LPDDR4 multiPHY V2 - GF 22FDX18 for Automotive Grade 1
125 deg C ambient operating right there.
It is still cheaper to buy the Excavator part. It would be even cheaper for a 22FDX part or a 12FDX part w/ same spec as the Excavator. However there is signifigant room to remove the server-orientated optimization in XV. Producing a cheap core on a controllable(SOI/channel width, SOI length, SOI depth, etc) low-risk/low-step/extremely-high volume process.I will take salvaged 2/2 or 2/4 14nm Zen APU any day+a slap in the face.
Are we now complaining about Zen based 6W Athlons vs full great Excavator 28nm 6W TDP APU.
Fam15h is pretty much done, I've been implying that another family w/ CMT improvements are planned. Atom Bonnell being the closest earliest example and Centuar's CNS being the latest closest example of an unified execution core. Then, the front-end and back-end are expanded across all planned execution cores, etc. However, unlike Fam15h which were uplifted to do server work w/ long-slow interconnects/memory, the new core is client-orientated w/ short-fast interconnects/memory. Which means less inflight instructions, and lower TLB, BTB, L1i, L1d, L2 sizes. Which can lead to a better Perf/Watt envelope than with fatty XV.Nosta, I think Stoney as it is is on its way out. A process redesign alone isn't going to cut it, as dual thread demand is already a bit niche and it will only get more so over the next few years. A Stoney refresh isn't going to compete with cheap 28nm mediatek quadcores tablets/2-in-1's, either in price nor in perf/watt, and it is in about the same performance range. So that really limits things and explains why Dr. Su minimized investments for the extreme budget end.
Unless it makes sense to tinker and put out a semi-experimental big-little hybrid core and work things out (design and software pipecleaner) on a cheap project with a node like 28nm or 22fdx.
Does anyone have a dieshot of Stoney Ridge?
I can't tell if Stoney Ridge is its own silicon, or if it's just Bristol Ridge with a deactivated module.
Edit: Found this article claiming the Stoney Ridge die is 124 sq. mm, while the Bristol Ridge die is 250, but it's the only source I have.
Does anyone have a dieshot of Stoney Ridge?
I can't tell if Stoney Ridge is its own silicon, or if it's just Bristol Ridge with a deactivated module.
Edit: Found this article claiming the Stoney Ridge die is 124 sq. mm, while the Bristol Ridge die is 250, but it's the only source I have.
This article: https://www.anandtech.com/show/10362/amd-7th-generation-apu-bristol-ridge-stoney-ridge-for-notebooks Has slides with marketing images of the BR and SR chips. They're renderings, not photos, but you can see that SR is meant to be significantly smaller.
Edit: Also see this Reddit post.
There's a first! Someone shared an old reddit post of mine
The last of the Family 15h architectures. The rumored dieshrink was speculation on the capabilities of 22FDX.So... are A6-9220C and A4-9120C the last of the excavators?
I was kinda hoping for the rumored dieshrink. I like my 9220C-powered 14w.
The last of the Family 15h architectures
CPU Design Engineer 2 for AMD @ Orlando, FL:
...
- Work with a team of architects for developing new innovative embedded RISC-V CPUs.
- ....
I don't think so. AMD would find a way to get ARM just like they did for x86. If customers wanted AMD to compete with ARM server processors within ARM space.Is this broadening the portfolio in case the Softbank ARM deal goes through with Nvidia?
On that note I wonder when we get info about the now current agreement. The last one from 2019 should have run out with the last month, and the IR places all still reference no new agreement for the remainder 3 years of the WSA.in regards for GlobalFoundries WSA
The last of the Family 15h architectures. The rumored dieshrink was speculation on the capabilities of 22FDX.
Which can support direct retapeouts from 28nm/32nm/40nm/45nm with continous transistor length from it's planar transistor structure.
It can also do a shrink new tapeout with lower complexity than that of shrinking it down to 14LPP/12LP/12LP+.
Both of which help keep the price below the ~$36 price of consumer Stoney Ridge and previous-gen Sempron Kabini products.
With that, my current folder of the hunt of the x2FDX/Embedded successor of the Stoney Ridge series has led me away from x86-64.
CPU Design Engineer 2 for AMD @ Orlando, FL:
The Person
A self-motivated CPU enthusiast. An effective team player who focuses on collaboration, team building, mentoring, and furthering team success.
Key Responsibilities
Perferred Experience
- Work with a team of architects for developing new innovative embedded RISC-V CPUs.
- Identify complex technical problems, break them down, summarize multiple possible solutions, and help the team make advances in Performance, Power, and silicon Area (PPA).
- Understand and improve existing and emerging graphics/compute paradigms and new APIs employing RISC-V Processors.
- Work with subsystem architects to understand bottlenecks and other problems where an embedded processor will improve the performance.
- RISC-V
- Verilog
- VHDL
- C++/Python