- Sep 18, 2011
I think that implies beyond just developing RISC-V CPU work, it might move towards other RISC-V implementations of GPU/NPU/PSP/ACP/etc.Note the mention of graphics in there. This is designing cores that are embedded into the GPU, not a standalone CPU product.
The mention of graphics includes stuff like RV64X[X extension of V extension]/Simty. The mention of compute includes a RVV co-processor in the vein of Centaur's NPU, etc.
Note the distinction between CPUs and Processors:
- Work with a team of architects for developing new innovative embedded RISC-V CPUs.
- Understand and improve existing and emerging graphics/compute paradigms and new APIs employing RISC-V Processors.
Today: CPU+Graphics+Compute => Physically Unified(on the same die) yet Logically Separated(Differentiated programming model, unique compilers, multiple instruction sets)
Tomorrow: "+"+" => "(") and Logically Unified(Unified programming model, shared compiler, single instruction set)