AMD Bristol/Stoney Ridge Thread

[NostaSeronx]

What are you basing this on? The only implementation of CMT that we have seen sucked in the real world. Yes, I'm sure there are some old academic papers arguing that CMT would be wonderful, but in actual implementations it was an inefficient mess. AMD ditched it for a reason!

Only recent 2012 research...
IBM's POWER9
AMD's Excavator: Derived from Bulldozer.
Intel's Folsom(Now NGC at Hilsboro) VISC core => Lead by the Architects/Designers of Bulldozer-Excavator.
=> TSMC 16nm taped out and Intel bought it out.

IBM's POWE9 CMT => No shared resources just shared area in SMT4, with a toggle option to SMT8 which fully shares resources.
The VISC CMT => No shared FPU resources, as the instructions from a single logical thread can be deployed to multiple phyiscal cores. Has shared front-end and shared back-end(retire and load-store).

The research defines a CMT core like Excavator in ULP scenarios would consume 1/4th or less power than a single SMT core. <-- 2014-2017
// This is the main component of why modern architecture is forced to get clustered or get left behind.

for a lot of reasons.
If Nosta really need ultra low power APU, just use that Banded Kestrel platform and dial back CPU clock to sub 2GHz, cut 1 CU, and voila. You would have sub 3w APU which would thrash any BD-derived core on same power envelope.

If we are to extrapolate some numbers based on Techspot review the Athlon 200GE, aka R3 2200U, allow for 1.6-1.7GHz@5W and 1.2-1.3GHz@3W, dunno why they would need to shrink XV given the cost and that a better solution, perfs and cost wise, is readily available...

Clock-rate is important in such a design. sub-3W while maintaining a 3 GHz or even extending to a 4 GHz boost is required. A Ryzen 2200U-derivied <6W SKU might have to forgo a turbo clock to achieve the same envelope as a 22FDX core.

22FDX with CMT is the best solution:
- Limited cost from 28nm Bulk and Excavator design.
- Much higher performance than bulk
- Much lower power than bulk.
- Overall cheaper than pulling down high ASPs to fit into low ASPs. Since, the design would be low ASP from the get go on a lower costing process.
- A happy GlobalFoundries is a profitable GlobalFoundries.

There is also 12FDX when the big things start to happen.
"Dual-STI enlarges the range of the back-biasing capability, which is a key feature of FDSOI. In this work, we propose for the first time a unified technological solution to co-optimize both the stress and the back-biasing efficiency for 10nm UTBB FDSOI, using a so-called Dual Isolation by Trenches and Oxidation (DITO).
DITO however enables a bidirectional back-bias on the same device while single-STI is limited to FBB range in flip-well architecture (and RBB in regular-well one). DITO can thus achieve a large range of performance/leakage according to the back-bias"
https://i.imgur.com/K5KD6Cl.png
^-- 22FDX+ also gets it.

 

[dark zero]

Sorry, but CMT is dead for AMD and Mediatek better use 12nm on their chips on all the tiers.

Heck, even their entry Helio A22 sells well!

 

[NostaSeronx]

Sorry, but CMT is dead for AMD and Mediatek better use 12nm on their chips on all the tiers.

Heck, even their entry Helio A22 sells well!

The two lead customers on GlobalFoundries 22FDX are Qualcomm and Sony. Only Qualcomm really matters in the case of SoCs that go to consumers.

Ideal case is a successor to
Snapdragon 205 => Nokia ~100US$ and Smartfren/Jio/Micromax/Megafone ~20-40US$ and Cat B35 ~??$
Particularly, Smartfren... which is rushing into a 5G market. Taking their feature phone and getting a better SoC out of it for that low cost.
Cortex A32 at 0.25 mm squared; 4 milliwatt @ 100 MHz; 75 milliwatt @ 1000 MHz, on 28nm.
Integrate the PMIC with HVMOS 3.3V-6.5V on 22FDX.
Integrate the RF(-5G), all of it on 22FDX. (Except, antennas)
Can use a higher end Adreno GPU without busting power budget.
- Use radiation hardened SRAM and logic design.
- Use -auto PDK for hot temperature support.
- Optimized for -cyro for cold temperature support.

In the case of AMD, CMT(XV-successor)/22FDX is the best bet for sub-$200 PCs in an envelope-sized PC or in not a smartphone-mobile PC.

https://browser.geekbench.com/v4/cpu/search?utf8=✓&q=a6-9220c
https://browser.geekbench.com/v4/cpu/search?utf8=✓&q=a4-9120c
Got to wait till these get out of style though.

 

[NTMBK]

The two lead customers on GlobalFoundries 22FDX are Qualcomm and Sony. Only Qualcomm really matters in the case of SoCs that go to consumers.

Sony are using it for imaging sensors, what's the Qualcomm target? I've not seen anything saying that they are actually using 22FDX.

In the case of AMD, CMT(XV-successor)/22FDX is the best bet for sub-$200 PCs in an envelope-sized PC or in not a smartphone-mobile PC.

Where the hell is the market for envelope sized PCs?! Zotac has been making pocket sized PCs for years and they haven't exactly been setting the world on fire.

You're grasping at straws, Seronx. There's no evidence that CMT is more efficient (no, POWER9 is not CMT), lots of evidence that the Bulldozer->Excavator line is an inefficient mess, and zero evidence that AMD is using either FD-SOI or CMT in any future products.

 

[amd6502]

Sorry, but CMT is dead for AMD and Mediatek better use 12nm on their chips on all the tiers.

That's not really true. There are plenty of uniprocessing cores, and all of these could get big uplift with CMT. For example, recently discussed x86 ZX series. Small cores, about the same amount of FPU transistors per core as Piledriver; yet drastically inferior single thread performance on the FPU versus Piledriver's flex FPU (reverse multithread).
https://forums.anandtech.com/threads/via-zhaoxin-kx6000-benchmark.2554199/

They could bring a low cost budget product like Nosta proposes; the economics would be about as good as Picasso-L, except it would be more interesting:

instructions from a single logical thread can be deployed to multiple physical cores. Has shared front-end and shared back-end(retire and load-store).

Maybe not what we expect the NG core to be, but possible interesting options to experiment with. A 4-thread CCX-lite based on one XV module. Each of the two XV cores has a low freq/low area core associated with it (jaguar/dozer hybrid) that would act as little 2nd thread; if the low frequency core needs to be fed, the XV core's 4-wide decoder could feed it at every other or every third cycle. Similar arrangement if the pair shares a flex FPU. Thread pairs do round robin for dibs on the XV (high frequency) core, giving highest affinity to low area core for the waiting and idling. This would be next gen CMT, which closes the gap with SMT for performance and efficiency, but has the advantages of smaller area (less transistors, less cost) and design simplicity.

If Picasso-L is already said and done, the above CMT could still be used in a K12 (acorn core) substitute and A1100 series successor or complement.

 

[NTMBK]

That's not really true. There are plenty of uniprocessing cores, and all of these could get big uplift with CMT. For example, recently discussed x86 ZX series. Small cores, about the same amount of FPU transistors per core as Piledriver; yet drastically inferior single thread performance on the FPU versus Piledriver's flex FPU (reverse multithread).
https://forums.anandtech.com/threads/via-zhaoxin-kx6000-benchmark.2554199/

They could bring a low cost budget product like Nosta proposes; the economics would be about as good as Picasso-L, except it would be more interesting:

Except you're neglecting the added complexity and power consumption associated with wiring the two cores together, and making a big shared unit with shared register file. The power consumption of one double wide FPU connected to two cores is going to be greater than the power consumption of two individual FPUs, because of this extra complexity. CMT has a cost.

 

[NostaSeronx]

Except you're neglecting the added complexity and power consumption associated with wiring the two cores together, and making a big shared unit with shared register file. The power consumption of one double wide FPU connected to two cores is going to be greater than the power consumption of two individual FPUs, because of this extra complexity. CMT has a cost.

Except, that isn't the only solution for AMD. The FPU isn't CMT in AMD's architecture. Module Multithreading => The FPU is SMT.

If they can make the decode/dispatch MT from VMT in Steamroller from BD/PD. They can dodge a ball! I mean they can redo the FPU unit like they did in Steamroller.

Instead of having the lopsided shared FPU, they can have a distributed/partitioned shared FPU;
2x FMAC / 1x MMX in 28nm
1x FMAC + 1x MMX *2 in 22FDX
Personally, I would aim for FP128 physical elements and have two FMACs: One big floating point FMAC and one smaller fixed point FMAC.
P0 in Core0/Core1 => All the packed floating point work
P1 in Core0/Core1 => All the packed fixed point work.
The initial hardware of the pipe 0 will be based off the pipe 1 unit, and pipe 1 will have the FPSTORE. This configuration can also target the 72-entry PRF size from Jaguar, rather than the 160-entry PRF size from Bulldozer. This would also allow both FPU clusters to use the 18-entry SQ from Jaguar as well. What keeps the same is the retire/rename which is the NSQ.
2x72-entry vs 160-entry
2x18-entry vs 60-entry
etc.

If shared, if both cores are running "FPU virus" then the FPU is private, but if one core is running "FPU virus" then the FPU is shared. The above would retain majority of the FPU performance of Bulldozer/Piledriver. While, reducing area by >33~50%. Any changes to post-XV/15h with retaining of cluster-based multithreading would be aimed at reducing it's area and power by any means. Overall, that means looking at and investigating improved Cluster-based Multithreading designs.

If ST-Ericsson can get a A9 core and a A15 core to 3 GHz in a smartphone package. Then, AMD can revise from XV or create a new CMT core in low-power sub-10 watt. That retains the same frequency performance and reduces energy per cycle.

https://www.youtube.com/watch?v=WIZ21KFs08M <== Food for thought, and it requires two to get anything in higher demand.

 

[amd6502]

I think one thing is sure, if they do port to 22FDX, it wouldn't be worth it with just two threads. Either port a BR-L with a tiny 3CU, or port Stoney with two little accessory cat cores. BR-L on an advanced process would also be perfect for 35W and under desktops.

This google grunt you linked above looks interesting; bottom of the barrel computing on 4gb. I haven't heard anything about it.

 

[NostaSeronx]

Progress report:
1. AMD possibly taped-in a 22FDX+ design sometime in 2Q2018.
2. 22FDX+ is optimized for higher performance.
3. 22FDX+ total design kit should hit 1.0 before 1Q2019.

The list:
- 22FDX/22FDX+ is more skewed towards same performance at lower power. 22FDX+ has further increased performance at same power in regards to 22FDX.
- The average cost to OEMs should not exceed 40 United States dollars. As well as consumers if there is a socketed series.
- The worst upgrade is a rebranded core like VIA's Isaiah I/II to Zhaoxin's ZhangJiang/WuDaoKou/LuJiaZui. Which are all the same core on paper, but utilize different track heights, channel length, pipeline stages, processes, and micro-architecture software(BP/OoOE/etc) in practice.
- The best upgrade is a new core that retains CMT, but has a much better designed core for the 22FDX/12FDX set.
- In both upgrades the core is not named after a construction-related vehicle.

In the worst config:
- 22FDX+
- Rebranded Excavator(wider frequency range at lower power)
- Upgraded 3CU GCN(also, wider frequency range at lower power/Vega or Navi)
- Upgrade to VCN from UVD/VCE
- Infinity Fabric with potential of increased SoC bandwidth compared to Stoney Ridge's Onion3.
- increased DDR4 memory support from 2400 to 3600 MHz
- support for PCIe4.0
- insert RF modules: Bluetooth 5, WiFi N/AC(with potential for AX/WiFi 6), etc. <== Semi-custom on demand.
- Slight price bump from Stoney Ridge currently: $20 to $30 at worst.

Going to the best config:
- Two modules of rebranded Excavator or two modules of a new CMT processor.
- 3CUs to at most 6CUs
- 64-bit LPDDR5 support and potential for 64-bit DDR5 to at least 5000 MHz.
- Support for AX's 6 GHz addon with LAA support. <== Semi-custom on demand.
- Double the price of Stoney Ridge currently: $40+ at worst. But, basically compares to current extended Bristol Ridge production pricing.

22FDX(+) profit return rate is the same as 28nm. While providing the same performance/watt as 14LPP(12LP(v2)). Which makes the 22FDX solution provide the lowest risk for AMD.



--ot
Companies that are 22nm FDSOI and were 7nm FinFET at GlobalFoundries:
Advanced Micro Devices, Qualcomm, HiSilicon/Huawei, Spreadtrum/Unisoc, Mediatek

IBM and AMD and the above list told GlobalFoundries to can the 7nm node and focus on FDSOI.
AMD/QC are set for Dresden and HS/HW, ST/Uni, MTK are set for Chengdu. Chengdu top-tier is 2H 2019, and Dresden top-tier is 1H 2019.

 

[amd6502]

I'd think that a Stoney with one extra module (i.e. 3CU BR) would address everything, and on 22nm should be about the same size as Stoney. It'd be such a cheap port, and IMHO worth it for cost and perf+efficiency gains. I don't know how significant cost advantages would be over a native 2c/4t APU on GF 12nm.

I don't see the point of raising DDR4 frequencies that dramatically. These small iGPUs require little bandwidth; neither would the 4 CPU threads.

For AM4, they would make good budget additions, A6, A8, and maybe something like a graphics-less Athlon 990.

If they use a DDR3 compatible memory controller, you could get am1 and fm2+ an compatible Athlons.

For mobile and bga low wattage desktops, they address a vast range in the budget market.

 

[NostaSeronx]

I'd think that a Stoney with one extra module (i.e. 3CU BR) would address everything, and on 22nm should be about the same size as Stoney. It'd be such a cheap port, and IMHO worth it for cost and perf+efficiency gains. I don't know how significant cost advantages would be over a native 2c/4t APU on GF 12nm.

Raven2 and other 2c/4t zen+3cu vega price will remain where 200GE is at price-wise. The 12-nm/7-nm versions would most likely increase the price above $55. A chip on the 22FDX in general will be cheaper than a new 28-nm design and significantly cheaper than a 14/12-nm design.

If they use a DDR3 compatible memory controller, you could get am1 and fm2+ an compatible Athlons.

AM4 is the only platform for modern AMD designs. DDR4 is more supported by AMD. Going backwards isn't the goal of 22FDX. Going forward while reducing or having a stable price from 28nm is the goal of 22FDX.

28nm -> $20 (Stoney Ridge)
22FDX -> $10 to $20 (22FDX Stoney Ridge-derivative) => Latest info: 22FDX reduces area by 50%(for shrunk IP) and maintains same processed 300mm wafer costs as 28nm.
22FDX -> $20 to $40 (22FDX Bristol Ridge-derived cut A10-9600P/A10-9700-esque design)
OEM/Retail

Aggressive Budget, Essential, Casual orientated products. Not so much perfy as Zen, but significantly lower price. With a small SBC/dev board the SoC would cost around 1/5th the board price if its $100 like Rockchip and others. Pointing towards the $199 complete desktop and $299 complete laptop initiatives which 22FDX can do at low-risk.

Zhaoxin's KX-U6880 vs AMD's 22FDX chip wonder which will win.

 

[amd6502]

Zhaoxin's KX-U6880 vs AMD's 22FDX chip wonder which will win.

I think both the KX and a 22fdx BR-L would have different strengths (mostly MT advantage of KX vs sparse thread advantages of Bristol Ridge) but with 4 threads the Stoney successor would have plenty for MT for the next 5+ years. Both will make good low end APUs. A 2c/4t RR-L would also be a good alternative too, maybe not too much pricier to make than the 22fdx option.

As far as DDR3 it'll appeal as long as there is a DDR4 shortage; I think the stock of remaining fm2+ APUs and dies is nearly depleted. Same with AM1. So it would be a nice place for lower quality silicon to be packaged as gpu-less Athlons for these sockets. And there wouldn't be much competition in this niche market.

 

[amd6502]

Both of these are quite nice already

http://www.cpu-world.com/Compare_CPUs/AMD_A12-9720P,AMD_A9-9425/

But it would be pretty nice to lower the TDP even further, and especially the near idle and low utilization wattages. From what Nosta says 22fdx could probably do that in a big way.

On my 9720p, I unfortunately cannot his frequencies below 1ghz, not even close. I don't know why the dual core Stoney has such an advantage here (maybe a higher range would make cache coherency between modules more complex?).

Not counting boost states 1.4 is the lowest of the available (2.70 GHz, 2.30 GHz, 1.80 GHz, 1.40 GHz) for the A12 while the A9 would go well below 1ghz for the lowest p-state.

 

[NostaSeronx]

These are three slides that are more recent:

https://i.imgur.com/dqadI5f.jpg
Unit cost and investment cost

https://i.imgur.com/z0DmWWM.png
Performance/Power/Die from 14LPP, old stats 22FDX/12FDX has been given a boost via continuous transistor enhancement. (22FDX is probably more on par with 12LP/12FFC/11LPP now)

https://i.imgur.com/vhVxrj5.png
Capacity and variability

GlobalFoundries' 22FDX has lower risk compared to 14nm and 28nm.
Dresden and Malta both have 28-nm capacity.
Malta is the only fab from GloFo to have FinFET capacity.
Chengdu and Dresden have guaranteed 22FDX capacity, while Malta has potential for capacity with 22FDX. This is one fab over 28-nm capability.

An AMD design on 22FDX would probably be similar to 28SHP to 28A(Steamroller to Excavator) and/or 32SHP to 28SHP(Piledriver to Steamroller). While getting the general benefit of a shrink that costs about the same as a totally new 28nm design. Plus the performance of 14nm and power decrease of 12nm.

The two cases that make sense currently are...
an extension of 15h; NG2BD following the steps of Steamroller/Excavator towards more power-optimization. Recomplied XV at cheapest.
a completely new architecture that utilizes CMT and is compatible with bdver4 compiled code.

In both cases, there is increased performance potential with the reduction of HPC(Leaky) functions to move into ULP(Less-leaky) functions. Add UWAVFBS => ultra-wide adaptive voltage frequency body-bias scaling, which has a lot of room from low-power to high performance. Means that a core on 22FDX can probably fit more roles than a FinFET core can. Essentially, a 22FDX core does not need to use big-little, particular to ARM.

FX-9590 w/ 316 mm squared to 22FDX would be somewhere around 158+ mm squared. Remove the L3 cache and note post-XV(enhanced shrink or new core-module), not Piledriver shrinked. 5 GHz at best would be 25W and at worst 65W for TDP. While being around sub-150 mm squared and probably exceeding Centurian-Vishera in performance.

Except, this is more Bristol Ridge and even more Stoney Ridge focused in optimization. Carrizo is 15W-orientated and Bristol Ridge/Stoney Ridge is 10 to 15W-focused. While the 22FDX design would be aiming around 5W. With capability of parts going beyond 15W TDP up to 25Ws, more AIO/Desktop orientated with fast and leaky SKUs. While typical and less leaky SKUs go to tablets, laptops, etc.

AMD would target more performance at lower power. However, the performance jump wouldn't be as big as Zen. As anything 22FDX would be targeting performance at lower power. A10-9700(E) into 25W to 10W for example is the optimization best for 22FDX. AMD would get it to have <10% to >15% higher performance at that lower power consumption as well. The promising prospect is of pushing 35W TDP 28nm SKUs into sub-7 watt 22FDX SKUs.

 

[hojnikb]

I don't think AMD is high enough to port anything bulldozer based to 22FDX or lower. It's just idiotic to go that route. Sell existing designs at 28nm where possible (like stony ridge) and switch to zen everything when making 28nm doesn't make any economic sense.

A 2core4 thread with vega3 gpu apu using 22FDX could be possible, but i doubt amd will go that route.

 

[scannall]

I don't think AMD is high enough to port anything bulldozer based to 22FDX or lower. It's just idiotic to go that route. Sell existing designs at 28nm where possible (like stony ridge) and switch to zen everything when making 28nm doesn't make any economic sense.

A 2core4 thread with vega3 gpu apu using 22FDX could be possible, but i doubt amd will go that route.

It won't. Making masks for a low volume, low margin part would be a very bad move.

 

[NostaSeronx]

I don't think AMD is high enough to port anything bulldozer based to 22FDX or lower. It's just idiotic to go that route. Sell existing designs at 28nm where possible (like stony ridge) and switch to zen everything when making 28nm doesn't make any economic sense.

It is the lowest cost solution.

Excavator on 28nm:
28nm => 114CPP/90Mx/9T
to
22FDX => 104CPP/80Mx/8T

Excavator on 20nm:
20nm => 86CPP/64Mx/9T
to
12FDX => 84CPP/56Mx/7.5T

This route has reduced investment, since the work was halted not deleted(eff. skeleton crew, India-Israel-Colorado-Boston). The extension to 22FDX/12FDX is low-risk with modest-reward. Unlike, Zen's path which is aimed at high-risk with high-reward.

Estimated:
Excavator return needed => 1x
Zen return needed => 4x
Zen-7nm return needed => 16x
22FDX XV-RV1(NG-CMT/Post-construction) return needed => 0.8x
12FDX XV-RV2(NG-CMT/Post-construction) return needed => 2.5x

It won't. Making masks for a low volume, low margin part would be a very bad move.

The total volume... basically, all the 300mm Fabs at GlobalFoundries has had R&D on 22FDX/12FDX. Implying that all 300mm fabs have potential for 22FDX production. That is effectively 4x the volume of 14LPP/12LP at GlobalFoundries which is only supported at one fab.

If GlobalFoundries is the benchmark, it would be cheaper to produce 22FDX products than 28nm products. While the margins are lower compared to 28-nm's beginning, it should be higher than 28-nm's end. With end user costs being easier to swallow than FinFETs for what is actually being provided.

Zen going to 22FDX or 12FDX will only be a thing if it has huge rewards. In this case, does it increase the value for EPYC? No, then no 22FDX for Zen. As Zen's purpose is server products and premium products. If Zen is drifting towards budget. Then, it is time to upgrade to 7nm with increased IPC or move to cheaper FinFETs(12LPv2) and get boosted frequency. While also EOL'ing those depreciating SKUs for good!

However, for Bristol Ridge/Stoney Ridge enhanced ports/successors. There is increased value from:
- Performance metrics like FinFETs
- Power metrics greater than FinFETs
- Yield, variability, and cost metrics greater than FinFETs
- Higher volume capacity at Fab 1, Fab 7, Fab 8, Fab 10, Fab 11 versus only Fab 8.
- There is also the "turbo pipeline": faster wafer start to chip delivery for FDX products.

Does it provide an upgrade? Yes.
Do companies want it? HP, Dell, Google, Acer, misc all want it.

 

[dark zero]

CMT is deader than Disco.

And the Cat Cores are already sub 20nm...

 

[amd6502]

CMT is deader than Disco.

And the Cat Cores are already sub 20nm...

I think the upcoming Athlons (220GE and 240GE) imply that a native dual core (with area similar to rx 550 to 560) is very likely in the works. Is CMT dead, maybe. very possible Stoney is the last surviving one, but I wouldn't rule out the alternative yet.

As nosta says, there is a large growing 4W-8W market for compact laptops and tablet crossovers. I'm not so sure how well Zen+ dual core with small iGPU would do for such ultra low wattage. Also see Nosta slides, the project cost and unit production cost is at a significant disadvantage for Zen+ dual core.

Both would be about same die area. 22FDX quite a bit cheaper in all ways, and could well have better perf/watt with reverse body bias.

As far as sub 20nm cat cores, yes there is a Microsoft 16nm gaming APU for the cpu part (SOI?, and either finfet or soi for the massive GPU which is where almost all of the of the die area is). FDX wouldn't ve been sensible for such a large die APU.

It is the lowest cost solution. [....]

This route has reduced investment, since the work was halted not deleted(eff. skeleton crew, India-Israel-Colorado-Boston). The extension to 22FDX/12FDX is low-risk with modest-reward. Unlike, Zen's path which is aimed at high-risk with high-reward.

Estimated:
Excavator return needed => 1x
Zen return needed => 4x
Zen-7nm return needed => 16x

Very true; finfet is for very large scale projects and the risk and upfront cost pretty large (especially crazy high for 7nm).

XV still has great potential for small cheap dies, and all this makes good sense to me; with all that FDX has to offer, a perfect match. Very well said:

If GlobalFoundries is the benchmark, it would be cheaper to produce 22FDX products than 28nm products. While the margins are lower compared to 28-nm's beginning, it should be higher than 28-nm's end. With end user costs being easier to swallow than FinFETs for what is actually being provided.

Zen going to 22FDX or 12FDX will only be a thing if it has huge rewards. In this case, does it increase the value for EPYC? No, then no 22FDX for Zen. As Zen's purpose is server products and premium products. If Zen is drifting towards budget. Then, it is time to upgrade to 7nm with increased IPC or move to cheaper FinFETs(12LPv2) and get boosted frequency. While also EOL'ing those depreciating SKUs for good!

However, for Bristol Ridge/Stoney Ridge enhanced ports/successors. There is increased value from:
- Performance metrics like FinFETs
- Power metrics greater than FinFETs
- Yield, variability, and cost metrics greater than FinFETs
- Higher volume capacity at Fab 1, Fab 7, Fab 8, Fab 10, Fab 11 versus only Fab 8.
- There is also the "turbo pipeline": faster wafer start to chip delivery for FDX products.

Does it provide an upgrade? Yes.
Do companies want it? HP, Dell, Google, Acer, misc all want it.

Another question for Nosta, with the great economics, is there any potential for FDX to be used for ddr4 or ddr5 SDRAM? And if so could it lower RAM prices and considerably lower RAM wattages?

 

[amd6502]

CMT is deader than Disco.

And the Cat Cores are already sub 20nm...

Does this look dead to you:

https://old.reddit.com/r/Amd/comments/9rmmzi/amd_quietly_launches_new_carrizo_apu_a87680/

That is crazy good folks, I'm getting another fm2+ board ======)

 

[Hitman928]

Does this look dead to you:

https://old.reddit.com/r/Amd/comments/9rmmzi/amd_quietly_launches_new_carrizo_apu_a87680/

That is crazy good folks, I'm getting another fm2+ board ======)

It has a DDR3 memory controller and looks to be OEM only. Probably a part just to fulfill a long term support contract.

Construction cores and their progeny are dead. You may mourn them but don't try to bring them back to life, it never goes well.

 

[hojnikb]

Does this look dead to you:

https://old.reddit.com/r/Amd/comments/9rmmzi/amd_quietly_launches_new_carrizo_apu_a87680/

That is crazy good folks, I'm getting another fm2+ board ======)

Yes, this is just a rehashed carrizo silicon to clear old stocks.

 

[jpiniero]

It has a DDR3 memory controller and looks to be OEM only. Probably a part just to fulfill a long term support contract.

Construction cores and their progeny are dead. You may mourn them but don't try to bring them back to life, it never goes well.

I do wonder if the Cat cores might live, if only so they can be the LITTLE core in case Intel's big.LITTLE plans succeed and OEMs demand it.

Maybe they can get Sony or MS to pay for the shrinkage.

 

[NostaSeronx]

Another question for Nosta, with the great economics, is there any potential for FDX to be used for ddr4 or ddr5 SDRAM? And if so could it lower RAM prices and considerably lower RAM wattages?

22FDX supports DDR3/DDR4/(Preliminary)DDR5. As well as LPDDR3/LPDDR4/(Preliminary)LPDDR5.

The PHYs in 28FD/22FD have lower leakage, thus lower power consumption. On RAM itself the only way for lower wattages is either a node shrink and/or a voltage shrink.

DDR4 was suppose to get 1.05V and have 1.2V get to 4266 Mbps. Where as DDR5 is 1.1v and is eng sampled at 4400 Mbps.
https://www.anandtech.com/show/12710/cadence-micron-demo-ddr5-subsystem

Stoney Ridge is 64-bit 2133/2400 Mbps for FP4/FP5/FT4/AM4
While, the 22FDX 64-bit could be 4400/4800 Mbps for FP5+/AM4+ (DDR5 SO-DIMM/DIMM)

Only needing to fill a single DIMM with 8 gigabyte DDR5. To get maximum bandwidth would generally be cheaper than needing two DIMMs with 2x8 gigabyte DDR5 or 2x4 gigabyte DDR4 for max bandwidth.

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CMT is deader than Disco.

Construction cores and their progeny are dead.

There is various facets from cluster-based multithreading required for 2020+ architectures. So, construction and the successors to Bulldozer through Excavator is unlikely to be halted indefinitely.

Intel's virtual core technique derived from VISC is based on AMD's CMT. With the retire queue pushed into the front-end of the module. Rather than the front-end of the core. Which allows it to rename cores and rename registers within the VISC module.

One can tell through Intel's patents that CMT is naturally aimed towards low power. With majority of the patents drifting towards four Atom cores within a virtual core molecule. This is backed up by most of the leads of NGC being Bulldozer/Piledriver architects.

Intel however has been leaking employees which have stumbled their way to AMD. The SoftMachines group however has been funneled into the AMD's new CMT project. That project however gets fulfilled in 2019 at the beginning of 12FDX. The 22FDX part is a stop-gap for that 2019 project to finish in 2021 with 12FDX ship, estimated.

 

[amd6502]

It has a DDR3 memory controller and looks to be OEM only. Probably a part just to fulfill a long term support contract.

Construction cores and their progeny are dead. You may mourn them but don't try to bring them back to life, it never goes well.

Pretty sure this isn't so, although it's possible OEMs get first dibs like with BR launch and consumers need to wait a few months. There is a boxed SKU (PiB) as well as another SKU number which is probably OEM or without cooler box.

Disco actually isn't dead either.

I do wonder if the Cat cores might live, if only so they can be the LITTLE core in case Intel's big.LITTLE plans succeed and OEMs demand it.

Maybe they can get Sony or MS to pay for the shrinkage.

They would be good only as a big-little-like compliment in a 4 thread virtual cores unit. But that would mean more design work and the advantages not so much over just reusing a simple shrunken Bristol Ridge with cut down GPU. Also, like mentioned before xbone already did shrink cat cores to 16nm, it wasn't anything exciting except for the great wattage saved by the gpu and also the tiny cpus. https://en.wikipedia.org/wiki/Xbox_One#Xbox_One_S

Like hojnikb says, this is just clearing the stock of carrizo dies, and it's very opportune (and nice to consumers) to fulfill the last wave of DDR3 demand. So this is the real never before anticipated bright side of the carrizo OEM flop. Impressive they finally got the GPU working on fm2+/DDR3.