Discussion Ada/'Lovelace'? Next gen Nvidia gaming architecture speculation

[jpiniero]

Well, that is what have been reported, we will know in a few days. It is indeed weird to use full die in the first wave of product launching thus my analysis.

The 2080 (full TU104) and 1080 (full GP104) were exactly that.

 

[Tigerick]

The 2080 (full TU104) and 1080 (full GP104) were exactly that.

But not GA102 (3090 and 3080) and GA104(3070).

 

[jpiniero]

But not GA102 (3090 and 3080) and GA104(3070).

The point is Ampere was the outlier in this case.

 

[Zor Prime]

Someone needs to focus on efficiency. My 3090 dissipates so much heat I keep its TDP locked anywhere between 50% to 70% and it's usually 50-60. I think I benched it one time at 100% TDP. I had no clue my room would become a sauna. It's seriously impressive how much heat gets thrown ... and it's only going to get worse? Naw, no way. Done been made a fool once, 250w power limit for me going forward. My 2080 was tolerable.

 

[Saylick]

Speaking of the 4090... Dang, what a chonker. Those heat pipes though...

Leaked Lenovo GeForce RTX 4090 Legion GPU is a true quad-slot design - VideoCardz.com

Lenovo GeForce RTX 4090 pictured The first photos of Lenovo RTX 4090 GPU. Lenovo is preparing a quad-slot and triple-fan brick also known as RTX 4090 graphics card. While the name of the card has been partially hidden, we can clearly see this is a new design for the cooler. The visible font also...

videocardz.com

 

[Tup3x]

Speaking of the 4090... Dang, what a chonker. Those heat pipes though...

Leaked Lenovo GeForce RTX 4090 Legion GPU is a true quad-slot design - VideoCardz.com

Lenovo GeForce RTX 4090 pictured The first photos of Lenovo RTX 4090 GPU. Lenovo is preparing a quad-slot and triple-fan brick also known as RTX 4090 graphics card. While the name of the card has been partially hidden, we can clearly see this is a new design for the cooler. The visible font also...

videocardz.com

View attachment 67538

Oookay... Maybe the die has heatspreader this time.
Edit: Copper base plate is actually attached to that thing?

 

[Saylick]

Oookay... Maybe the die has heatspreader this time.
Edit: Copper base plate is actually attached to that thing?

Yeah, the heat pipes shown are on the back of the vapor chamber:

 

[Saylick]

Seems like we got a decent guess at the die size of AD102: 629mm2

https://twitter.com/x/status/1570066757808975874

 

[GodisanAtheist]

It is tactical move by nVidia to rename supposedly RTX4070 to RTX4080 12GB especially using full die of AD104. Beside marketing reason, I believe the main reason is to target AMD Navi 32 which happens to have 7680 cores with 12GB GDDR6 192-bit memory support. nVidia knows about the costing disadvantage against RDNA3, thus naming AD104 as 4080 12GB hope to let people believe it is a good value card. My estimated price of RTX4080 12GB would be between $599 to $699, we will see...

-100% NV is doing something fishy here, either as a response to AMD (less likely) or as a method of trying to charge more for a part on the basis of its name to buoy the sales of current gen parts for a less painful discount.

Maybe if it was a 4070 people would expect it to be priced @ $499 or less and it would essentially make the entire 3xxx generation pointless outside of the 3050 (for the poors) and NV would end up with a bunch of shreaking AIBs + retailers stuck with a bucketload of cards they would have to take the mother of all baths on.

As a 4080, people are less likely to scoff at a $699 price point, which means 3090's don't really have to drop too far down on account of their 24G of RAM having some special use case scenarios/epeen points.

 

[jpiniero]

Oh this is funny. The 4080 12 GB's TFlops at stock is the exact same as the 3090 Ti (~39.997). That's assuming I did the math right.

I get 48.5 for the 4080 16 GB (+21%) and 82.2 for the 4090 (+105%)

Edit: Yeah I think nVidia is going to need another AD102 cut. Just because that's too big of a performance gap. But later I imagine.

 

[maddie]

Speaking of the 4090... Dang, what a chonker. Those heat pipes though...

Leaked Lenovo GeForce RTX 4090 Legion GPU is a true quad-slot design - VideoCardz.com

Lenovo GeForce RTX 4090 pictured The first photos of Lenovo RTX 4090 GPU. Lenovo is preparing a quad-slot and triple-fan brick also known as RTX 4090 graphics card. While the name of the card has been partially hidden, we can clearly see this is a new design for the cooler. The visible font also...

videocardz.com

View attachment 67538

13 pipes. Anyone knows the heat transport capacity of a single pipe?

 

[amenx]

Seeing these massive multi-slot cards is cringe inducing to me. Its like going hunting for rabbits with an M1 Abrams tank. I can easily be content with cards a few tiers lower than before.

 

[CP5670]

That cooler is enormous, and I bet the custom cards will be even bigger. At some point it would be better to have GPU and vram sockets on the motherboard like CPU/ram instead of these massive video cards hanging out of the board.

 

[leoneazzurro]

Kepler on Twitter: "@jahmalachi15 @phatal187 @SasaMarinkovic AD102 is 628mm², Navi31 is 533mm²." / Twitter

Now if this is really true, I should look back at the people who insulted me some months ago for estimating AD102 die size at around 600 mm^2 while they insisted that it should have not been larger than 500 mm^2.
And laugh.

 

[ModEl4]

Every publication that I saw is saying that 208 means 2.08X the performance of GA102 but it doesn't make sense for me, the other numbers are not a product of comparison, they allegedly inform about AD102 specs.
For me it's more probable to mean 2.08TB/sec effective bandwidth with 96MB cache+GDDR6X or it's just FP16 or tensor FP32 Tflops!

 

[jpiniero]

Every publication that I saw is saying that 208 means 2.08X the performance of GA102 but it doesn't make sense for me, the other numbers are not a product of comparison, they allegedly inform about AD102 specs.
For me it's more probable to mean 2.08TB/sec effective bandwidth with 96MB cache+GDDR6X or it's just FP16 or tensor FP32 Tflops!

Ray Tracing cores maybe?

Edit: Or as Reddit claims, it's a real phone number that goes to voicemail. No idea what nVidia plans on using any voicemail responses for.

 

[ModEl4]

Ray Tracing cores maybe?

Edit: Or as Reddit claims, it's a real phone number that goes to voicemail. No idea what nVidia plans on using any voicemail responses for.

It doesn't seem to be RT cores imo, all the previous designs had 1 RT core per SM, 208 it doesn't even divide correctly.

But if each RT core can do 6 ray traversals per clock per RT/SM instead of 1 that Turing could and the SM/RT is 144 and the clock 2.4GHz (or 128 and 2.7GHz for example in 4090's case) it gives 208 Gigarays.
But 6 ray traversals per RT core is too excessive I think.

 

[MrTeal]

How does 75B transistors in ~625mm² on N5 for Lovelace fit in with Hopper being 80B transistors in 812mm² on N4?
Is there a reason why consumer Ada would be significantly denser than Hopper on a nominally larger node?

 

[ModEl4]

How does 75B transistors in ~625mm² on N5 for Lovelace fit in with Hopper being 80B transistors in 812mm² on N4?
Is there a reason why consumer Ada would be significantly denser than Hopper on a nominally larger node?

I have lost count with all these rumors, 600/618/625/629mm² N5/N4.
Regarding process the latest rumor is N5?

 

[jpiniero]

Ray Tracing cores maybe?

Edit: Or as Reddit claims, it's a real phone number that goes to voicemail. No idea what nVidia plans on using any voicemail responses for.

Oh I saw the answer. 208 is the area code for Boise Idaho. Which is in Ada County.

 

[Aapje]

Regarding process the latest rumor is N5?

TSMC 4N

 

[DisEnchantment]

How does 75B transistors in ~625mm² on N5 for Lovelace fit in with Hopper being 80B transistors in 812mm² on N4?

Yeah this is not making sense, rumored 75.38B/629mm2 is 119 MTr/mm2 when Hopper is around 98MTr/mm2. If at all Lovelace should be below 98 MTr/mm2 (or at least close) if it is supposed to clock higher than H100. Otherwise for that Transistor count, Lovelace needs to be 770 mm2.
A density of 119MTr is approaching cell phone SoC level density and basically means clocks are going to be nerfed.

 

[jpiniero]

Yeah this is not making sense, rumored 75.38B/629mm2 is 119 MTr/mm2 when Hopper is around 98MTr/mm2. If at all Lovelace should be below 98 MTr/mm2 (or at least close) if it is supposed to clock higher than H100. Otherwise for that Transistor count, Lovelace needs to be 770 mm2.
A density of 119MTr is approaching cell phone SoC level density and basically means clocks are going to be nerfed.

It's probally the L2 cache.

 

[jpiniero]

You know, given the big gap in core counts between AD102 and the others, the die size of the smaller products shouldn't be that bad. AD104 should not be that much bigger than GA106. Maybe even less than 300 mm2 although it's probably a tad above.

Of course who knows how many multiples the N4 wafers cost compared to Samsung's 8 nm...

 

[Frenetic Pony]

Seems like we got a decent guess at the die size of AD102: 629mm2

https://twitter.com/x/status/1570066757808975874

Ok so like, $2k price is right, yah?