Info 64MB V-Cache on 5XXX Zen3 Average +15% in Games

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Kedas

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Dec 6, 2018
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Well we know now how they will bridge the long wait to Zen4 on AM5 Q4 2022.
Production start for V-cache is end this year so too early for Zen4 so this is certainly coming to AM4.
+15% Lisa said is "like an entire architectural generation"
 
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Joe NYC

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Yes, that's my understanding as well. Their plan seems to be to upgrade lines from N7 to N6 and encourage as many customers as possible to port their designs, so that utilization of N7 drops since N6 is cheaper for customers and more efficient for TSMC everyone wins. Not sure how automated that "port" is, what it costs, and if the benefits are such that TSMC would be willing to fund those costs itself in some cases. Even if TSMC was willing to fund 100% of the cost for everyone they would always have to maintain some N7 capacity because it isn't worth it in certain markets with a lot of regulatory overhead where a product using the "same" chip built on N6 instead of N7 would have to be requalified.

N5 to N4 is the same thing, in that TSMC wants those using N5 longer term to move to N4.

I still find it quite curious that the biggest customer of TSMC N7 (AMD) has not moved its highest volume part (Zen 3 CCD) from N7 to N6.

If it is to everyone's benefit to move to N6, this one part would be the biggest bang for the buck, for both AMD and TSMC.
 

Doug S

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Feb 8, 2020
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I still find it quite curious that the biggest customer of TSMC N7 (AMD) has not moved its highest volume part (Zen 3 CCD) from N7 to N6.

If it is to everyone's benefit to move to N6, this one part would be the biggest bang for the buck, for both AMD and TSMC.

Isn't AMD supposedly using some sort of "custom" version of N7? It may not be directly portable, might already be using some aspects of N6, etc. We also have to consider how long lived the N7 parts will be. Won't they mostly be replaced by Zen 4 parts before long?
 

Joe NYC

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Isn't AMD supposedly using some sort of "custom" version of N7? It may not be directly portable, might already be using some aspects of N6, etc. We also have to consider how long lived the N7 parts will be. Won't they mostly be replaced by Zen 4 parts before long?

There was some talk of N7+ or something like that, which AMD did not want to get into when asked.

Zen 3 CCD will be in production for another 2 years minimum. V-Cache added extra year minimum to what might have otherwise been its useful life.

I am going to guess that there will be more Zen 3 CCDs manufactured between now to its end of life than was manufactured to date.

So even though there may be some complications porting to N6 (which should be superior in ever way), I think it would be worth it.

Edit: also, Zen 4 ramp will not be very fast, IMO, and it will take > year or more for Zen 4 to out ship Zen 3
 
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Joe NYC

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AMD has long-term supply contracts on several N7-based products, most likely.

It doesn't mean that AMD would have to stop producing N7 based B0 silicon, for whoever would insist on it.

But moving to new B2 silicon is not unlike moving from N7 to N6 - it's different silicon.
 

Kedas

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Dec 6, 2018
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6nm Zen3 dies would probably delay the V-cache version release, and if you delay that much further you are starting to miss the window.
6nm is a shrink so contact are closer together so it is a change for both dies.
 

DrMrLordX

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Apr 27, 2000
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But moving to new B2 silicon is not unlike moving from N7 to N6 - it's different silicon.

That's not absolutely true. It's the same process and the same design, with bugfixes. A new stepping doesn't require validation from users that require such.

They are supposedly moving their mobile line to N6 with the Rembrandt 6x00 chips.

AMD's Next-Gen Rembrandt 'Ryzen 6000' APUs Currently In Mass Production (wccftech.com)

So far as I can tell, the last products AMD will produce on N7 will be Vermeer; Milan; Milan-X; and the product popularly known as Zen3D.
 
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What are the chances of Ryzen 6000 laptops launching in December? That would be a great move against mobile Alder Lake.
 

LightningZ71

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Mar 10, 2017
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I'm not really even seeing the point of Barcelo. I get that Lucienne was a notable improvement on comparable level Renoir chips, and had notable improvements in power usage. I don't see what they are going to be improving from Cezanne -> Barcelo, other than maybe some errata? It'll certainly slot down a notch here and there, but what else?
 
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jpiniero

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I'm not really even seeing the point of Barcelo. I get that Lucienne was a notable improvement on comparable level Renoir chips, and had notable improvements in power usage. I don't see what they are going to be improving from Cezanne -> Barcelo, other than maybe some errata? It'll certainly slot down a notch here and there, but what else?

More supply.
 

leoneazzurro

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Jul 26, 2016
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I'm not really even seeing the point of Barcelo. I get that Lucienne was a notable improvement on comparable level Renoir chips, and had notable improvements in power usage. I don't see what they are going to be improving from Cezanne -> Barcelo, other than maybe some errata? It'll certainly slot down a notch here and there, but what else?

it is mostly an OEM thing. OEMs can drop in a Barcelo directly on older/cheaper design with DDR4 (Rembrandt only supports DDR5 so it's a premium option) without needing to redesign anything (motherboard, cooling system, and so on). It's probably the same story as Lucienne was with Cezanne, with probably some update for clock speeds/power management. The good thing is that this time Barcelo will not have the 6xxx series name, but these processors will be named as "5850, 5650" and so on.
 
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LightningZ71

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That's what I was afraid of. It's even less of an improvement than Lucienne was... and that wasn't much more than resorting the stack and minor power management tricks.
 
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Joe NYC

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6nm Zen3 dies would probably delay the V-cache version release, and if you delay that much further you are starting to miss the window.
6nm is a shrink so contact are closer together so it is a change for both dies.

B2 stepping was first talked about back in May and the silicon is out already. So this B2 is either N7 or N6. Unfortunately, it may still be N7.
 

leoneazzurro

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That's what I was afraid of. It's even less of an improvement than Lucienne was... and that wasn't much more than resorting the stack and minor power management tricks.

Well, Lucienne was Zen2 while Cezanne was Zen3, now we have Barcelo Zen3 and Rembrandt Zen3+ so the difference should be lower. Moreover, this time the naming is accurate, so i'd say the whole situation is better. Of course if we compare Cezanne and Barcelo we have probably the same Lucienne to Renoir improvement.
 
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Joe NYC

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What are the chances of Ryzen 6000 laptops launching in December? That would be a great move against mobile Alder Lake.

Not a huge rush with those, Alder Lake Mobile is launching in Q1, so no reason to rush the release, best to just go by the original plan (Q1 apparently)
 

Hans de Vries

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www.chip-architect.com
B2 stepping was first talked about back in May and the silicon is out already. So this B2 is either N7 or N6. Unfortunately, it may still be N7.

Why would a minor stepping like going from B1 to be B2 suddenly involves a process change from N7 to N6 ???

That would break all naming conventions.
 
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Joe NYC

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Why would a minor stepping like going from B1 to be B2 suddenly involves a process change from N7 to N6 ???

That would brake all naming conventions.

Even if it is just a shrink and otherwise completely same functionality (minus some bugs)?
 

Hans de Vries

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May 2, 2008
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Even if it is just a shrink and otherwise completely same functionality (minus some bugs)?

Yes,

Wikipedia said:
Stepping identifiers commonly comprise a letter followed by a number, for example B2. Usually, the letter indicates the revision level of a CPU's base layers and the number indicates the revision level of the metal layers. A change of letter indicates a change to both the base layer mask revision and metal layers whereas a change in the number indicates a change in the metal layer mask revision only. This is analogous to the major/minor revision numbers in software versioning. Base layer revision changes are time consuming and more expensive for the manufacturer, but some fixes are difficult or impossible to accomplish with metal-only changes.
 

Joe NYC

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Thanks for clarification, good info there.

Still, it is a little strange that AMD would devote more energy to low volume designs like Barcello, Van Gogh, and not refresh the high volume Zen 3 CCD to N6. Because Zen 4 is a whole new architecture, new platform, new memory, and the ramp may be just gradual, which will leave plenty of demand for Zen 3 generation.
 

lobz

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Feb 10, 2017
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Thanks for clarification, good info there.

Still, it is a little strange that AMD would devote more energy to low volume designs like Barcello, Van Gogh, and not refresh the high volume Zen 3 CCD to N6. Because Zen 4 is a whole new architecture, new platform, new memory, and the ramp may be just gradual, which will leave plenty of demand for Zen 3 generation.
Van Gogh low volume? Did you mean low margin there?
 

Joe NYC

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Van Gogh low volume? Did you mean low margin there?

Could be both. I don't know what kind of volume Van Gogh will have. The only one I am aware of is SteamDeck, which is likely going to be low volume.