Density improvement is different for logic and SRAM, and SRAM shrank a lot more than logic. Based on published numbers, a high-density SRAM bitcell should take 0.42x the space on TSMC 7nm of what one took on a GF 14nm process.
AMD stated 2x surely as a whole, SRAM among others compensating for what doesnt shrink as much.
That s for what was included in the chiplet, wich mean Cores + Caches + IF as well as all the power management, it s possible that such parts as the MC and I/O doesnt scale much comparatively, in wich case it was a smart move to keep those circuitries in 14nm.
That being said i wonder if the 20-28mm2 left in the chiplet are reserved to DT SKUs use, this way they could better amortize this chiplet by selling it in a mass market, without Ryzen the server business wasnt sustainable and nothing has changed in this respect.