Question Zen 6 Speculation Thread

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Abwx

Lifer
Apr 2, 2011
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>1.7x. it can be 2.2x perf for all you care.
No, it cant, laws of physics cant be trolled contrary tp forums.


They bench sockets at rated power, which is 500W vs 600W here.
600W 256c Venice has >1.7x PPW delta relative to 500W 192c 9965.

You have trouble using basic maths, if perf/W is 1.7x at 1.7x the perfs it means that the comparison is made at 500W, laws of physics state that power is increasing as a square of frequency, at least at medium frequencies.

The consequence is that PPW decrease linearly with frequency increasement, if you increase power by 1.2x then perf increase by sqrt(1.2) and PPW decrease by sqrt(1.2).
 

Joe NYC

Diamond Member
Jun 26, 2021
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With 1.7x better efficiency this would mean 1.85x the perf, period.



Lol, the pot that call the kettle, it s rather you who should get out of basic arithmetics irrationality, sure that if 1.7 x 1.2 = 1.7 was to be right then everything would be possible,
but for sure that i have more confidence on AMD that on someone who s left downplaying their numbers because of his ego and unability to accept their numbers as being way closer to reality than his random speculations.

I would not go too deep into the weeds nitpicking between 1.7 and 1.85 from one vague slide.
 

Abwx

Lifer
Apr 2, 2011
11,910
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I would not go too deep into the weeds nitpicking between 1.7 and 1.85 from one vague slide.

The thing is that AMD made a comparison with an existing SKU, higher TDP with Zen 5 is supposed to be 500W, that s the basis of their number and 1.7x better PPW is in line with the expected process PPW improvement.
 

StefanR5R

Elite Member
Dec 10, 2016
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@Abwx, AMD presented a new projection at the "Financial Analyst Day" in November which is no longer the same as their projection presented at their "Advancing AI" event in June. See post #7,441. (Furthermore, the old projection was given without additional detail, while the new projection, or estimate, was qualified with an endnote.) Make of these vendor estimates what you will; they were both said in public, but one was made months closer to the launch than the other.
 

Abwx

Lifer
Apr 2, 2011
11,910
4,885
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@Abwx, AMD presented a new projection at the "Financial Analyst Day" in November which is no longer the same as their projection presented at their "Advancing AI" event in June. See post #7,441. (Furthermore, the old projection was given without additional detail, while the new projection, or estimate, was qualified with an endnote.) Make of these vendor estimates what you will; they were both said in public, but one was made months closer to the launch than the other.

That s precisely the latest infos that are discussed at this point.
 

Markfw

Moderator Emeritus, Elite Member
May 16, 2002
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The thing is that AMD made a comparison with an existing SKU, higher TDP with Zen 5 is supposed to be 500W, that s the basis of their number and 1.7x better PPW is in line with the expected process PPW improvement.
I have a 500w Zen 5 9755, in fact 2 of them. They rarely go over 370 watt or so, except when fully utilized on all cores with very heavy avx-512 code running, THEN they hit 480 watts or so @2.7 ghz.

The point being that AMD used MAX values for load to come up with the 500, not normal mixed usage. I know this for a fact. and the poor VRMs are what is slowing it down at that. If my motherboard has better VRM heatsinks it might push the 500 watt limit and the ghz run speed.
 

StefanR5R

Elite Member
Dec 10, 2016
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I have a 500w Zen 5 9755, in fact 2 of them. They rarely go over 370 watt or so, except when fully utilized on all cores with very heavy avx-512 code running, THEN they hit 480 watts or so @2.7 ghz.
Your samples (100-000001245-08, 100-000001535-05 ?) may not have the same boosting algorithm as the final production samples (100-000001443). With 4.1 GHz all-core boost limit of the 9755, I would expect even a lighter software workload to pull the whole 500 W when all hardware threads are loaded.

edit: product IDs added

edit 2: Meanwhile I was looking around a little if I could find something about power draw of SPEC CPU 2017 Integer Rate on high core count CPUs, but haven't found any.
 
Last edited:

Markfw

Moderator Emeritus, Elite Member
May 16, 2002
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Your samples (100-000001245-08, 100-000001535-05 ?) may not have the same boosting algorithm as the final production samples (100-000001443). With 4.1 GHz all-core boost limit of the 9755, I would expect even a lighter software workload to pull the whole 500 W when all hardware threads are loaded.

edit: product IDs added

edit 2: Meanwhile I was looking around a little if I could find something about power draw of SPEC CPU 2017 Integer Rate on high core count CPUs, but haven't found any.
the 1245-08 is ES, the 1535-05 is a QS, should be the same as production/retail. If I load 256 jobs of WCG , it uses 370 watts on kill-a-watt. With 128 cores load with no SMT and heavy avx-512 (primegrid) it uses 480.

That all I am sure of.
 
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msj10

Member
Jun 9, 2020
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We learned a lesson with Zen 5 - do not estimate any other segments based on a server performance figure.

Compared to desktop:
* Server got a completely different IOD (different characteristics)
* Server is gonna get more memory channels
* Server workloads behave differently (memory b/w, TDP limitation)
* Server is gonna get the TDP headroom expanded (we don't know whether desktop gets that too)
Also Doubled L3 per core for the server dense variants which client is not going to get.
 

OneEng2

Senior member
Sep 19, 2022
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We learned a lesson with Zen 5 - do not estimate any other segments based on a server performance figure.

Compared to desktop:
* Server got a completely different IOD (different characteristics)
* Server is gonna get more memory channels
* Server workloads behave differently (memory b/w, TDP limitation)
* Server is gonna get the TDP headroom expanded (we don't know whether desktop gets that too)
Agree. It is almost certain that DC will get the biggest boost BY FAR of any Zen 6 segment.
You should also learn a lesson of a single vs double shrinks.
Except the shrinks keep yielding smaller and smaller PPA improvements. It wasn't that long ago that we expected transistor count to DOUBLE every 18 months ..... remember?

Now, it takes a couple of node shrinks (N5->N3->N2) to get what ..... 25%? At this rate, we will be looking at 2 node shrinks to get 10% before long.

Note: I do expect that High NA will give a boost, but the issue I see is that if you tweak N2 a bunch, how much better will the first batch of High NA even be?

The point being, node shrinks are getting harder to come by and giving less and less PPA each generation.
 
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Gideon

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Except the shrinks keep yielding smaller and smaller PPA improvements. It wasn't that long ago that we expected transistor count to DOUBLE every 18 months ..... remember?

Now, it takes a couple of node shrinks (N5->N3->N2) to get what ..... 25%? At this rate, we will be looking at 2 node shrinks to get 10% before long.
Aren't you mixing up performance increases with transistor counts?

The transistor counts still go up massively, for instance:

1. NVIDIA GA104 chip (RTX 3070 Ti among others) is 17.4 billion transistors at 392 mm²
2. NVIDIA AD103 chip (RTX 4070 Ti among others) is 45.9 billion transistors at 379 mm²

That's nearly 3x in two years. Now granted that's going from Samsung 8nm (more akin to TSMC 12nm than 7nm) to 5nm, so almost 2 node shrinks, but then again the transistors go up nearly 3x not 2.

The same is true regarding CPUs. Intel's transistor counts per core (even without caches) have gone up multiple times since Skylake. If I'm not mistaken, it has pretty much been 2x the transistors for 20% more perf/clock.

And the biggest difference compared to yesteryear is that you can't fire up all those "newly acquired" transistors and expect them to take as little power as the previous ones at the given chip-size (which was always the case till mid 2000s). This is the part that only goes down tens of percent at sweetspot clocks. So you. have to be clever in other ways (use more to get higher clocks bloat buffer sizes, add more cores / features that aren't used together all the time ...)

In the end you might get a bigger transistor budget (as long as it's not analog or SRAM, where gains are minimal) but they are a hell of a lot more expensive and can't be fired up all at once (unless you increase power limits).
 
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SmokSmog

Member
Oct 2, 2020
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Actually it's 50% more cores.
9950X has 16 cores, 50% of that is 8. 18+8+24

33.3% would be if cutting core count from 24 to 16. Then it would be 33.3% less cores.

I do that calc wrong sometimes as well when I'm not thinking am I looking at increase or decrease!
I didn't make any mistake.
I was talking about the Epyc Zen6 slide, 33% more cores = 70% better performance. Then I extrapolated performance for desktop Zen6.