Question Zen 6 Speculation Thread

[inquiss]

It's the same core with the same schedule.

Sure, what I said doesn't disagree with that. Same core on a different node is gonna have a different fmax.

And I expect their mobile volume on n3 class node is going to out sell their volume on the n2 node. Don't you?

 

[inquiss]

Well volume in terms of what don't forget MI400 is mix of N3P/N2

Talking strictly cpus. All the volume parts for AMD are n3, though a lot of SKUs on n2

 

[OneEng2]

Yep, that's it. Just a teeny tiny 25%

Granted, going from N4P to N2 we should expect a decent (20% ish) improvement; however, I would guess that this is everything combined.... IPC, Frequency increases, improved instructions, etc.

Additionally, this isn't sustainable (ie, in another 2 years, don't expect another 25% going to N16).

That 18% isn't fmax; it's higher frequency at the same power. And typically that marketing number comes from some optimal point near the middle of the perf/watt curve.

Agree. Another thing I see happen here often is that people add all the theoretical improvements together (all of them marketing numbers at the theoretical best situation as you point out) to arrive at a fantasy performance that the real product couldn't hope to live up to.

Sure, what I said doesn't disagree with that. Same core on a different node is gonna have a different fmax.

And I expect their mobile volume on n3 class node is going to out sell their volume on the n2 node. Don't you?

I expect that all N3P versions will grossly outsell the N2 parts! This is very good point.

Sure, we are all focused in on the N2 new shiny thing, but the likely outcome is that the lions share of Zen 6 will be sold on N3P.

It's a good business model IMO. Grab the high ground (and high profit) with the most expensive node money can buy and then use a less expensive node to sell to the masses with on the coat tails of the premium offerings.

 

[Geddagod]

Nope.

Yup

It is.

It is mid, yes.

Have you seen server benchmarks?

Have you seen AVX-512 benchmarks, you mean.
Because outside of that, Zen 5 has a 17% average IPC uplift, specifically in servers, according to AMD themselves.

Also, again, according to AMD themselves, the benchmark they use to generalize server performance, is specint2017, the very benchmark where Zen 5 looks mid.

Let's not pretend like AMD didn't try to optimize for frequency with Zen 5. More metal layers + other features from the N4X node...

 

[Thunder 57]

View attachment 132138
Yup

It is mid, yes.

Have you seen AVX-512 benchmarks, you mean.
Because outside of that, Zen 5 has a 17% average IPC uplift, specifically in servers, according to AMD themselves.

Also, again, according to AMD themselves, the benchmark they use to generalize server performance, is specint2017, the very benchmark where Zen 5 looks mid.

Let's not pretend like AMD didn't try to optimize for frequency with Zen 5. More metal layers + other features from the N4X node...

17% sounds pretty damn good to me.

 

[adroc_thurston]

Yup

Nodelet numbers are all bs.

It is mid, yes.

Best thing ever till Venice comes.

Have you seen AVX-512 benchmarks, you mean.

Oh no, it just does well in server period.
The more you cope, the worst it gets. So don't.

 

[Geddagod]

17% sounds pretty damn good to me.

When you power equalize it to the power-per-core you see in server, the actual perf/watt improvement shrinks considerably. Just the nature of tock cores I think, but it is what it is
Calling Zen 4 a server oriented core makes way more sense than Zen 5. Node shrink means your perf/watt at server TDPs increases dramatically, and it introduces AVX-512 in the first place...

Nodelet numbers are all bs.

Well the nodelet numbers TSMC claims for the N4P shrink are higher BS numbers than other sub node improvements ig

Best thing ever till Venice comes.

Turin classic ~ matching GNR in specint2017 when both are at 500 watts is not a good look for the supposed superiority of AMD's design teams.

 

[adroc_thurston]

Well the nodelet numbers TSMC claims for the N4P shrink are higher BS numbers than other sub node improvements ig

yea

Turin classic ~ matching GNR in specint2017 when both are at 500 watts is not a good look for the supposed superiority of AMD's design teams.

it absolutely crushes it in real workloads with way lower workload power.
too bad!

 

[Doug S]

Only N3 Zen6 is the mobile SKU everything is N2

That doesn't make much sense. Mobile benefits more from using less power and mobile CPUs have higher margins than desktop. If they are doing mobile on N3 and desktop on N2 they have things backwards.

 

[adroc_thurston]

That doesn't make much sense

yeah it does.

and mobile CPUs have higher margins than desktop

no lol mobile slop is far far far lower margin than anything DT.

If they are doing mobile on N3 and desktop on N2 they have things backwards.

Wrong, mobile needs cheap mainstream peanuts which are N3.
Some higher tier config options use the N2 CCD for added oomph.

 

[Meteor Late]

Wrong, mobile needs cheap mainstream peanuts which are N3.
Some higher tier config options use the N2 CCD for added oomph.

Wait, wasn't N2 "cheap" according to you? AMD should use it everywhere!

 

[adroc_thurston]

Wait, wasn't N2 "cheap" according to you?

yeah.

AMD should use it everywhere!

They would but stashing big mobile volume plays at N-1 is the way to go.

 

[Josh128]

18% for N2P over N3E:

https://twitter.com/x/status/1978737339171017215

Old news. I posted this here a few weeks ago. Read it again. +10% fmax, not +18%.

 

[adroc_thurston]

Read it again. +10% fmax, not +18%.

10% on top of the 18% of the baseline N2p.
Cuz X are the overdrive nodes.

 

[Josh128]

10% on top of the 18% of the baseline N2p.
Cuz X are the overdrive nodes.

It says +18% is speed improvement at same power, not fmax.

 

[adroc_thurston]

It says +18% is speed improvement at same power, not fmax.

That's fmax.
Granted, those are foundry optimism numbers and not real designs with real limitations so think 10% speed instead.

 

[reaperrr3]

View attachment 132138
Yup

TSMC's figures are over original vanilla N5, usually representing the sweet spot best-case.

Zen4 very likely used at minimum N5P, probably with some X-like semi-customizations for the desktop/server CCDs (there were mentions of an N5HPC by TSMC a few years ago).

Have you seen AVX-512 benchmarks, you mean.

Well, that was the main holy grail target for Zen5, obviously:
Full-rate AVX512, without clockspeed regression.
The one area where Intel was still ahead.
So a lot of the transistor budget went into that.

Let's not pretend like AMD didn't try to optimize for frequency with Zen 5. More metal layers + other features from the N4X node...

Yep, and they actually succeeded.

With how little N4 improved over the N5 variant Zen4 used, reaching about the same clocks as Zen4 at ~same power, despite full-fat 512bit FP pipes and 50% more INT ALUs, among other things, is quite a feat.

That's not to say that Zen5 is perfect, it appears to have a lot of smaller issues and regressions.
But that probably also means more low-hanging fruits to pick for Zen6.

 

[adroc_thurston]

probably with some X-like semi-customizations for the desktop/server CCDs

Indeed it did.

So a lot of the transistor budget went into that.

Oh no the general FP went way up.

 

[Joe NYC]

That 18% isn't fmax; it's higher frequency at the same power. And typically that marketing number comes from some optimal point near the middle of the perf/watt curve.

In other words, more applicable to servers (CPU, GPU), which is the primary target of AMD with N2. Desktop will be smaller part of the overall N2 consumption for AMD.

Who knows if the rumors of N2X turn out to be true, that one may be more optimized for fmax.

 

[msj10]

Who knows if the rumors of N2X turn out to be true, that one may be more optimized for fmax.

It's not. unless Zen 6 is a mid 2027 or later product.

 

[511]

Wrong, mobile needs cheap mainstream peanuts which are N3.

N3 is not so cheap even N3C is not cheap 🤣🤣

 

[Josh128]

That's right. Units wise they'll sell more on mobile than the rest combined though, imo. All the volume SKUs are mobile ones.

Lisa would literally cut back flips whilst smoking cigars if that turns out to be true, especially if all the Venice sales volume pans out the way they hope. Consumer Mobile and GPU are AMD's last remaining marketshare mountains to climb.

 

[Jan Olšan]

That doesn't make much sense. Mobile benefits more from using less power and mobile CPUs have higher margins than desktop. If they are doing mobile on N3 and desktop on N2 they have things backwards.

Well N2 will be used for Compute chiplets. There could also be the concern that all the diverse blocks including anolog and IO PHYs in the SoC part (apart from CPU ores themselves) are harder to implement on bleeding-edge processes so you want to use the older node to make the job easier (and/or they don't scale well to newer node and you want to save money).

So on chiplet CPUs they used older node for the IO die, while in the mobile SoCs, most of the processor is really similar to what is an IO die in desktop and server = you have reasons to make the mobile SoC on the older node.