Question Zen 6 Speculation Thread

[Kepler_L2]

Regarding release dates, are we expecting the X3D Zen6 SKUs to be available already in 2026H2? Or like for Zen5 only non-X3D in first wave, then X3D in e.g. 2027Q3, and X3D2 some time after that?

X3D probably at CES 2027

 

[Fjodor2001]

X3D probably at CES 2027

So same time as non-X3D models, or what month in 2026 are you expecting them to be released?

If all are released at basically the same time, then what would they use as mid-life kicker all the way up until Zen7 is released. That’s a long time, and why would they not follow same release policy / schedule for X3D as for previous Zen generations?

 

[Kepler_L2]

So same time as non-X3D models, or what month in 2026 are you expecting them to be released?

If all are released at basically the same time, then what would they use as mid-life kicker all the way up until Zen7 is released. That’s a long time, and why would they not follow same release policy / schedule for X3D as for previous Zen generations?

Regular Zen6 should be September/October

 

[Fjodor2001]

Regular Zen6 should be September/October

That will put Zen6 X3D models in spring 2027, assuming they follow the same release policy / schedule for X3D as for previous Zen generations.

 

[Hulk]

In the M5, for example, there is nothing working at the rate of "perf per thread". There are 4 cores working at some higher rate and 6 cores working at some lower rate (more or less).

True that. The M5 is the ultimate computer, no doubt.

"“Compared to the multitronic unit, the most advanced computer in existence—the computer (Zen, Lion cove, Skylake, Darkmont,...) on your Enterprise is like an abacus.”

 

[poke01]

True that. The M5 is the ultimate computer, no doubt.

"“Compared to the multitronic unit, the most advanced computer in existence—the computer (Zen, Lion cove, Skylake, Darkmont,...) on your Enterprise is like an abacus.”

What does that AI slop mean? Do you read what you send?

 

[poke01]

When is Gorgon halo releasing, Computex 26?
that might mean Medusa halo is mid 2027.

 

[gdansk]

What does that AI slop mean? Do you read what you send?

No, no, it checks out https://en.wikipedia.org/wiki/The_Ultimate_Computer

 

[Hulk]

What does that AI slop mean? Do you read what you send?

I guess I'm getting old. It's a Star Trek TOS reference that I posted for humor.

 

[DrMrLordX]

Regular Zen6 should be September/October

When will Medusa Halo show up?

 

[Kepler_L2]

When will Medusa Halo show up?

CES 2028 AFAIK

 

[DrMrLordX]

CES 2028 AFAIK

Bleh, sad.

 

[Tachyonism]

Do Zen 6 LP cores have the same instructions set as normal Zen 6 and Zen 6c?

 

[poke01]

I guess I'm getting old. It's a Star Trek TOS reference that I posted for humor.

My bad Hulk

 

[Kepler_L2]

Do Zen 6 LP cores have the same instructions set as normal Zen 6 and Zen 6c?

Yes, though the architecture is slightly different.

 

[marees]

CES 2028 AFAIK

any chance of Medusa Premium coming up early — either as stand alone pc/laptop or a steam machine 2 or a third party series S2 etc. ?

 

[adroc_thurston]

any chance of Medusa Premium coming up early — either as stand alone pc/laptop or a steam machine 2 or a third party series S2 etc. ?

No, it's not made for poverty applications you've mentioned.

 

[basix]

Yes, though the architecture is slightly different.

Does this cover everything? I'm thinking about things such as AVX512, AMX, AVX10, APX (whatever Zen 6 classic will support)

 

[Hulk]

Remember this from ~ November 2025? I forgot to add my power estimate, but it was 200W as I remember thinking Zen 6 on the new node with 24 cores might be able to hold frequency-wise what Zen 5 did with 16 at the same power.

 

[Josh128]

...

 

[adroc_thurston]

I'm thinking about things such as AVX512, AMX, AVX10, APX (whatever Zen 6 classic will support)

ISA feature support is always flat. The same across every core variant.

 

[Hulk]

Do we know for Zen 5 how L3 latency compares to V-cache latency? I'm looking around and best estimate seems to be about a "handful" of cycles more for V-cache.

I'm thinking it's hard to determine because we can't really identify or discriminate between L3 and V-cache latency because they are close in terms of latency so there is no definite "strata" to be seen, unlike L1 vs L2 vs L3?

Also does the CPU treat L3 and V-cache as one big LLC?

 

[Covfefe]

Do we know for Zen 5 how L3 latency compares to V-cache latency? I'm looking around and best estimate seems to be about a "handful" of cycles more for V-cache.

I'm thinking it's hard to determine because we can't really identify or discriminate between L3 and V-cache latency because they are close in terms of latency so there is no definite "strata" to be seen, unlike L1 vs L2 vs L3?

Also does the CPU treat L3 and V-cache as one big LLC?

The L3 on the CCD and the V-cache chiplet are one unified cache. The V-cache increases the latency of the whole L3. It adds 4 cycles of latency on Zen5.

AMD's 9800X3D: 2nd Generation V-Cache

Following the first generation of V-Cache found in the Zen 3 and Zen 4 X3D SKUs, AMD is now following up with the second generation of V-Cache which is a major change for AMD in terms of packaging.

chipsandcheese.com

 

[basix]

ISA feature support is always flat. The same across every core variant.

That is the ideal case. But how will e.g. AVX512 and AMX supported by a super power and area optimized core? Still all necessary IP block there (e.g. Zen 4 like AVX512)? I'm just wondering, because all the vector and matrix oomph will increase the size of the core.

 

[jpiniero]

That is the ideal case. But how will e.g. AVX512 and AMX supported by a super power and area optimized core? Still all necessary IP block there (e.g. Zen 4 like AVX512)? I'm just wondering, because all the vector and matrix oomph will increase the size of the core.

I'd be surprised if AMD supports AMX.