Discussion Zen 5 Speculation (EPYC Turin and Strix Point/Granite Ridge - Ryzen 9000)

[DisEnchantment]

Speculate at will

 

[Josh128]

Review embargo dates are out, 1 day before release

9600X + 9700X @ august 7
9900X + 9950X @ august 14
View attachment 103800

Taken from this HUB video

Terrible. I was at least hoping they'd allow reviews to come out on the 31st. This must be more than a packaging issue. Theres zero reason some words and numbers printed on a cardboard box or IHS of the CPU should cause such review delays.

 

[Goop_reformed]

Terrible. I was at least hoping they'd allow reviews to come out on the 31st. This must be more than a packaging issue. Theres zero reason some words and numbers printed on a cardboard box or IHS of the CPU should cause such review delays.

It seems MLID is right about the bugs after all.

 

[igor_kavinski]

The fact the delay is only two weeks and affects desktop parts only makes me believe there is no hardware problem.

It could be a very simple oversight due to lack of communication between departments.

Lisa Su (memo to TSMC contact): Ship the review samples ASAP to us!

Shipment arrives and it is addressed to Lisa Su and contents written as "TOP SECRET review samples!". There is only a single "new" guy in the Inbound Logistics department that is supposed to take deliveries from TSMC. Everyone else is out for some important meeting. Wanting to impress Lisa Su, he sends it out to marketing because obviously they will send these samples to publications, right??? Marketing receives these and the single employee there hurriedly sends them out, without noticing that there is no QA inspection stamps on the review sample boxes (everyone is out partying too coz that's what marketing does most of the time).

QA team reads the news that reviewers have samples in hand.

Their head sends memo to Lisa Su: "Seems we were bypassed. Did you give the authorization for that?".

Lisa Su reads the memo and goes: "WTF??? Those morons!" and urgently calls everyone into a meeting where it's decided that the risk of bad publicity is just too high and

Lisa Su orders the recall of the review samples.

The Inbound Logistics Head has a really bad day.

 

[MS_AT]

Terrible. I was at least hoping they'd allow reviews to come out on the 31st. This must be more than a packaging issue. Theres zero reason some words and numbers printed on a cardboard box or IHS of the CPU should cause such review delays.

Reviewers need the time to test the cpu, many said it would not be possible to make it in time for 31st if they got CPUs now.

 

[igor_kavinski]

Sucks that desktop won’t get 3nm anytime soon.

Blame Apple. They didn't leave enough available capacity for anyone else. And they drove the N3 prices up too!

 

[Timmah!]

According to AMD, it is not a design or packaging issue, but that they discovered that not all chips that were sent out went through QA, so they are sending out new chips to make sure they were properly tested before being sold/reviewed. See post #16,557.

Edit: If it was an actual issue with the chips, there's no chance they would be able to get them fixed and new ones out the door within a week or two. It would have to be either the QA testing miss as explained, or something wrong with the microcode/firmware that they could fix and push out quickly.

Its clearly lack of cores issue. Theyre gluing in more as we speak

 

[igor_kavinski]

Reviewers need the time to test the cpu, many said it would not be possible to make it in time for 31st if they got CPUs now.

Excuses. They could choose some important benchmarks and do a quick "preview". And they could certainly complete all the benchmarking for the comparison/competing CPUs that they have in hand already.

 

[CouncilorIrissa]

Too much doom and drama over a relatively short delay.

 

[poke01]

Blame Apple. They didn't leave enough available capacity for anyone else. And they drove the N3 prices up too!

Nah, this is on AMD. AMD chose to pay for N3E only for Eypc as that’s where the $ is. Qualcomm and MediaTek also get N3E this year. N3E is actually cheaper than N3B.

 

[igor_kavinski]

AMD chose to pay for N3E only for Eypc as that’s where the $ is.

Yes because then most "cheap" AMD users wouldn't want the extra cost being passed onto them. And the cost got driven high due to Apple.

 

[igor_kavinski]

Too much doom and drama over a relatively short delay.

Your capacity for patience is admirable

Must be a parent

 

[FlameTail]

5.95GHz stock would have been possible with N3E thanks to FinFlex. Sucks that desktop won’t get 3nm anytime soon.

Would have been possible with even N4X.

Or even N4P, if they opted to use the HP library instead of HD.

 

[leoneazzurro]

It could be a very simple oversight due to lack of communication between departments.

Lisa Su (memo to TSMC contact): Ship the review samples ASAP to us!

Shipment arrives and it is addressed to Lisa Su and contents written as "TOP SECRET review samples!". There is only a single "new" guy in the Inbound Logistics department that is supposed to take deliveries from TSMC. Everyone else is out for some important meeting. Wanting to impress Lisa Su, he sends it out to marketing because obviously they will send these samples to publications, right??? Marketing receives these and the single employee there hurriedly sends them out, without noticing that there is no QA inspection stamps on the review sample boxes (everyone is out partying too coz that's what marketing does most of the time).

QA team reads the news that reviewers have samples in hand.

Their head sends memo to Lisa Su: "Seems we were bypassed. Did you give the authorization for that?".

Lisa Su reads the memo and goes: "WTF??? Those morons!" and urgently calls everyone into a meeting where it's decided that the risk of bad publicity is just too high and

Lisa Su orders the recall of the review samples.

The Inbound Logistics Head has a really bad day.

True, never underestimate the most common sense topics when dealing with tech junkies.

 

[igor_kavinski]

Or even N4P, if they opted to use the HP library instead of HD.

No way they used HD library for Zen 5 cores. Isn't that limited to something like 4.5 GHz?

 

[RnR_au]

Theres zero reason some words and numbers printed on a cardboard box or IHS of the CPU should cause such review delays.

A nice little marketing stunt from AMD I think

 

[FlameTail]

No way they used HD library for Zen 5 cores. Isn't that limited to something like 4.5 GHz?

I don't think so.

Node isn't the sole factor.

Fmax is a product of the uarch + physical design + process node.

 

[MS_AT]

Excuses. They could choose some important benchmarks and do a quick "preview". And they could certainly complete all the benchmarking for the comparison/competing CPUs that they have in hand already.

And AMD could skimp on quality control, to release the CPUs 2 weeks sooner, oh wait... And you mean those competing CPUs that are waiting for microcode fixes ?;P

 

[igor_kavinski]

And you mean those competing CPUs that are waiting for microcode fixes ?;P

Those don't even matter. AMD's current competition is Zen 4. Intel can get invited back when they have a flawlessly working CPU generation.

 

[Goop_reformed]

The more I read up about this the more suspicious I become. What we know so far:

1/ Zen 5 is a new uarch, taped out early.
2/ Some reviews samples date way way back.
3/ Amd have already delayed official launch twice.

This screams bugs, bugs and more bugs. I have a feeling now they will do it once more. 3rd's time the charm.

 

[carrotmania]

If some of the smaller websites received properly QC'd chips, but the "big boys" didn't, I could see AMD implementing a longer embargo for everyone to get reviews out on the same day, and not p155 off their larger "partners". You could make the argument that reviews over the course of 2 weeks would give them longer in the news, but it doesn't always work like that. Many less people would go to a comprehensive review like Anandtechs (hahaha, I couldn't resist the joke) if 2bitshop released a lesser, but still had graphs, review 2 weeks prior.

 

[Hans Gruber]

5.95GHz stock would have been possible with N3E thanks to FinFlex. Sucks that desktop won’t get 3nm anytime soon.

AMD will have Zen 5 on N3P by late next year. That is the fail safe from Intel Arrow Lake.

 

[Hans Gruber]

Excuses. They could choose some important benchmarks and do a quick "preview". And they could certainly complete all the benchmarking for the comparison/competing CPUs that they have in hand already.

It's not as if a lot of these youtube reviews do not wait for legit reviews and create charts that are inline with the legit review numbers without ever testing the CPU's themselves. Then they release their own youtube videos that show almost identical performance numbers.

 

[inf64]

HW Unboxed video has info about AMD's Computex Demo system that had a low performing 9950x ES (early ES), which underperformed even vs 7950X in Cinebech... When they called it out, AMD scrambled and removed the demo systems. That was 8 weeks ago, crazy.

 

[CouncilorIrissa]

Your capacity for patience is admirable

Must be a parent

I'm pretty sure I'm younger than most in this thread, actually.

I just don't really care about issues that no customer has lost their money over. AMD probably did, but as a customer I don't really care about that either.

 

[tsamolotoff]

5.95GHz stock would have been possible with N3E thanks to FinFlex. Sucks that desktop won’t get 3nm anytime soon.

Lots of early batch 7950x3d samples could do 6 ghz boost on ccd1, alas this didn't last for long and at least since march 2023 amd fixed it by replacing good quality cacheless chiplet with something like I have (reboots if fmax is raised above 5.8)